From 23f7b0e4ed05685e89c5c1d8d92556106b0845ff Mon Sep 17 00:00:00 2001
From: Daniel Friesel <daniel.friesel@uos.de>
Date: Wed, 12 Aug 2020 13:20:23 +0200
Subject: stm32f446re: Add uptime counter and proper loop mode with standby in
 between

---
 include/arch/stm32f446re-nucleo/driver/uptime.h | 27 +++++++++++++
 src/arch/stm32f446re-nucleo/Makefile.inc        |  2 +-
 src/arch/stm32f446re-nucleo/arch.cc             | 51 ++++++++++++++++++++++++-
 src/arch/stm32f446re-nucleo/driver/uptime.cc    |  3 ++
 4 files changed, 80 insertions(+), 3 deletions(-)
 create mode 100644 include/arch/stm32f446re-nucleo/driver/uptime.h
 create mode 100644 src/arch/stm32f446re-nucleo/driver/uptime.cc

diff --git a/include/arch/stm32f446re-nucleo/driver/uptime.h b/include/arch/stm32f446re-nucleo/driver/uptime.h
new file mode 100644
index 0000000..adace98
--- /dev/null
+++ b/include/arch/stm32f446re-nucleo/driver/uptime.h
@@ -0,0 +1,27 @@
+#ifndef UPTIME_H
+#define UPTIME_H
+
+#include <stdint.h>
+
+class Uptime {
+	private:
+		Uptime(const Uptime &copy);
+#ifdef TIMER_S
+		uint32_t seconds;
+#endif
+
+	public:
+#ifdef TIMER_S
+		Uptime () : seconds(0) {}
+#else
+		Uptime () {}
+#endif
+#ifdef TIMER_S
+		inline uint32_t get_s() { return seconds; }
+		inline void tick_s() { seconds++; }
+#endif
+};
+
+extern Uptime uptime;
+
+#endif
diff --git a/src/arch/stm32f446re-nucleo/Makefile.inc b/src/arch/stm32f446re-nucleo/Makefile.inc
index 54792d3..263fb2f 100644
--- a/src/arch/stm32f446re-nucleo/Makefile.inc
+++ b/src/arch/stm32f446re-nucleo/Makefile.inc
@@ -25,7 +25,7 @@ endif
 
 CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/gpio.cc
 CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdout.cc
-#CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc
+CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/uptime.cc
 
 ifneq ($(findstring stdin,${arch_drivers}), )
 	CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/stdin.cc
diff --git a/src/arch/stm32f446re-nucleo/arch.cc b/src/arch/stm32f446re-nucleo/arch.cc
index 12a612a..4634088 100644
--- a/src/arch/stm32f446re-nucleo/arch.cc
+++ b/src/arch/stm32f446re-nucleo/arch.cc
@@ -1,3 +1,7 @@
+#include <libopencm3/cm3/nvic.h>
+#include <libopencm3/stm32/rcc.h>
+#include <libopencm3/stm32/gpio.h>
+#include <libopencm3/stm32/timer.h>
 #include "arch.h"
 
 #ifdef __acweaving
@@ -6,6 +10,27 @@
 
 void Arch::setup(void)
 {
+	// NUCLEO-F443RE uses 8MHz STLINK clock as input
+	rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+#ifdef WITH_LOOP
+	rcc_periph_clock_enable(RCC_TIM2);
+	nvic_enable_irq(NVIC_TIM2_IRQ);
+	rcc_periph_reset_pulse(RST_TIM2);
+
+
+	timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT,
+		TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP);
+	// 10 kHz timer frequency
+	timer_set_prescaler(TIM2, ((rcc_apb1_frequency * 2) / 10000));
+
+	timer_disable_preload(TIM2); // ?
+	timer_continuous_mode(TIM2); // ?
+
+	timer_set_period(TIM2, 10000);
+
+	timer_enable_counter(TIM2);
+	timer_enable_irq(TIM2, TIM_DIER_UIE);
+#endif
 }
 
 #ifdef WITH_WAKEUP
@@ -37,9 +62,13 @@ void Arch::delay_ms(unsigned int const ms)
 void Arch::idle_loop(void)
 {
 	while (1) {
-		delay_ms(1000);
+		pwr_set_standby_mode();
+		__asm__("wfi");
 #ifdef WITH_LOOP
-		loop();
+		if (run_loop) {
+			loop();
+			run_loop = 0;
+		}
 #endif
 	}
 }
@@ -52,3 +81,21 @@ void Arch::idle(void)
 }
 
 Arch arch;
+
+#if defined(WITH_LOOP) || defined(TIMER_S)
+
+#include "driver/uptime.h"
+
+void tim2_isr(void)
+{
+	if (timer_get_flag(TIM2, TIM_SR_UIF)) {
+		timer_clear_flag(TIM2, TIM_SR_UIF);
+#ifdef WITH_LOOP
+		run_loop = 1;
+#endif
+#ifdef TIMER_S
+		uptime.tick_s();
+#endif
+	}
+}
+#endif
diff --git a/src/arch/stm32f446re-nucleo/driver/uptime.cc b/src/arch/stm32f446re-nucleo/driver/uptime.cc
new file mode 100644
index 0000000..388edb6
--- /dev/null
+++ b/src/arch/stm32f446re-nucleo/driver/uptime.cc
@@ -0,0 +1,3 @@
+#include "driver/uptime.h"
+
+Uptime uptime;
-- 
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