From d0ea0a521a582549dfd9a98b47e7c12d8bcd0de6 Mon Sep 17 00:00:00 2001 From: Daniel Friesel Date: Wed, 22 Jul 2020 14:28:32 +0200 Subject: add timed_resistive_load for µs-scale model generation timing benchmarks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- include/arch.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'include/arch.h') diff --git a/include/arch.h b/include/arch.h index 877af62..1911271 100644 --- a/include/arch.h +++ b/include/arch.h @@ -10,6 +10,8 @@ class Arch { void setup(); void idle_loop(); void idle(); + + // Delay functions are not exact void delay_us(unsigned int const us); void delay_ms(unsigned int const ms); void sleep_ms(unsigned int const ms); -- cgit v1.2.3