From 4f6973b8500418abf83c2377d09396b8588f7746 Mon Sep 17 00:00:00 2001 From: Daniel Friesel Date: Sat, 18 Sep 2021 21:07:30 +0200 Subject: New architecture: lora32u4ii Very limited support at the moment. No I2C/SPI, no USB bootloader or USB UART. --- src/arch/lora32u4ii/Makefile.inc | 121 ++++++++++++++++++++++++++++++++++ src/arch/lora32u4ii/arch.cc | 123 +++++++++++++++++++++++++++++++++++ src/arch/lora32u4ii/driver/gpio.cc | 25 +++++++ src/arch/lora32u4ii/driver/stdout.cc | 36 ++++++++++ src/arch/lora32u4ii/driver/uptime.cc | 3 + 5 files changed, 308 insertions(+) create mode 100644 src/arch/lora32u4ii/Makefile.inc create mode 100644 src/arch/lora32u4ii/arch.cc create mode 100644 src/arch/lora32u4ii/driver/gpio.cc create mode 100644 src/arch/lora32u4ii/driver/stdout.cc create mode 100644 src/arch/lora32u4ii/driver/uptime.cc (limited to 'src/arch/lora32u4ii') diff --git a/src/arch/lora32u4ii/Makefile.inc b/src/arch/lora32u4ii/Makefile.inc new file mode 100644 index 0000000..06ac1f9 --- /dev/null +++ b/src/arch/lora32u4ii/Makefile.inc @@ -0,0 +1,121 @@ +# vim:ft=make +# +# Copyright 2021 Daniel Friesel +# +# SPDX-License-Identifier: BSD-2-Clause + +MCU = atmega32u4 +SERIAL_PORT ?= /dev/ttyUSB0 + +ifdef CONFIG_arch_lora32u4ii_cpufreq + cpu_freq = ${CONFIG_arch_lora32u4ii_cpufreq} +endif + +cpu_freq ?= 8000000 + +COMMON_FLAGS += -Werror=overflow +COMMON_FLAGS += -mmcu=${MCU} -DMULTIPASS_ARCH_lora32u4ii +COMMON_FLAGS += -DF_CPU=${cpu_freq}UL +COMMON_FLAGS += -DMULTIPASS_ARCH_HAS_I2C + +ifeq (${stack_usage}, ) + COMMON_FLAGS += -flto +endif + +CC = avr-gcc +CXX = avr-g++ +NM = avr-nm +OBJCOPY = avr-objcopy +OBJDUMP = avr-objdump + +ARCH_SHORTNAME = avr + +ifeq (${aspectc}, 1) + CXX = ag++ -r build/repo.acp -v 0 --c_compiler avr-g++ -p . --Xcompiler +endif + +CXX_TARGETS += src/arch/lora32u4ii/arch.cc +CXX_TARGETS += src/arch/lora32u4ii/driver/gpio.cc +CXX_TARGETS += src/arch/lora32u4ii/driver/stdout.cc + +# Command-line driver selection + +ifeq (${timer_s}, 1) + CONFIG_arch_lora32u4ii_driver_uptime = y +endif + +# Kconfig driver selection + +ifdef CONFIG_arch_lora32u4ii_driver_uptime + COMMON_FLAGS += -DTIMER_S + CXX_TARGETS += src/arch/lora32u4ii/driver/uptime.cc +endif + +ifeq (${cpu_freq}, 8000000) + uart_baud = 19200 +else ifeq (${cpu_freq}, 4000000) + uart_baud = 19200 +else ifeq (${cpu_freq}, 2000000) + uart_baud = 19200 +else ifeq (${cpu_freq}, 1000000) + uart_baud = 9600 +else ifeq (${cpu_freq}, 500000) + uart_baud = 4800 +else ifeq (${cpu_freq}, 250000) + uart_baud = 2400 +else ifeq (${cpu_freq}, 125000) + uart_baud = 1200 +else ifeq (${cpu_freq}, 62500) + uart_baud = 300 +else + uart_baud = 9600 +endif + +COMMON_FLAGS += -DBAUD=${uart_baud}UL + +OBJECTS = ${CXX_TARGETS:.cc=.o} ${C_TARGETS:.c=.o} + +%.o : %.cc | include/config.h + ${QUIET}${CXX} ${INCLUDES} ${COMMON_FLAGS} ${CXXFLAGS} -c -o $@ ${@:.o=.cc} + +%.o : %.c | include/config.h + ${QUIET}${CC} ${INCLUDES} ${COMMON_FLAGS} ${CFLAGS} -c -o $@ ${@:.o=.c} + +build/system.elf: ${OBJECTS} + ${QUIET}mkdir -p build + ${QUIET}${CXX} ${COMMON_FLAGS} ${CXXFLAGS} -Wl,--gc-sections -o $@ ${OBJECTS} + ${QUIET}avr-size --format=avr --mcu=${MCU} $@ + ${QUIET}test $$(avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Program | grep -o '[0-9.]*%' | cut -d . -f 1) -lt 100 + +build/system.hex: build/system.elf + ${QUIET}${OBJCOPY} -O ihex ${@:.hex=.elf} $@ + +program: build/system.hex + ${QUIET}avrdude -p ${MCU} -c usbasp -U flash:w:build/system.hex + +arch_clean: + ${QUIET}rm -f ${OBJECTS} build/system.hex + +cat: + ${QUIET}script/cat.py ${SERIAL_PORT} ${uart_baud} ${cpu_freq} 65536 + +monitor: + ${QUIET}screen ${SERIAL_PORT} ${uart_baud} + +size: build/system.elf + ${QUIET}avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Program | perl -nE 'if (m{(\d+) bytes \(([0-9.]+%)}) { print("$$1;$$2;") }' + ${QUIET}avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Data | perl -nE 'if (m{(\d+) bytes \(([0-9.]+%)}) { print("$$1;$$2;") }' + ${QUIET}echo + +arch_help: + @echo "lora32u4ii specific flags:" + @echo " SERIAL_PORT = ${SERIAL_PORT}" + +arch_info: + @echo "CPU Freq: ${cpu_freq} Hz" + @echo "Timer Freq: ${timer_freq} Hz" + @echo "I2C Freq: ${i2c_freq} Hz" + @echo "Counter Overflow: 65536/255" + @echo "Monitor: ${SERIAL_PORT} ${uart_baud}" + +.PHONY: arch_clean arch_help arch_info monitor program diff --git a/src/arch/lora32u4ii/arch.cc b/src/arch/lora32u4ii/arch.cc new file mode 100644 index 0000000..aa5c288 --- /dev/null +++ b/src/arch/lora32u4ii/arch.cc @@ -0,0 +1,123 @@ +#include "arch.h" +#include +#include +#include +#include + +void Arch::setup(void) +{ + wdt_disable(); + +#if F_CPU == 8000000UL + /* default */ +#elif F_CPU == 4000000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS0); +#elif F_CPU == 2000000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS1); +#elif F_CPU == 1000000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS1) | _BV(CLKPS0); +#elif F_CPU == 500000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS2); +#elif F_CPU == 250000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS2) | _BV(CLKPS0); +#elif F_CPU == 125000UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS2) | _BV(CLKPS1); +#elif F_CPU == 62500UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS2) | _BV(CLKPS1) | _BV(CLKPS0); +#elif F_CPU == 32150UL + CLKPR = _BV(CLKPCE); + CLKPR = _BV(CLKPS3); +#else +#error Unsupported F_CPU +#endif + +#if defined(CONFIG_loop) || defined(TIMER_S) + TCCR1A = 0; + TCCR1B = _BV(WGM12) | _BV(CS12) | _BV(CS10); // CTC, /1024 + OCR1A = F_CPU / 1024; + TIMSK1 = _BV(OCIE1A); +#endif + + sei(); +} + +#ifdef CONFIG_wakeup +void wakeup(); +#endif + +#if defined(CONFIG_loop) || defined(TIMER_S) + +#include "driver/uptime.h" + +#endif + +#if defined(CONFIG_loop) +extern void loop(); +volatile char run_loop = 0; +#endif + +void Arch::idle_loop(void) +{ + while (1) { + SMCR = _BV(SE); + asm("sleep"); + SMCR = 0; + asm("wdr"); +#ifdef CONFIG_loop + if (run_loop) { + loop(); + run_loop = 0; + } +#endif +#ifdef CONFIG_wakeup + wakeup(); +#endif + } +} + +void Arch::idle(void) +{ + SMCR = _BV(SE); + asm("sleep"); + SMCR = 0; + asm("wdr"); +} + +void Arch::delay_us(unsigned int const us) +{ + for (unsigned int i = 0; i < us; i++) { + _delay_us(1); + } +} + +void Arch::delay_ms(unsigned int const ms) +{ + for (unsigned int i = 0; i < ms; i++) { + _delay_ms(1); + } +} + +Arch arch; + +#if defined(CONFIG_loop) || defined(TIMER_S) + +#ifndef __acweaving +ISR(TIMER1_COMPA_vect) +{ +#ifdef CONFIG_loop + run_loop = 1; +#endif +#ifdef TIMER_S + uptime.tick_s(); +#endif +} +#endif + +#endif diff --git a/src/arch/lora32u4ii/driver/gpio.cc b/src/arch/lora32u4ii/driver/gpio.cc new file mode 100644 index 0000000..2e3eb1d --- /dev/null +++ b/src/arch/lora32u4ii/driver/gpio.cc @@ -0,0 +1,25 @@ +#include "driver/gpio.h" +#include +#include + +GPIO gpio; + +#ifndef __acweaving +/* +ISR(PCINT0_vect) +{ +} +*/ + +/* +ISR(PCINT1_vect) +{ +} +*/ + +/* +ISR(PCINT2_vect) +{ +} +*/ +#endif diff --git a/src/arch/lora32u4ii/driver/stdout.cc b/src/arch/lora32u4ii/driver/stdout.cc new file mode 100644 index 0000000..afe6ff8 --- /dev/null +++ b/src/arch/lora32u4ii/driver/stdout.cc @@ -0,0 +1,36 @@ +#include "driver/stdout.h" +#include +#include + +#ifndef BAUD +#define BAUD 9600UL +#endif + +#include + +void StandardOutput::setup() +{ + UBRR1H = UBRRH_VALUE; + UBRR1L = UBRRL_VALUE; + +#if USE_2X + UCSR1A |= _BV(U2X1); +#else + UCSR1A &= ~_BV(U2X1); +#endif + + UCSR1B |= _BV(RXEN1) | _BV(TXEN1); + UCSR1C = _BV(UCSZ11) | _BV(UCSZ10); // async UART, 8N1 + //UCSR1D = 0; +} + +void StandardOutput::put(char c) +{ + while (!(UCSR1A & _BV(UDRE1))); + UDR1 = c; + if (c == '\n') { + put('\r'); + } +} + +StandardOutput kout; diff --git a/src/arch/lora32u4ii/driver/uptime.cc b/src/arch/lora32u4ii/driver/uptime.cc new file mode 100644 index 0000000..388edb6 --- /dev/null +++ b/src/arch/lora32u4ii/driver/uptime.cc @@ -0,0 +1,3 @@ +#include "driver/uptime.h" + +Uptime uptime; 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