From d0ea0a521a582549dfd9a98b47e7c12d8bcd0de6 Mon Sep 17 00:00:00 2001 From: Daniel Friesel Date: Wed, 22 Jul 2020 14:28:32 +0200 Subject: add timed_resistive_load for µs-scale model generation timing benchmarks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- .../msp430fr5994lp/driver/timed_resistive_load.cc | 85 ++++++++++++++++++++++ 1 file changed, 85 insertions(+) create mode 100644 src/arch/msp430fr5994lp/driver/timed_resistive_load.cc (limited to 'src/arch/msp430fr5994lp/driver/timed_resistive_load.cc') diff --git a/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc b/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc new file mode 100644 index 0000000..2c46be2 --- /dev/null +++ b/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc @@ -0,0 +1,85 @@ +#include "driver/timed_resistive_load.h" +#include "driver/gpio.h" +#include "arch.h" + +#ifndef TIMED_RESISTIVE_LOAD_PIN1 +#error TIMED_RESISTIVE_LOAD_PIN1 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN2 +#error TIMED_RESISTIVE_LOAD_PIN2 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN3 +#error TIMED_RESISTIVE_LOAD_PIN3 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN4 +#error TIMED_RESISTIVE_LOAD_PIN4 must be set +#endif + +void TimedResistiveLoad::setup() +{ + gpio.output(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchToNone() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo750() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo1K0() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo2K4() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 1); +} + +void TimedResistiveLoad::switchTo3K3() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo10K() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 1); +} + +void TimedResistiveLoad::switchTo47K() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +TimedResistiveLoad timedResistiveLoad; -- cgit v1.2.3