From d0ea0a521a582549dfd9a98b47e7c12d8bcd0de6 Mon Sep 17 00:00:00 2001 From: Daniel Friesel Date: Wed, 22 Jul 2020 14:28:32 +0200 Subject: add timed_resistive_load for µs-scale model generation timing benchmarks MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit --- src/arch/msp430fr5994lp/Makefile.inc | 16 +++- .../msp430fr5994lp/driver/timed_resistive_load.cc | 85 ++++++++++++++++++++++ 2 files changed, 100 insertions(+), 1 deletion(-) create mode 100644 src/arch/msp430fr5994lp/driver/timed_resistive_load.cc (limited to 'src/arch/msp430fr5994lp') diff --git a/src/arch/msp430fr5994lp/Makefile.inc b/src/arch/msp430fr5994lp/Makefile.inc index 8348d8e..e9d666f 100644 --- a/src/arch/msp430fr5994lp/Makefile.inc +++ b/src/arch/msp430fr5994lp/Makefile.inc @@ -72,6 +72,19 @@ ifneq ($(findstring counter,${arch_drivers}), ) CXX_TARGETS += src/arch/msp430fr5994lp/driver/counter.cc endif +ifneq ($(findstring timed_resistive_load,${arch_drivers}), ) + CXX_TARGETS += src/arch/msp430fr5994lp/driver/timed_resistive_load.cc + resistor1_pin ?= p3_0 + resistor2_pin ?= p3_1 + resistor3_pin ?= p3_2 + resistor4_pin ?= p3_3 + COMMON_FLAGS += -DDRIVER_TIMED_RESISTIVE_LOAD + COMMON_FLAGS += -DTIMED_RESISTIVE_LOAD_PIN1=GPIO::${resistor1_pin} + COMMON_FLAGS += -DTIMED_RESISTIVE_LOAD_PIN2=GPIO::${resistor2_pin} + COMMON_FLAGS += -DTIMED_RESISTIVE_LOAD_PIN3=GPIO::${resistor3_pin} + COMMON_FLAGS += -DTIMED_RESISTIVE_LOAD_PIN4=GPIO::${resistor4_pin} +endif + ifneq (${cpu_freq}, ) COMMON_FLAGS += -DF_CPU=${cpu_freq}UL else @@ -127,7 +140,8 @@ arch_info: @echo "CPU Freq: ${cpu_freq} Hz" @echo "Timer Freq: ${timer_freq} Hz -> $(shell src/arch/msp430fr5994lp/model.py f_timer "${cpu_freq}" "${timer_freq}")" @echo "I2C Freq: ${i2c_freq} Hz" - @echo "Counter Overflow: 65536/255" + @echo "Counter Overflow: 65536/65535" + @echo "sleep_ms Overflow: 250 500" @echo "Monitor: /dev/${SERIAL_PORT} 115200" .PHONY: arch_clean arch_help arch_info monitor program diff --git a/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc b/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc new file mode 100644 index 0000000..2c46be2 --- /dev/null +++ b/src/arch/msp430fr5994lp/driver/timed_resistive_load.cc @@ -0,0 +1,85 @@ +#include "driver/timed_resistive_load.h" +#include "driver/gpio.h" +#include "arch.h" + +#ifndef TIMED_RESISTIVE_LOAD_PIN1 +#error TIMED_RESISTIVE_LOAD_PIN1 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN2 +#error TIMED_RESISTIVE_LOAD_PIN2 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN3 +#error TIMED_RESISTIVE_LOAD_PIN3 must be set +#endif + +#ifndef TIMED_RESISTIVE_LOAD_PIN4 +#error TIMED_RESISTIVE_LOAD_PIN4 must be set +#endif + +void TimedResistiveLoad::setup() +{ + gpio.output(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.output(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchToNone() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo750() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo1K0() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo2K4() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 1); +} + +void TimedResistiveLoad::switchTo3K3() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +void TimedResistiveLoad::switchTo10K() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 1); +} + +void TimedResistiveLoad::switchTo47K() +{ + gpio.write(TIMED_RESISTIVE_LOAD_PIN1, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN2, 0); + gpio.write(TIMED_RESISTIVE_LOAD_PIN3, 1); + gpio.write(TIMED_RESISTIVE_LOAD_PIN4, 0); +} + +TimedResistiveLoad timedResistiveLoad; -- cgit v1.2.3