From 2c26e3702413f62649f1aa38a407927df5f6fe30 Mon Sep 17 00:00:00 2001 From: Birte Kristina Friesel Date: Sat, 27 Jan 2024 19:33:18 +0100 Subject: msp430fr5969 stdin: increase buffer size; move initialization to stdin --- src/arch/msp430fr5969lp/Kconfig | 16 ++++---- src/arch/msp430fr5969lp/driver/dmx.cc | 66 --------------------------------- src/arch/msp430fr5969lp/driver/dmx1.cc | 62 +++++++++++++++++++++++++++++++ src/arch/msp430fr5969lp/driver/stdin.cc | 4 ++ 4 files changed, 74 insertions(+), 74 deletions(-) delete mode 100644 src/arch/msp430fr5969lp/driver/dmx.cc create mode 100644 src/arch/msp430fr5969lp/driver/dmx1.cc (limited to 'src') diff --git a/src/arch/msp430fr5969lp/Kconfig b/src/arch/msp430fr5969lp/Kconfig index b96a032..0e7052d 100644 --- a/src/arch/msp430fr5969lp/Kconfig +++ b/src/arch/msp430fr5969lp/Kconfig @@ -9,20 +9,20 @@ config arch_msp430fr5969lp_driver_counter bool "Cycle Counter" select meta_driver_counter -config arch_msp430fr5969lp_driver_dmx -bool "DMX" +config arch_msp430fr5969lp_driver_dmx1 +bool "DMX Output on eUSCI_A1 / P2.5" +depends on !meta_driver_stdout1 select meta_driver_dmx +select meta_driver_dmx1 config arch_msp430fr5969lp_driver_i2c -bool "I2C on eUSCI_B0" +bool "I²C on eUSCI_B0 / P1.[67]" +help + SDA: P1.6 + SCL: P1.7 select meta_driver_hardware_i2c select meta_driver_i2c -## broken -#config arch_msp430fr5969lp_driver_spi_a1 -#bool "SPI on eUSCI_A1" -#select meta_driver_spi - config arch_msp430fr5969lp_driver_spi bool "SPI on eUSCI_B0" select meta_driver_spi diff --git a/src/arch/msp430fr5969lp/driver/dmx.cc b/src/arch/msp430fr5969lp/driver/dmx.cc deleted file mode 100644 index 78c7e19..0000000 --- a/src/arch/msp430fr5969lp/driver/dmx.cc +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright 2022 Birte Kristina Friesel - * - * SPDX-License-Identifier: BSD-2-Clause - */ -#include -#include "arch.h" -#include "driver/dmx.h" -#include "driver/gpio.h" - -/* - * Baud rate calculation according to datasheet: - * N := f_{BRCLK} / Baudrate = F_CPU / 115200 in our case - * if N <= 16: OS16 = 0, UCBR0 = int(N) - * if N > 16: OS16 = 1, UCBR0 = int(N/16), UCBRF0 = int(((n/16) - int(n/16)) * 16) = int(N)%16 - * Set UCBRS0 according to table 21-4 - */ - -void DMX::setup() -{ - UCA1CTLW0 |= UCSWRST; -#if F_CPU == 16000000UL - // 16M / 250000 == 64 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 0, UCBRS0 = 0x00 - UCA1CTLW0 = UCSWRST | UCSPB | UCSSEL__SMCLK; // MSB first, 8 data bits, 2 stop bits - UCA1MCTLW = UCOS16; - UCA1BR0 = 4; -#else -#error Unsupported F_CPU -#endif - - UCA1IRCTL = 0; - UCA1ABCTL = 0; - - P2SEL0 &= ~BIT5; - P2SEL1 |= BIT5; - P2DIR |= BIT5; - - UCA1CTLW0 &= ~UCSWRST; -} - -void DMX::write() -{ - // Disable UART for reset and mark signals - UCA1CTLW0 |= UCSWRST; - P2SEL1 &= ~BIT5; - gpio.output(GPIO::p2_5, 0); - arch.delay_us(88); // break / reset - gpio.output(GPIO::p2_5, 1); - arch.delay_us(8); // mark - P2SEL1 |= BIT5; - UCA1CTLW0 &= ~UCSWRST; // causes line to go high - for (unsigned char i = 0; i < 16; i++) { - while (!(UCA1IFG & UCTXIFG)); - UCA1TXBUF = frames[i]; - } - for (unsigned char i = 0; i < 241; i++) { - while (!(UCA1IFG & UCTXIFG)); - UCA1TXBUF = 0; - } - for (unsigned char i = 0; i < 255; i++) { - while (!(UCA1IFG & UCTXIFG)); - UCA1TXBUF = 0; - } -} - -DMX dmx; diff --git a/src/arch/msp430fr5969lp/driver/dmx1.cc b/src/arch/msp430fr5969lp/driver/dmx1.cc new file mode 100644 index 0000000..cad965b --- /dev/null +++ b/src/arch/msp430fr5969lp/driver/dmx1.cc @@ -0,0 +1,62 @@ +/* + * Copyright 2022 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include +#include "arch.h" +#include "driver/dmx1.h" +#include "driver/gpio.h" + +/* + * Baud rate calculation according to datasheet: + * N := f_{BRCLK} / Baudrate = F_CPU / 115200 in our case + * if N <= 16: OS16 = 0, UCBR0 = int(N) + * if N > 16: OS16 = 1, UCBR0 = int(N/16), UCBRF0 = int(((n/16) - int(n/16)) * 16) = int(N)%16 + * Set UCBRS0 according to table 21-4 + */ + +void DMX1::setup() +{ + UCA1CTLW0 |= UCSWRST; +#if F_CPU == 16000000UL + // 16M / 250000 == 64 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 0, UCBRS0 = 0x00 + UCA1CTLW0 = UCSWRST | UCSPB | UCSSEL__SMCLK; // MSB first, 8 data bits, 2 stop bits + UCA1MCTLW = UCOS16; + UCA1BR0 = 4; +#else +#error Unsupported F_CPU +#endif + + UCA1IRCTL = 0; + UCA1ABCTL = 0; + + P2SEL0 &= ~BIT5; + P2SEL1 |= BIT5; + P2DIR |= BIT5; + + UCA1CTLW0 &= ~UCSWRST; +} + +void DMX1::write() +{ + // Disable UART for reset and mark signals + UCA1CTLW0 |= UCSWRST; + P2SEL1 &= ~BIT5; + gpio.output(GPIO::p2_5, 0); + arch.delay_us(88); // break / reset + gpio.output(GPIO::p2_5, 1); + arch.delay_us(8); // mark + P2SEL1 |= BIT5; + UCA1CTLW0 &= ~UCSWRST; // causes line to go high + for (unsigned short i = 0; i < num_frames; i++) { + while (!(UCA1IFG & UCTXIFG)); + UCA1TXBUF = frames[i]; + } + for (unsigned short i = 0; i < 258 - num_frames; i++) { + while (!(UCA1IFG & UCTXIFG)); + UCA1TXBUF = 0; + } +} + +DMX1 dmx1; diff --git a/src/arch/msp430fr5969lp/driver/stdin.cc b/src/arch/msp430fr5969lp/driver/stdin.cc index 0850dab..92b7157 100644 --- a/src/arch/msp430fr5969lp/driver/stdin.cc +++ b/src/arch/msp430fr5969lp/driver/stdin.cc @@ -8,6 +8,10 @@ void StandardInput::setup() { + UCA0CTLW0 |= UCSWRST; + P2SEL0 &= ~BIT1; + P2SEL1 |= BIT1; + UCA0CTLW0 &= ~UCSWRST; UCA0IE |= UCRXIE; } -- cgit v1.2.3