From e2d191ebe69745fe658df8c56be2f8d3c4e7af47 Mon Sep 17 00:00:00 2001 From: Daniel Friesel Date: Thu, 21 Jul 2022 12:44:43 +0200 Subject: tc1796: it's working! --- src/arch/infineon-tc1796-mock/Kconfig | 4 ++ src/arch/infineon-tc1796-mock/Makefile.inc | 3 ++ src/arch/infineon-tc1796-mock/arch.cc | 22 ++++------ src/arch/infineon-tc1796-mock/driver/counter.cc | 1 - src/arch/infineon-tc1796-mock/driver/stdout.cc | 58 +++++++++++++++++++++++++ 5 files changed, 73 insertions(+), 15 deletions(-) (limited to 'src') diff --git a/src/arch/infineon-tc1796-mock/Kconfig b/src/arch/infineon-tc1796-mock/Kconfig index 550681f..5efcbdc 100644 --- a/src/arch/infineon-tc1796-mock/Kconfig +++ b/src/arch/infineon-tc1796-mock/Kconfig @@ -1,3 +1,7 @@ # Copyright 2022 Daniel Friesel # # SPDX-License-Identifier: CC0-1.0 + +config arch_infineon_tc1796_mock_driver_counter +bool "Cycle Counter" +select meta_driver_counter diff --git a/src/arch/infineon-tc1796-mock/Makefile.inc b/src/arch/infineon-tc1796-mock/Makefile.inc index 32cf581..7fcdd69 100644 --- a/src/arch/infineon-tc1796-mock/Makefile.inc +++ b/src/arch/infineon-tc1796-mock/Makefile.inc @@ -7,6 +7,8 @@ CPU = tc1796 cpu_freq ?= 150000000 +counter_freq ?= 75000000 +uart_freq ?= 115200 SERIAL_PORT ?= ttyUSB0 QEMU_PORT ?= 12345 @@ -81,6 +83,7 @@ arch_help: arch_info: @echo "CPU Freq: ${cpu_freq} Hz" + @echo "Count Freq: ${counter_freq} Hz" attributes: build/system.elf ${QUIET}script/size.py "${SIZE}" text,rodata bss diff --git a/src/arch/infineon-tc1796-mock/arch.cc b/src/arch/infineon-tc1796-mock/arch.cc index 8905f9c..73ebd2d 100644 --- a/src/arch/infineon-tc1796-mock/arch.cc +++ b/src/arch/infineon-tc1796-mock/arch.cc @@ -22,6 +22,9 @@ extern "C" { #define OF_VCOSEL 6 #define OF_SYSFS 2 +#define STM_CLC (*(volatile unsigned int*)0xf0000200) +#define STM_TIM5 (*(volatile unsigned int*)0xf0000224) + void Arch::setup(void) { /* @@ -30,17 +33,13 @@ void Arch::setup(void) */ unlock_wdtcon(); (*(unsigned int*)0xf0000040) = (29 << OF_NDIV) | (0 << OF_PDIV) | (3 << OF_KDIV) | (2 << OF_VCOSEL); - //PMI_CON0.bits.CCBYP = 0; + STM_CLC = 0x00000100; lock_wdtcon(); } -#ifdef CONFIG_wakeup -extern void wakeup(); -#endif - #if defined(CONFIG_loop) extern void loop(); -volatile char run_loop = 0; +unsigned int old_tim5 = 0; #endif volatile bool sleep_done = false; @@ -71,22 +70,17 @@ void Arch::idle_loop(void) { while (1) { #if defined(CONFIG_loop) - if (run_loop) { + // STM_TIM5 will overflow once every 1.9 years. + if ((STM_TIM5 - old_tim5 > 70) || (old_tim5 > STM_TIM5)) { + old_tim5 = STM_TIM5; loop(); - run_loop = 0; } -#endif -#ifdef CONFIG_wakeup - wakeup(); #endif } } void Arch::idle(void) { -#ifdef CONFIG_wakeup - wakeup(); -#endif } Arch arch; diff --git a/src/arch/infineon-tc1796-mock/driver/counter.cc b/src/arch/infineon-tc1796-mock/driver/counter.cc index 7279806..0277d07 100644 --- a/src/arch/infineon-tc1796-mock/driver/counter.cc +++ b/src/arch/infineon-tc1796-mock/driver/counter.cc @@ -5,6 +5,5 @@ */ #include "arch.h" #include "driver/counter.h" -#include "driver/gpio.h" Counter counter; diff --git a/src/arch/infineon-tc1796-mock/driver/stdout.cc b/src/arch/infineon-tc1796-mock/driver/stdout.cc index ccdb7d5..499b2ab 100644 --- a/src/arch/infineon-tc1796-mock/driver/stdout.cc +++ b/src/arch/infineon-tc1796-mock/driver/stdout.cc @@ -4,13 +4,71 @@ * SPDX-License-Identifier: BSD-2-Clause */ #include "driver/stdout.h" +#include +#include +#include + +#define OF_BYP 29 +#define OF_NDIV 16 +#define OF_PDIV 13 +#define OF_KDIV 8 +#define OF_VCOSEL 6 +#define OF_SYSFS 2 + +#define OF_RMC 8 +#define ASC0_CLC (*(volatile unsigned int*)0xf0000a00) +#define ASC0_PISEL (*(volatile unsigned int*)0xf0000a04) +#define ASC0_CON (*(volatile unsigned int*)0xf0000a10) +#define ASC0_BG (*(volatile unsigned int*)0xf0000a14) +#define ASC0_FDV (*(volatile unsigned int*)0xf0000a18) +#define ASC0_TBUF (*(volatile unsigned int*)0xf0000a20) +#define ASC0_TBSRC (*(volatile unsigned int*)0xf0000afc) + +#define SRC_SRE (1 << 12) +#define SRC_SRR (1 << 13) +#define SRC_CLRR (1 << 14) +#define SRC_SETR (1 << 15) void StandardOutput::setup() { + // P5_IOCR0.PC1 = OUT_PPALT1 + (*(volatile unsigned int*)0xf0001110) = 0x9 << 12; + // P5_IOMR.PS1 = 1 + (*(volatile unsigned int*)0xf0001104) = 0x00000001; + + /* Configure for 115200 Baud @ 75 MHz fSYS, see table 19-4 */ + unsigned int const reload_value = 0x17; + unsigned int const fdv = 0x12e; + + unlock_wdtcon(); + // ASC0_CLC: enable (DISR := 0), RMC := 1 (clock divider == 1 -> clock == system clock "fsys"?) + ASC0_CLC = 1 << OF_RMC; + lock_wdtcon(); + // ASC0_CON = 0 + ASC0_CON = 0; + // ASC0_BG = reload_value + ASC0_BG = reload_value; + // ASC0_FDV = fdv + ASC0_FDV = fdv; + // ASC0_CON := (M := ASCM_8ASYNC == 1; FDE := 1; R := 1 + ASC0_CON = (1 << 0) | (1 << 11) | (1 << 15); + + /* After initialization, the transmit buffer is ready to accept writes. */ + ASC0_TBSRC = SRC_SETR; } void StandardOutput::put(char c) { + while (!(ASC0_TBSRC & SRC_SRR)) ; + + /* Clear service request flag -- we're filling up TBUF */ + ASC0_TBSRC = SRC_CLRR; + + ASC0_TBUF = c; + + if (c == '\n') { + put('\r'); + } } StandardOutput kout; -- cgit v1.2.3