From f1a1417d4de82897d50015504f3c9611932cd58f Mon Sep 17 00:00:00 2001
From: Daniel Friesel <derf@finalrewind.org>
Date: Wed, 23 Dec 2015 13:42:14 +0100
Subject: further refinements

---
 circuit/smd.brd | 13 +++++++------
 1 file changed, 7 insertions(+), 6 deletions(-)

(limited to 'circuit')

diff --git a/circuit/smd.brd b/circuit/smd.brd
index c893d33..9471d56 100644
--- a/circuit/smd.brd
+++ b/circuit/smd.brd
@@ -71,6 +71,8 @@
 <text x="34.29" y="2.54" size="1.016" layer="25">SCL</text>
 <text x="34.29" y="15.875" size="1.016" layer="25">5V</text>
 <text x="34.29" y="1.27" size="1.016" layer="25">GND</text>
+<text x="24.765" y="12.7" size="1.016" layer="25">1</text>
+<text x="26.035" y="5.08" size="1.016" layer="25" rot="R180">ISP</text>
 </plain>
 <libraries>
 <library name="atmel">
@@ -557,11 +559,11 @@ Based on the following sources:
 <attribute name="VALUE" x="8.89" y="7.9756" size="1.27" layer="28" ratio="10" rot="MR270"/>
 </element>
 <element name="R6" library="rcl" package="R0805" value="68R" x="16.51" y="8.89" smashed="yes" rot="MR180">
-<attribute name="NAME" x="19.812" y="8.001" size="0.8128" layer="26" ratio="10" rot="MR180"/>
+<attribute name="NAME" x="12.827" y="9.271" size="0.8128" layer="26" ratio="10" rot="MR180"/>
 <attribute name="VALUE" x="14.2494" y="9.525" size="1.27" layer="28" ratio="10" rot="MR180"/>
 </element>
 <element name="R4" library="rcl" package="R0805" value="68R" x="16.51" y="11.43" smashed="yes" rot="MR180">
-<attribute name="NAME" x="19.812" y="10.541" size="0.8128" layer="26" ratio="10" rot="MR180"/>
+<attribute name="NAME" x="12.827" y="11.811" size="0.8128" layer="26" ratio="10" rot="MR180"/>
 <attribute name="VALUE" x="14.2494" y="12.065" size="1.27" layer="28" ratio="10" rot="MR180"/>
 </element>
 <element name="C1" library="rcl" package="C0805" value="100n" x="8.255" y="15.875" smashed="yes">
@@ -738,10 +740,9 @@ Based on the following sources:
 <wire x1="29.21" y1="11.43" x2="31.75" y2="11.43" width="0.4064" layer="1"/>
 <wire x1="31.75" y1="11.43" x2="33.02" y2="12.7" width="0.4064" layer="1"/>
 <wire x1="33.02" y1="12.7" x2="34.925" y2="12.7" width="0.4064" layer="1"/>
-<wire x1="28.89" y1="3.175" x2="32.385" y2="3.175" width="0.4064" layer="1"/>
-<via x="32.385" y="3.175" extent="1-16" drill="0.7"/>
-<wire x1="32.385" y1="3.175" x2="32.385" y2="5.08" width="0.4064" layer="16"/>
-<wire x1="32.385" y1="5.08" x2="31.115" y2="6.35" width="0.4064" layer="16"/>
+<wire x1="28.89" y1="3.175" x2="31.115" y2="3.175" width="0.4064" layer="1"/>
+<via x="31.115" y="3.175" extent="1-16" drill="0.7"/>
+<wire x1="31.115" y1="3.175" x2="31.115" y2="6.35" width="0.4064" layer="16"/>
 <via x="31.115" y="6.35" extent="1-16" drill="0.7"/>
 <wire x1="31.115" y1="6.35" x2="31.115" y2="9.525" width="0.4064" layer="1"/>
 <wire x1="31.115" y1="9.525" x2="29.21" y2="11.43" width="0.4064" layer="1"/>
-- 
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