diff options
author | Daniel Friesel <derf@finalrewind.org> | 2018-12-11 10:09:37 +0100 |
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committer | Daniel Friesel <derf@finalrewind.org> | 2018-12-11 10:09:37 +0100 |
commit | c1027b36455cf47d336d42e2e42a63f096f7e772 (patch) | |
tree | 8d4590b6493c73ab9f85d78a9aa384495e103e7b /src/arch/msp430fr5994lp/driver/cpufreq.cc | |
parent | 00205e4996df209dc43664af7c171d34c2e97cda (diff) |
New architecture: msp430fr5994lp (MSP430FR5994 Launchpad)
Almost exclusively copypasted from msp430fr5969lp.
May be replaced by symlinks later on.
Diffstat (limited to 'src/arch/msp430fr5994lp/driver/cpufreq.cc')
-rw-r--r-- | src/arch/msp430fr5994lp/driver/cpufreq.cc | 24 |
1 files changed, 24 insertions, 0 deletions
diff --git a/src/arch/msp430fr5994lp/driver/cpufreq.cc b/src/arch/msp430fr5994lp/driver/cpufreq.cc new file mode 100644 index 0000000..55a74b5 --- /dev/null +++ b/src/arch/msp430fr5994lp/driver/cpufreq.cc @@ -0,0 +1,24 @@ +void CPUFreq::set(unsigned int freq_khz) +{ + /* + * Note: arch drivers assume SMCLK freq == F_CPU + */ + + if (freq_khz == 16000) { + FRCTL0 = FWPW; // unlock FRAM Control + FRCTL0_L = 0x10; // one wait state before FRAM access (required for 8MHz < F_CPU <= 16 MHz) + FRCTL0_H = 0xff; // lock FRAM control by writing an invalid password + } + + CSCTL0_H = CSKEY >> 8; + if (freq_khz == 16000) { + CSCTL1 = DCORSEL | DCOFSEL_4; + } else if (freq_khz == 8000) { + CSCTL1 = DCOFSEL_6; + } else if (freq_khz == 4000) { + CSCTL1 = DCOFSEL_3; + } else if (freq_khz == 1000) { + CSCTL1 = DCOFSEL_0; + } + CSCTL0_H = 0; +} |