diff options
author | Daniel Friesel <daniel.friesel@uos.de> | 2020-12-11 15:21:03 +0100 |
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committer | Daniel Friesel <daniel.friesel@uos.de> | 2020-12-11 15:21:03 +0100 |
commit | e502c75971ddfd03864b12225bb5387afad6e36b (patch) | |
tree | 0ea7200f48d7ce0f95650e804a16bca23867ebdf /src/arch/msp430fr5994lp/driver/stdout.cc | |
parent | 3d3ce8f8a1e15c5555d7fd117d91b65cc08edb0a (diff) |
msp430fR5994lp: configurable uart baud rate
Diffstat (limited to 'src/arch/msp430fr5994lp/driver/stdout.cc')
-rw-r--r-- | src/arch/msp430fr5994lp/driver/stdout.cc | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/src/arch/msp430fr5994lp/driver/stdout.cc b/src/arch/msp430fr5994lp/driver/stdout.cc index 9bd196f..eaa59f8 100644 --- a/src/arch/msp430fr5994lp/driver/stdout.cc +++ b/src/arch/msp430fr5994lp/driver/stdout.cc @@ -17,34 +17,38 @@ void StandardOutput::setup() { UCA0CTLW0 |= UCSWRST; -#if F_CPU == 16000000UL - // 16M / 115200 == 138.88889 -> UCOS16 = 1, UCBR0 = 16, UCBRF0 = 10, UCBRS0 = 0xf7 ("0.8751") +#if F_CPU == 16000000UL && F_UART == 115200UL + // 16M / 115200 == 138.88889 -> UCOS16 = 1, UCBR0 = 16, UCBRF0 = 10, UCBRS0 = 0xf7 ("0.8751"). -0.32% / 0.32% TX error UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = UCOS16 | (10<<4) | 0xF700; UCA0BR0 = 8; -#elif F_CPU == 8000000UL - // 8M / 115200 == 69.444444 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 5, UCBRS0 = 0x55 ("0.4378") +#elif F_CPU == 8000000UL && F_UART == 115200UL + // 8M / 115200 == 69.444444 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 5, UCBRS0 = 0x55 ("0.4378"). -0.8% / 0.64% TX error UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = UCOS16 | (5<<4) | 0x5500; UCA0BR0 = 4; -#elif F_CPU == 4000000UL +#elif F_CPU == 8000000UL && F_UART == 9600UL + UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; + UCA0MCTLW = UCOS16 | (1<<4) | 0x4900; + UCA0BR0 = 52; +#elif F_CPU == 4000000UL && F_UART == 115200UL // 4M / 115200 == 34.722222 -> UCOS16 = 1, UCBR0 = 2, UCBRF0 = 2, UCBRS0 = 0xbb ("0.7147") UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = UCOS16 | (2<<4) | 0xbb00; UCA0BR0 = 2; -#elif F_CPU == 1000000UL +#elif F_CPU == 1000000UL && F_UART == 115200UL // 1M / 115200 == 8.6805556 -> UCOS16 = 0, UCBR0 = 8, UCBRF0 = 0, UCBRS0 = 0xd6 ("0.6667") UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x5500; UCA0BR0 = 8; -#elif F_CPU == 32768UL +#elif F_CPU == 32768UL && F_UART == 9600UL // Limited to 9600 Baud // 32768 / 9600 == 3.413333 -> UCOS16 = 0, UCBR0 = 3, UCBRF0 = 0, UCBRS0 = 0x92 ("0.4003") UCA0CTLW0 = UCSWRST | UCSSEL__SMCLK; UCA0MCTLW = 0x9200; UCA0BR0 = 3; #else -#error Unsupported F_CPU +#error Unsupported F_CPU and F_UART combination #endif UCA0IRCTL = 0; |