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authorDaniel Friesel <derf@finalrewind.org>2018-12-03 09:28:42 +0100
committerDaniel Friesel <derf@finalrewind.org>2018-12-03 09:28:42 +0100
commit4296f9a07853db15df717fce0310b0c7e5695d87 (patch)
treecc2d3233b1490a95c652620bfbc7bdc6854720bf /src
parentff2c23e32fc4fdf8427b712a056a9c05f44c76af (diff)
esp8266: Enable proper LTO and section GC
Diffstat (limited to 'src')
-rw-r--r--src/arch/esp8266/Makefile.inc5
1 files changed, 3 insertions, 2 deletions
diff --git a/src/arch/esp8266/Makefile.inc b/src/arch/esp8266/Makefile.inc
index 18547a6..6c55060 100644
--- a/src/arch/esp8266/Makefile.inc
+++ b/src/arch/esp8266/Makefile.inc
@@ -16,7 +16,7 @@ ifeq (${aspectc}, 1)
endif
INCLUDES += -I${SDK_BASE}/include
-COMMON_FLAGS += -nostdlib -mlongcalls -D__ets__ -DICACHE_FLASH -DMULTIPASS_ARCH_esp8266
+COMMON_FLAGS += -nostdlib -mlongcalls -flto -D__ets__ -DICACHE_FLASH -DMULTIPASS_ARCH_esp8266
CXXFLAGS = -std=c++11 -fno-rtti -fno-threadsafe-statics
LDFLAGS += -nostdlib -Wl,--no-check-sections -u call_user_start -Wl,-static
@@ -50,8 +50,9 @@ build/system.ar: ${OBJECTS}
build/system.elf: build/system.ar
${CC} -L${SDK_BASE}/lib -T${SDK_BASE}/lib/eagle.app.v6-derf.ld ${LDFLAGS} \
+ -Wl,--gc-sections \
-Wl,--start-group -lc -lgcc -lhal -lpp -lphy -lnet80211 -llwip -lwpa \
- -lmain -flto $< -Wl,--end-group -o $@
+ -lmain $< -Wl,--end-group -o $@
build/0x00000.bin: build/system.elf
${ESPTOOL} --chip esp8266 elf2image -o build/ $<