blob: 8ff93eec08172374357d578211048ecec11d5322 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
|
/*
* Copyright 2020 Daniel Friesel
*
* SPDX-License-Identifier: BSD-2-Clause
*/
#include "arch.h"
#include <avr/io.h>
#include <avr/interrupt.h>
#include <avr/wdt.h>
#include <util/delay.h>
void Arch::setup(void)
{
wdt_disable();
#if F_CPU == 16000000UL
/* default */
#elif F_CPU == 8000000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS0);
#elif F_CPU == 4000000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS1);
#elif F_CPU == 2000000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS1) | _BV(CLKPS0);
#elif F_CPU == 1000000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS2);
#elif F_CPU == 500000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS2) | _BV(CLKPS0);
#elif F_CPU == 250000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS2) | _BV(CLKPS1);
#elif F_CPU == 125000UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS2) | _BV(CLKPS1) | _BV(CLKPS0);
#elif F_CPU == 62500UL
CLKPR = _BV(CLKPCE);
CLKPR = _BV(CLKPS3);
#else
#error Unsupported F_CPU
#endif
#if defined(WITH_LOOP) || defined(TIMER_S)
TCCR1A = 0;
TCCR1B = _BV(WGM12) | _BV(CS12) | _BV(CS10); // /1024
OCR1A = F_CPU / 1024;
TIMSK1 = _BV(OCIE1A);
#endif
#ifdef TIMER_US
#if F_CPU != 16000000UL
#error TIMER_US is only supported with F_CPU = 16MHz
#endif
// 16MHz/8 -> 2MHz timer
TCCR2A = 0;
TCCR2B = _BV(CS21);
#endif
sei();
}
#ifdef WITH_WAKEUP
void wakeup();
#endif
#if defined(WITH_LOOP) || defined(TIMER_S)
#include "driver/uptime.h"
#endif
#if defined(WITH_LOOP)
extern void loop();
volatile char run_loop = 0;
#endif
void Arch::idle_loop(void)
{
while (1) {
SMCR = _BV(SE);
asm("sleep");
SMCR = 0;
asm("wdr");
#ifdef WITH_LOOP
if (run_loop) {
loop();
run_loop = 0;
}
#endif
#ifdef WITH_WAKEUP
wakeup();
#endif
}
}
void Arch::idle(void)
{
SMCR = _BV(SE);
asm("sleep");
SMCR = 0;
asm("wdr");
}
void Arch::delay_us(unsigned int const us)
{
for (unsigned int i = 0; i < us; i++) {
_delay_us(1);
}
}
void Arch::delay_ms(unsigned int const ms)
{
for (unsigned int i = 0; i < ms; i++) {
_delay_ms(1);
}
}
Arch arch;
#if defined(WITH_LOOP) || defined(TIMER_S)
#ifndef __acweaving
ISR(TIMER1_COMPA_vect)
{
#ifdef WITH_LOOP
run_loop = 1;
#endif
#ifdef TIMER_S
uptime.tick_s();
#endif
}
#endif
#endif
|
