diff options
| author | Daniel Friesel <derf@finalrewind.org> | 2021-09-23 22:22:47 +0200 |
|---|---|---|
| committer | Daniel Friesel <derf@finalrewind.org> | 2021-09-23 22:22:47 +0200 |
| commit | 8578e1ea7d078b60864b084094dbb02b6cac99c3 (patch) | |
| tree | 19a02eef376f5b89c7044c48dcc0c0f43ea9d416 | |
| parent | 30a29dcd0d064ab8403a9afb32c59800bb346840 (diff) | |
Import partially adapted MCCI LoRaWAN LMIC library. Needs further work.
61 files changed, 16787 insertions, 499 deletions
diff --git a/src/app/lora32u4ii/Makefile.inc b/src/app/lora32u4ii/Makefile.inc index c201be2..f0ff22f 100644 --- a/src/app/lora32u4ii/Makefile.inc +++ b/src/app/lora32u4ii/Makefile.inc @@ -7,3 +7,18 @@ ifdef app loop = 1 endif + +COMMON_FLAGS += -Isrc/lib/MCCI_LoRaWAN_LMIC_library/src + +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu868.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_channelshuffle.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/radio.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/lmic.c +C_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/other.c + +CXX_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.cc +CXX_TARGETS += src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/ideetron/AES-128_V10.cc diff --git a/src/app/lora32u4ii/main.cc b/src/app/lora32u4ii/main.cc index b44652b..bb7cdae 100644 --- a/src/app/lora32u4ii/main.cc +++ b/src/app/lora32u4ii/main.cc @@ -8,16 +8,33 @@ #include "driver/stdout.h" #include "driver/uptime.h" #include "driver/adc.h" -#include "driver/spi.h" + +/* + * Work in progress! Joining is sometimes successful, but that's about it. + * TX with user-defined payloads after joining doesn't appear to work yet. + */ #define CFG_eu868 1 #define CFG_sx1276_radio 1 +#define DISABLE_LMIC_FAILURE_TO + +#include <lmic.h> +#include <hal/hal.h> + +static const u1_t PROGMEM APPEUI[8]={ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +void os_getArtEui (u1_t* buf) { memcpy_P(buf, APPEUI, 8);} -#include "radio.h" -#include "oslmic.h" +static const u1_t PROGMEM DEVEUI[8]={ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +void os_getDevEui (u1_t* buf) { memcpy_P(buf, DEVEUI, 8);} -unsigned char txbuf[4]; -unsigned char rxbuf[4]; +static const u1_t PROGMEM APPKEY[16] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }; +void os_getDevKey (u1_t* buf) { memcpy_P(buf, APPKEY, 16);} + +// Schedule TX every this many seconds (might become longer due to duty +// cycle limitations). +const unsigned TX_INTERVAL = 10; + +bool joined = false; // DIYMall BSFrance LoRa32u4 II v1.3 // See also: arduino packages/adafruit/hardware/avr/1.4.13/variants/feather32u4/pins_arduino.h @@ -25,95 +42,128 @@ unsigned char rxbuf[4]; // PB0 is also the !SS pin, so it must be configured as output in order to use SPI. // PB5 "D9" <- Vbat/2 via voltage divider. Appears to also have a connection to the user LED // PC7 "D13" -> User LED -const GPIO::Pin rstpin = GPIO::pd4; // "D4" -> RST -const GPIO::Pin cspin = GPIO::pb4; // "D8" -> NSS -const GPIO::Pin dio0pin = GPIO::pe6; // "D7" <- DIO0 / IRQ -const GPIO::Pin dio1pin = GPIO::pc6; // "D5" <- DIO1 - -static void writeReg (u1_t addr, u1_t data) { - txbuf[0] = addr | 0x80; - txbuf[1] = data; - gpio.write(cspin, 0); - spi.xmit(2, txbuf, 0, rxbuf); - gpio.write(cspin, 1); -} - -static u1_t readReg (u1_t addr) { - txbuf[0] = addr & 0x7f; - gpio.write(cspin, 0); - spi.xmit(1, txbuf, 2, rxbuf); - gpio.write(cspin, 1); - return rxbuf[1]; -} -/* -static void writeBuf (u1_t addr, xref2u1_t buf, u1_t len) { - txbuf[0] = addr | 0x80; - for (uint8_t i = 0; i < len; i++) { - txbuf[i+1] = buf[i]; +const lmic_pinmap lmic_pins = { + .nss = GPIO::pb4, + .rxtx = LMIC_UNUSED_PIN, + .rst = GPIO::pd4, + .dio = {GPIO::pe6, GPIO::pc6, LMIC_UNUSED_PIN}, +}; + +static osjob_t sendjob; + +void do_send(osjob_t* j){ + uint16_t bat = adc.getVBat_mV(false); + + // Check if there is not a current TX/RX job running + if (LMIC.opmode & OP_TXRXPEND) { + kout.pprint(PSTR("OP_TXRXPEND\n")); + } else { + // Prepare upstream data transmission at the next possible time. + LMIC_setTxData2(1, (uint8_t *)&bat, sizeof(bat), 0); + kout.pprint(PSTR("Packet queued\n")); } - spi.xmit(len+1, txbuf, 0, rxbuf); + // Next TX is scheduled after TX_COMPLETE event. } -static void readBuf (u1_t addr, xref2u1_t buf, u1_t len) { - txbuf[0] = addr & 0x7f; - spi.xmit(1, txbuf, len, buf); -} -*/ +void do_sleep(){ + kout.pprint(PSTR("naptime\n")); -static void writeOpmode(u1_t mode) { - u1_t const maskedMode = mode & OPMODE_MASK; - writeReg(RegOpMode, mode); + for(int i=0; i<75; i++){ + arch.idle(); + } } -static void opmode (u1_t mode) { - writeOpmode((readReg(RegOpMode) & ~OPMODE_MASK) | mode); -} - - - -bool radio_init() -{ - // requestModuleActive(1); not required for sx yadayada - gpio.output(cspin, 1); -#ifdef CFG_sx1276_radio - gpio.output(rstpin, 0); -#else - gpio.output(rstpin, 1); -#endif - arch.delay_ms(1); - gpio.input(rstpin); - gpio.write(rstpin, 0); // disable pull-up - arch.delay_ms(5); - opmode(OPMODE_SLEEP); - - u1_t v = readReg(RegVersion); -#ifdef CFG_sx1276_radio - if(v != 0x12 ) { - kout << "Radio version mismatch: expected " << hex << 0x12 << ", got " << v << endl; - return false; - } -#elif CFG_sx1272_radio - if(v != 0x22) { - kout << "Radio version mismatch: expected " << hex << 0x22 << ", got " << v << endl; - return false; - } -#else -#error Missing CFG_sx1272_radio/CFG_sx1276_radio -#endif - return true; +void onEvent (ev_t ev) { + switch(ev) { + case EV_SCAN_TIMEOUT: + kout.pprint(PSTR("EV_SCAN_TIMEOUT\n")); + break; + case EV_JOINING: + kout.pprint(PSTR("EV_JOINING\n")); + break; + case EV_JOINED: + kout.pprint(PSTR("EV_JOINED\n")); + #if 1 + { + u4_t netid = 0; + devaddr_t devaddr = 0; + u1_t nwkKey[16]; + u1_t artKey[16]; + LMIC_getSessionKeys(&netid, &devaddr, nwkKey, artKey); + kout.pprint(PSTR("netid: ")); + kout << dec << netid << endl; + kout.pprint(PSTR("devaddr: ")); + kout << hex << devaddr << endl; + //Serial.print(PSTR("AppSKey: ")); + for (size_t i=0; i<sizeof(artKey); ++i) { + if (i != 0) { + //Serial.print(PSTR("-")); + } + //printHex2(artKey[i]); + } + kout.pprint(PSTR("")); + //Serial.print(PSTR("NwkSKey: ")); + for (size_t i=0; i<sizeof(nwkKey); ++i) { + if (i != 0) { + //Serial.print("-"); + } + //printHex2(nwkKey[i]); + } + kout << endl; + } + #endif + joined = true; + break; + case EV_JOIN_FAILED: + kout.pprint(PSTR("EV_JOIN_FAILED\n")); + break; + case EV_TXCOMPLETE: + kout.pprint(PSTR("EV_TXCOMPLETE (includes waiting for RX windows)\n")); + // Schedule next transmission + if (joined) { + do_sleep(); + do_send(&sendjob); + } else { + os_setTimedCallback(&sendjob, os_getTime()+sec2osticks(TX_INTERVAL), do_send); + } + break; + case EV_RESET: + kout.pprint(PSTR("EV_RESET\n")); + break; + case EV_RXCOMPLETE: + // data received in ping slot + kout.pprint(PSTR("EV_RXCOMPLETE\n")); + break; + case EV_LINK_DEAD: + kout.pprint(PSTR("EV_LINK_DEAD\n")); + break; + case EV_LINK_ALIVE: + kout.pprint(PSTR("EV_LINK_ALIVE\n")); + break; + case EV_TXSTART: + kout.pprint(PSTR("EV_TXSTART\n")); + break; + case EV_TXCANCELED: + kout.pprint(PSTR("EV_TXCANCELED\n")); + break; + case EV_RXSTART: + /* do not print anything -- it wrecks timing */ + break; + case EV_JOIN_TXCOMPLETE: + kout.pprint(PSTR("EV_JOIN_TXCOMPLETE: no JoinAccept\n")); + break; + + default: + kout.pprint(PSTR("Unknown event: ")); + kout << (unsigned) ev; + break; + } } void loop(void) { - //gpio.led_toggle(1); -#ifdef TIMER_S - kout << dec << uptime.get_s() << endl; -#else - kout << "beep boop" << endl; -#endif - kout << "VCC = " << adc.getVCC_mV() << " mV" << endl; - kout << "Vbat = " << adc.getVBat_mV(false) << " mV" << endl; - gpio.led_toggle(0); + os_runloop_once(); + gpio.led_toggle(); } int main(void) @@ -121,14 +171,22 @@ int main(void) arch.setup(); gpio.setup(); kout.setup(); - spi.setup(); gpio.input(GPIO::pb5); + gpio.led_on(); - radio_init(); + kout.pprint(PSTR("Hello, World!\n")); + kout.pprint(PSTR("Test, World!\n")); - kout << "Hello, World!" << endl; - kout << "Test, World!" << endl; + os_init(); + LMIC_reset(); + LMIC_setClockError(MAX_CLOCK_ERROR * 20 / 100); + LMIC_setAdrMode(0); + do_send(&sendjob); + while (1) { + os_runloop_once(); + gpio.led_toggle(); + } arch.idle_loop(); return 0; diff --git a/src/app/lora32u4ii/oslmic.h b/src/app/lora32u4ii/oslmic.h deleted file mode 100644 index 8cdb91b..0000000 --- a/src/app/lora32u4ii/oslmic.h +++ /dev/null @@ -1,42 +0,0 @@ -#pragma once -/* - * Copyright (c) 2014-2016 IBM Corporation. - * Copyright (c) 2018, 2019 MCCI Corporation - * Copyright (c) 2021 Daniel Friesel - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of the <organization> nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include <stdint.h> -typedef uint8_t bit_t; -typedef uint8_t u1_t; -typedef int8_t s1_t; -typedef uint16_t u2_t; -typedef int16_t s2_t; -typedef uint32_t u4_t; -typedef int32_t s4_t; -typedef unsigned int uint; -typedef const char* str_t; - - diff --git a/src/app/lora32u4ii/radio.h b/src/app/lora32u4ii/radio.h deleted file mode 100644 index bc65405..0000000 --- a/src/app/lora32u4ii/radio.h +++ /dev/null @@ -1,369 +0,0 @@ -#pragma once -/* - * Copyright (c) 2014-2016 IBM Corporation. - * Copyright (c) 2016-2019 MCCI Corporation. - * All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions are met: - * * Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * * Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * * Neither the name of the <organization> nor the - * names of its contributors may be used to endorse or promote products - * derived from this software without specific prior written permission. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND - * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED - * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE - * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY - * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES - * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; - * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT - * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -// ---------------------------------------- -// Registers Mapping -// // -type- 1272 vs 1276 -#define RegFifo 0x00 // common -#define RegOpMode 0x01 // common see below -#define FSKRegBitrateMsb 0x02 // - -#define FSKRegBitrateLsb 0x03 // - -#define FSKRegFdevMsb 0x04 // - -#define FSKRegFdevLsb 0x05 // - -#define RegFrfMsb 0x06 // common FSK: 1272: 915; 1276: 434 MHz -#define RegFrfMid 0x07 // common ditto -#define RegFrfLsb 0x08 // common ditto -#define RegPaConfig 0x09 // common see below, many diffs -#define RegPaRamp 0x0A // common see below: bits 6..4 are diff -#define RegOcp 0x0B // common - -#define RegLna 0x0C // common bits 4..0 are diff. -#define FSKRegRxConfig 0x0D // - -#define LORARegFifoAddrPtr 0x0D -#define FSKRegRssiConfig 0x0E // - -#define LORARegFifoTxBaseAddr 0x0E -#define FSKRegRssiCollision 0x0F // - -#define LORARegFifoRxBaseAddr 0x0F -#define FSKRegRssiThresh 0x10 // - -#define LORARegFifoRxCurrentAddr 0x10 -#define FSKRegRssiValue 0x11 // - -#define LORARegIrqFlagsMask 0x11 -#define FSKRegRxBw 0x12 // - -#define LORARegIrqFlags 0x12 -#define FSKRegAfcBw 0x13 // - -#define LORARegRxNbBytes 0x13 -#define FSKRegOokPeak 0x14 // - -#define LORARegRxHeaderCntValueMsb 0x14 -#define FSKRegOokFix 0x15 // - -#define LORARegRxHeaderCntValueLsb 0x15 -#define FSKRegOokAvg 0x16 // - -#define LORARegRxPacketCntValueMsb 0x16 -#define LORARegRxpacketCntValueLsb 0x17 -#define LORARegModemStat 0x18 -#define LORARegPktSnrValue 0x19 -#define FSKRegAfcFei 0x1A // - -#define LORARegPktRssiValue 0x1A -#define FSKRegAfcMsb 0x1B // - -#define LORARegRssiValue 0x1B -#define FSKRegAfcLsb 0x1C // - -#define LORARegHopChannel 0x1C -#define FSKRegFeiMsb 0x1D // - -#define LORARegModemConfig1 0x1D -#define FSKRegFeiLsb 0x1E // - -#define LORARegModemConfig2 0x1E -#define FSKRegPreambleDetect 0x1F // - -#define LORARegSymbTimeoutLsb 0x1F -#define FSKRegRxTimeout1 0x20 // - -#define LORARegPreambleMsb 0x20 -#define FSKRegRxTimeout2 0x21 // - -#define LORARegPreambleLsb 0x21 -#define FSKRegRxTimeout3 0x22 // - -#define LORARegPayloadLength 0x22 -#define FSKRegRxDelay 0x23 // - -#define LORARegPayloadMaxLength 0x23 -#define FSKRegOsc 0x24 // - -#define LORARegHopPeriod 0x24 -#define FSKRegPreambleMsb 0x25 // - -#define LORARegFifoRxByteAddr 0x25 -#define FSKRegPreambleLsb 0x26 // - -#define LORARegModemConfig3 0x26 -#define FSKRegSyncConfig 0x27 // - -#define LORARegFeiMsb 0x28 -#define FSKRegSyncValue1 0x28 // - -#define LORAFeiMib 0x29 -#define FSKRegSyncValue2 0x29 // - -#define LORARegFeiLsb 0x2A -#define FSKRegSyncValue3 0x2A // - -#define FSKRegSyncValue4 0x2B // - -#define LORARegRssiWideband 0x2C -#define FSKRegSyncValue5 0x2C // - -#define FSKRegSyncValue6 0x2D // - -#define FSKRegSyncValue7 0x2E // - -#define FSKRegSyncValue8 0x2F // - -#define LORARegIffReq1 0x2F -#define FSKRegPacketConfig1 0x30 // - -#define LORARegIffReq2 0x30 -#define FSKRegPacketConfig2 0x31 // - -#define LORARegDetectOptimize 0x31 -#define FSKRegPayloadLength 0x32 // - -#define FSKRegNodeAdrs 0x33 // - -#define LORARegInvertIQ 0x33 -#define FSKRegBroadcastAdrs 0x34 // - -#define FSKRegFifoThresh 0x35 // - -#define FSKRegSeqConfig1 0x36 // - -#define LORARegHighBwOptimize1 0x36 -#define FSKRegSeqConfig2 0x37 // - -#define LORARegDetectionThreshold 0x37 -#define FSKRegTimerResol 0x38 // - -#define FSKRegTimer1Coef 0x39 // - -#define LORARegSyncWord 0x39 -#define FSKRegTimer2Coef 0x3A // - -#define LORARegHighBwOptimize2 0x3A -#define FSKRegImageCal 0x3B // - -#define FSKRegTemp 0x3C // - -#define FSKRegLowBat 0x3D // - -#define FSKRegIrqFlags1 0x3E // - -#define FSKRegIrqFlags2 0x3F // - -#define RegDioMapping1 0x40 // common -#define RegDioMapping2 0x41 // common -#define RegVersion 0x42 // common -// #define RegAgcRef 0x43 // common -// #define RegAgcThresh1 0x44 // common -// #define RegAgcThresh2 0x45 // common -// #define RegAgcThresh3 0x46 // common -// #define RegPllHop 0x4B // common -// #define RegTcxo 0x58 // common -// #define RegPll 0x5C // common -// #define RegPllLowPn 0x5E // common -// #define RegFormerTemp 0x6C // common -// #define RegBitRateFrac 0x70 // common - -#if defined(CFG_sx1276_radio) -#define RegTcxo 0x4B // common different addresses, same bits -#define RegPaDac 0x4D // common differnet addresses, same bits -#elif defined(CFG_sx1272_radio) -#define RegTcxo 0x58 // common -#define RegPaDac 0x5A // common -#endif - -#define RegTcxo_TcxoInputOn (1u << 4) - -// ---------------------------------------- -// spread factors and mode for RegModemConfig2 -#define SX1272_MC2_FSK 0x00 -#define SX1272_MC2_SF7 0x70 -#define SX1272_MC2_SF8 0x80 -#define SX1272_MC2_SF9 0x90 -#define SX1272_MC2_SF10 0xA0 -#define SX1272_MC2_SF11 0xB0 -#define SX1272_MC2_SF12 0xC0 -// bandwidth for RegModemConfig1 -#define SX1272_MC1_BW_125 0x00 -#define SX1272_MC1_BW_250 0x40 -#define SX1272_MC1_BW_500 0x80 -// coding rate for RegModemConfig1 -#define SX1272_MC1_CR_4_5 0x08 -#define SX1272_MC1_CR_4_6 0x10 -#define SX1272_MC1_CR_4_7 0x18 -#define SX1272_MC1_CR_4_8 0x20 -#define SX1272_MC1_IMPLICIT_HEADER_MODE_ON 0x04 // required for receive -#define SX1272_MC1_RX_PAYLOAD_CRCON 0x02 -#define SX1272_MC1_LOW_DATA_RATE_OPTIMIZE 0x01 // mandated for SF11 and SF12 -// transmit power configuration for RegPaConfig -#define SX1272_PAC_PA_SELECT_PA_BOOST 0x80 -#define SX1272_PAC_PA_SELECT_RFIO_PIN 0x00 - - -// sx1276 RegModemConfig1 -#define SX1276_MC1_BW_125 0x70 -#define SX1276_MC1_BW_250 0x80 -#define SX1276_MC1_BW_500 0x90 -#define SX1276_MC1_CR_4_5 0x02 -#define SX1276_MC1_CR_4_6 0x04 -#define SX1276_MC1_CR_4_7 0x06 -#define SX1276_MC1_CR_4_8 0x08 - -#define SX1276_MC1_IMPLICIT_HEADER_MODE_ON 0x01 - -#ifdef CFG_sx1276_radio -# define SX127X_MC1_IMPLICIT_HEADER_MODE_ON SX1276_MC1_IMPLICIT_HEADER_MODE_ON -#else -# define SX127X_MC1_IMPLICIT_HEADER_MODE_ON SX1272_MC1_IMPLICIT_HEADER_MODE_ON -#endif - -// transmit power configuration for RegPaConfig -#define SX1276_PAC_PA_SELECT_PA_BOOST 0x80 -#define SX1276_PAC_PA_SELECT_RFIO_PIN 0x00 -#define SX1276_PAC_MAX_POWER_MASK 0x70 - -// the bits to change for max power. -#define SX127X_PADAC_POWER_MASK 0x07 -#define SX127X_PADAC_POWER_NORMAL 0x04 -#define SX127X_PADAC_POWER_20dBm 0x07 - -// convert milliamperes to equivalent value for -// RegOcp; delivers conservative value. -#define SX127X_OCP_MAtoBITS(mA) \ - ((mA) < 45 ? 0 : \ - (mA) <= 120 ? ((mA) - 45) / 5 : \ - (mA) < 130 ? 0xF : \ - (mA) < 240 ? ((mA) - 130) / 10 + 0x10 : \ - 27) - -// bit in RegOcp that enables overcurrent protect. -#define SX127X_OCP_ENA 0x20 - -// sx1276 RegModemConfig2 -#define SX1276_MC2_RX_PAYLOAD_CRCON 0x04 - -// sx1276 RegModemConfig3 -#define SX1276_MC3_LOW_DATA_RATE_OPTIMIZE 0x08 -#define SX1276_MC3_AGCAUTO 0x04 - -// preamble for lora networks (nibbles swapped) -#define LORA_MAC_PREAMBLE 0x34 - -#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG1 0x0A -#ifdef CFG_sx1276_radio -#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG2 0x70 -#elif CFG_sx1272_radio -#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG2 0x74 -#endif - -//----------------------------------------- -// Parameters for RSSI monitoring -#define SX127X_FREQ_LF_MAX 525000000 // per datasheet 6.3 - -// per datasheet 5.5.3 and 5.5.5: -#define SX1272_RSSI_ADJUST -139 // add to rssi value to get dB (LF) - -// per datasheet 5.5.3 and 5.5.5: -#define SX1276_RSSI_ADJUST_LF -164 // add to rssi value to get dB (LF) -#define SX1276_RSSI_ADJUST_HF -157 // add to rssi value to get dB (HF) - -#ifdef CFG_sx1276_radio -# define SX127X_RSSI_ADJUST_LF SX1276_RSSI_ADJUST_LF -# define SX127X_RSSI_ADJUST_HF SX1276_RSSI_ADJUST_HF -#else -# define SX127X_RSSI_ADJUST_LF SX1272_RSSI_ADJUST -# define SX127X_RSSI_ADJUST_HF SX1272_RSSI_ADJUST -#endif - -// per datasheet 2.5.2 (but note that we ought to ask Semtech to confirm, because -// datasheet is unclear). -#define SX127X_RX_POWER_UP us2osticks(500) // delay this long to let the receiver power up. - -// ---------------------------------------- -// Constants for radio registers -#define OPMODE_LORA 0x80 -#define OPMODE_MASK 0x07 -#define OPMODE_SLEEP 0x00 -#define OPMODE_STANDBY 0x01 -#define OPMODE_FSTX 0x02 -#define OPMODE_TX 0x03 -#define OPMODE_FSRX 0x04 -#define OPMODE_RX 0x05 -#define OPMODE_RX_SINGLE 0x06 -#define OPMODE_CAD 0x07 - -// ---------------------------------------- -// FSK opmode bits -// bits 6:5 are the same for 1272 and 1276 -#define OPMODE_FSK_SX127x_ModulationType_FSK (0u << 5) -#define OPMODE_FSK_SX127x_ModulationType_OOK (1u << 5) -#define OPMODE_FSK_SX127x_ModulationType_MASK (3u << 5) - -// bits 4:3 are different for 1272 -#define OPMODE_FSK_SX1272_ModulationShaping_FSK_None (0u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT1_0 (1u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_5 (2u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_3 (3u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_OOK_None (0u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_OOK_BR (1u << 3) -#define OPMODE_FSK_SX1272_ModulationShaping_OOK_2BR (2u << 3) - -#define OPMODE_FSK_SX1272_ModulationShaping_MASK (3u << 3) - -// SX1276 -#define OPMODE_FSK_SX1276_LowFrequencyModeOn (1u << 3) - -// define the opmode bits apporpriate for the 127x in use. -#if defined(CFG_sx1272_radio) -# define OPMODE_FSK_SX127X_SETUP (OPMODE_FSK_SX127x_ModulationType_FSK | \ - OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_5) -#elif defined(CFG_sx1276_radio) -# define OPMODE_FSK_SX127X_SETUP (OPMODE_FSK_SX127x_ModulationType_FSK) -#endif - -// ---------------------------------------- -// LoRa opmode bits -#define OPMODE_LORA_SX127x_AccessSharedReg (1u << 6) -#define OPMODE_LORA_SX1276_LowFrequencyModeOn (1u << 3) - -// ---------------------------------------- -// Bits masking the corresponding IRQs from the radio -#define IRQ_LORA_RXTOUT_MASK 0x80 -#define IRQ_LORA_RXDONE_MASK 0x40 -#define IRQ_LORA_CRCERR_MASK 0x20 -#define IRQ_LORA_HEADER_MASK 0x10 -#define IRQ_LORA_TXDONE_MASK 0x08 -#define IRQ_LORA_CDDONE_MASK 0x04 -#define IRQ_LORA_FHSSCH_MASK 0x02 -#define IRQ_LORA_CDDETD_MASK 0x01 - -#define IRQ_FSK1_MODEREADY_MASK 0x80 -#define IRQ_FSK1_RXREADY_MASK 0x40 -#define IRQ_FSK1_TXREADY_MASK 0x20 -#define IRQ_FSK1_PLLLOCK_MASK 0x10 -#define IRQ_FSK1_RSSI_MASK 0x08 -#define IRQ_FSK1_TIMEOUT_MASK 0x04 -#define IRQ_FSK1_PREAMBLEDETECT_MASK 0x02 -#define IRQ_FSK1_SYNCADDRESSMATCH_MASK 0x01 -#define IRQ_FSK2_FIFOFULL_MASK 0x80 -#define IRQ_FSK2_FIFOEMPTY_MASK 0x40 -#define IRQ_FSK2_FIFOLEVEL_MASK 0x20 -#define IRQ_FSK2_FIFOOVERRUN_MASK 0x10 -#define IRQ_FSK2_PACKETSENT_MASK 0x08 -#define IRQ_FSK2_PAYLOADREADY_MASK 0x04 -#define IRQ_FSK2_CRCOK_MASK 0x02 -#define IRQ_FSK2_LOWBAT_MASK 0x01 - -// ---------------------------------------- -// DIO function mappings D0D1D2D3 -#define MAP_DIO0_LORA_RXDONE 0x00 // 00------ -#define MAP_DIO0_LORA_TXDONE 0x40 // 01------ -#define MAP_DIO1_LORA_RXTOUT 0x00 // --00---- -#define MAP_DIO1_LORA_NOP 0x30 // --11---- -#define MAP_DIO2_LORA_NOP 0x0C // ----11-- - -#define MAP_DIO0_FSK_READY 0x00 // 00------ (packet sent / payload ready) -#define MAP_DIO1_FSK_NOP 0x30 // --11---- -#define MAP_DIO2_FSK_TXNOP 0x04 // ----01-- -#define MAP_DIO2_FSK_TIMEOUT 0x08 // ----10-- - - -// FSK IMAGECAL defines -#define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F -#define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80 -#define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default - -#define RF_IMAGECAL_IMAGECAL_MASK 0xBF -#define RF_IMAGECAL_IMAGECAL_START 0x40 - -#define RF_IMAGECAL_IMAGECAL_RUNNING 0x20 -#define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default - -// LNA gain constant. Bits 4..0 have different meaning for 1272 and 1276, but -// by chance, the bit patterns we use are the same. -#ifdef CFG_sx1276_radio -#define LNA_RX_GAIN (0x20|0x3) -#elif CFG_sx1272_radio -#define LNA_RX_GAIN (0x20|0x03) -#else -#error Missing CFG_sx1272_radio/CFG_sx1276_radio -#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/HOWTO-ADD-REGION.md b/src/lib/MCCI_LoRaWAN_LMIC_library/HOWTO-ADD-REGION.md new file mode 100644 index 0000000..97327a0 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/HOWTO-ADD-REGION.md @@ -0,0 +1,135 @@ +# Adding a new region to Arduino LMIC + +This variant of the Arduino LMIC code supports adding additional regions beyond the eu868 and us915 bands supported by the original IBM LMIC 1.6 code. + +This document outlines how to add a new region. + +<!-- + This TOC uses the VS Code markdown TOC extension AlanWalk.markdown-toc. + We strongly recommend updating using VS Code, the markdown-toc extension and the + bierner.markdown-preview-github-styles extension. Note that if you are using + VS Code 1.29 and Markdown TOC 1.5.6, https://github.com/AlanWalk/markdown-toc/issues/65 + applies -- you must change your line-ending to some non-auto value in Settings> + Text Editor>Files. `\n` works for me. +--> +<!-- markdownlint-disable MD033 MD004 --> +<!-- markdownlint-capture --> +<!-- markdownlint-disable --> +<!-- TOC depthFrom:2 updateOnSave:true --> + +- [Planning](#planning) + - [Determine the region/region category](#determine-the-regionregion-category) + - [Check whether the region is already listed in `lmic_config_preconditions.h`](#check-whether-the-region-is-already-listed-in-lmic_config_preconditionsh) +- [Make the appropriate changes in `lmic_config_preconditions.h`](#make-the-appropriate-changes-in-lmic_config_preconditionsh) +- [Document your region in `README.md`](#document-your-region-in-readmemd) +- [Add the definitions for your region in `lorabase.h`](#add-the-definitions-for-your-region-in-lorabaseh) +- [Edit `lmic_bandplan.h`](#edit-lmic_bandplanh) +- [Create <code>lmic_<em>newregion</em>.c</code>](#create-codelmic_emnewregionemccode) +- [General Discussion](#general-discussion) +- [Adding the region to the Arduino_LoRaWAN library](#adding-the-region-to-the-arduino_lorawan-library) + +<!-- /TOC --> +<!-- markdownlint-restore --> +<!-- Due to a bug in Markdown TOC, the table is formatted incorrectly if tab indentation is set other than 4. Due to another bug, this comment must be *after* the TOC entry. --> + +## Planning + +### Determine the region/region category + +Compare the target region (in the LoRaWAN regional specification) to the EU868 and US915 regions. There are three possibilities. + +1. The region is like the EU region. There are a limited number of channels (up to 8), and only a small number of channels are used for OTAA join operations. The response masks refer to individual channels, and the JOIN-response can send frequencies of specific channels to be added. + +2. The region is like the US region. There are many channels (the US has 64) with fixed frequencies, and the channel masks refer to subsets of the fixed channels. + +3. The region is not really like either the EU or US. At the moment, it seems that CN470-510MHz (section 2.6 of LoRaWAN Regional Parameters spec V1.0.2rB) falls into this category. + +Band plans in categories (1) and (2) are easily supported. Band plans in category (3) are not supported by the current code. + +### Check whether the region is already listed in `lmic_config_preconditions.h` + +Check `src/lmic/lmic_config_preconditions.h` and scan the `LMIC_REGION_...` definitions. The numeric values are assigned based on the subchapter in section 2 of the LoRaWAN 1.0.2 Regional Parameters document. If your symbol is already there, then the first part of adaptation has already been done. There will already be a corresponding `CFG_...` symbol. But if your region isn't supported, you'll need to add it here. + +- `LMIC_REGION_myregion` must be a distinct integer, and must be less than 32 (so as to fit into a bitmask) + +## Make the appropriate changes in `lmic_config_preconditions.h` + +- `LMIC_REGION_SUPPORTED` is a bit mask of all regions supported by the code. Your new region must appear in this list. +- `CFG_LMIC_REGION_MASK` is a bit mask that, when expanded, returns a bitmask for each defined `CFG_...` variable. You must add your `CFG_myregion` symbol to this list. +- `CFG_region` evaluates to the `LMIC_REGION_...` value for the selected region (as long as only one region is selected). The header files check for this, so you don't have to. +- `CFG_LMIC_EU_like_MASK` is a bitmask of regions that are EU-like, and `CFG_LMIC_US_like_MASK` is a bitmask of regions that are US-like. Add your region to the appropriate one of these two variables. + +## Document your region in `README.md` + +You'll see where the regions are listed. Add yours. + +## Add the definitions for your region in `lorabase.h` + +- If your region is EU like, copy the EU block. Document any duty-cycle limitations. +- if your region is US like, copy the US block. +- As appropriate, copy `lorabase_eu868.h` or `lorabase_us915.h` to make your own <code>lorabase_<em>newregion</em>.h</code>. Fill in the symbols. + +At time of writing, you need to duplicate some code to copy some settings from `lorabase_eu868.h` or `lorabase_us915.h` to the new file; and you need to put some region-specific knowledge into the `lorabase.h` header file. The long-term direction is to put all the regional knowledge into the region-specific header, and then the central code will just copy. The architectural impulse is that we'll want to be able to reuse the regional header files in other contexts. On the other hand, because it's error prone, we don't want to `#include` files that aren't being used; otherwise you could accidentally use EU parameters in US code, etc. + +- Now's a good time to test-compile and clean out errors introduced. Make sure you set the region to your new target region. You'll have problems compiling, but they should look like this: + + ```console + lmic.c:29: In file included from + + lmic_bandplan.h: 52:3: error: #error "LMICbandplan_maxFrameLen() not defined by bandplan" + # error "LMICbandplan_maxFrameLen() not defined by bandplan" + + lmic_bandplan.h: 56:3: error: #error "pow2dBm() not defined by bandplan" + # error "pow2dBm() not defined by bandplan" + ``` + +- If using an MCCI BSP, you might want to edit your local copy of `boards.txt` to add the new region. + +- If using an MCCI BSP, you should definitely edit the template files to add the new region to the list. + +- Modify the `.travis.yml` file to test the new region. + +## Edit `lmic_bandplan.h` + +The next step is to add the region-specific interfaces for your region. + +Do this by editing `lmic_bandplan.h` and adding the appropriate call to a (new) region-specific file `lmic_bandplan_myregion.h`, where "myregion" is the abbreviation for your region. + +Then, if your region is eu868-like, copy `lmic_bandplan_eu868.h` to create your new region-specific header file; otherwise copy `lmic_bandplan_us915.h`. + +Edit the file. + +Try to compile again; you should now get link errors related to your new band-plan, like this: + +```console +c:\tmp\buildfolder\libraries\arduino-lmic\lmic\lmic.c.o: In function `lowerDR': + +C:\Users\tmm\Documents\Arduino\libraries\arduino-lmic\src\lmic/lorabase.h:667: undefined reference to `constant_table__DR2RPS_CRC' +``` + +## Create <code>lmic_<em>newregion</em>.c</code> + +Once again, you will start by copying either `lmic_eu868.c` or `lmic_us915.c` to create your new file. Then touch it up as necessary. + +## General Discussion + +- You'll find it easier to do the test compiles using the example scripts in this directory, rather than trying to get all the Catena framework going too. On the other hand, working with the Catena framework will expose more problems. + +- Don't forget to check and update the examples. + +- You will also need to update the `boards.template` file for MCCI BSPs, in order to get the region to show up in the Arduino IDE menu. + +- You will need to update the [`arduino-lorawan`](https://github.com/mcci-catena/arduino-lorawan) library to include support for the new region. (See [below](#adding-the-region-to-the-arduino_lorawan-library) for instructions.) + +- Please increase the version of `arduino-lmic` (symbol `ARDUINO_LMIC_VERSION` in `src/lmic/lmic.h`), and change `arduino-lorawan`'s `Arduino_LoRaWAN_lmic.h` to check for at least that newer version. + +- Please also increase the version of the `arduino-lorawan` library (symbol `ARDUINO_LORAWAN_VERSION`). + +## Adding the region to the Arduino_LoRaWAN library + +In `Arduino_LoRaWAN_ttn.h`: + +- Add a new class with name `Arduino_LoRaWAN_ttn_myregion`, copied either from the `Arduino_LoRaWAN_ttn_eu868` class or the `Arduino_LoRaWAN_ttn_us915` class. +- Extend the list of `#if defined(CFG_eu868)` etc. to define `Arduino_LoRaWAN_REGION_TAG` to the suffix of your new class if `CFG_myregion` is defined. + +Then copy and edit either `ttn_eu868_netbegin.cpp`/`ttn_eu868_netjoin.cpp` or `ttn_us915_netbegin.cpp`/`ttn_us915_netjoin.cpp` to make your own file(s) for the key functions. diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/LICENSE b/src/lib/MCCI_LoRaWAN_LMIC_library/LICENSE new file mode 100644 index 0000000..c539505 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/LICENSE @@ -0,0 +1,23 @@ +MIT License + +Copyright (C) 2014-2016 IBM Corporation +Copyright (c) 2015 Thomas Telkamp and Matthijs Kooijman +Copyright (c) 2016-2021 MCCI Corporation + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/README.md b/src/lib/MCCI_LoRaWAN_LMIC_library/README.md new file mode 100644 index 0000000..74677a9 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/README.md @@ -0,0 +1,1375 @@ +# Multipass/Arduino LMIC library ("MCCI LoRaWAN LMIC Library") + +This directory contains the IBM LMIC (LoRaWAN-MAC-in-C) library, slightly +modified to run within Multipass environment, allowing using the SX1272, +SX1276 transceivers and compatible modules (such as some HopeRF RFM9x +modules and the Murata LoRa modules). Please refer to +[Arduino-LMIC](https://github.com/mcci-catena/arduino-lmic) for the Arduino +library and corresponding documentation. The remainder of this README is taken +as-is from the Arduino library. + +> Note on names: the library was originally ported to Arduino by Matthijs Kooijman and Thomas Telkamp, and was named Arduino LMIC. Subsequently, MCCI did a lot of work to support other regions, and ultimately took over maintenance. The Arduino IDE doesn't like two libraries with the same name, so we had to come up with a new name. So in the IDE, it will appear as MCCI LoRaWAN LMIC Library; but all us know it by the primary header file, which is `<arduino_lmic.h>`. + +Information about the LoRaWAN protocol is summarized in [LoRaWAN-at-a-glance](doc/LoRaWAN-at-a-glance.pdf). Full information is available from the [LoRa Alliance](https://lora-alliance.org). + +A support forum is available at [forum.mcci.io](https://forum.mcci.io/c/device-software/arduino-lmic/5). + +The base Arduino library mostly exposes the functions defined by LMIC. It makes no +attempt to wrap them in a higher level API that is more in the Arduino +style. To find out how to use the library itself, see the examples, or +see the PDF files in the doc subdirectory. + +A separate library, [MCCI `arduino-lorawan`](https://github.com/mcci-catena/arduino-lorawan), provides a higher level, more Arduino-like wrapper which may be useful. + +The examples in this library (apart from the compliance sketch) are somewhat primitive. A very complete cross-platform Arduino application based on the LMIC has been published by Leonel Lopes Parente ([`@lnlp`](https://github.com/lnlp)) as [LMIC-node](https://github.com/lnlp/LMIC-node). That application specifically targets The Things Network. + +Although the wrappers in this library are designed to make the LMIC useful in the Arduino environment, the maintainers have tried to be careful to keep the core LMIC code generally useful. For example, I use this library without modification (but with wrappers) on a RISC-V platform in a non-Arduino environment. + +[](https://github.com/mcci-catena/arduino-lmic/releases/latest) [](https://github.com/mcci-catena/arduino-lmic/compare/v4.0.0...master) [](https://github.com/mcci-catena/arduino-lmic/actions) + +**Contents:** + +<!-- + This TOC uses the VS Code markdown TOC extension AlanWalk.markdown-toc. + We strongly recommend updating using VS Code, the markdown-toc extension and the + bierner.markdown-preview-github-styles extension. Note that if you are using + VS Code 1.29 and Markdown TOC 1.5.6, https://github.com/AlanWalk/markdown-toc/issues/65 + applies -- you must change your line-ending to some non-auto value in Settings> + Text Editor>Files. `\n` works for me. +--> +<!-- markdownlint-disable MD033 MD004 --> +<!-- markdownlint-capture --> +<!-- markdownlint-disable --> +<!-- TOC depthFrom:2 updateOnSave:true --> + +- [Installing](#installing) +- [Getting Help](#getting-help) + - [If it's not working](#if-its-not-working) + - [If you've found a bug](#if-youve-found-a-bug) +- [Features](#features) +- [Additional Documentation](#additional-documentation) + - [PDF/Word Documentation](#pdfword-documentation) + - [Adding Regions](#adding-regions) + - [Known bugs and issues](#known-bugs-and-issues) + - [Timing Issues](#timing-issues) + - [Working with MCCI Murata-based boards](#working-with-mcci-murata-based-boards) + - [Event-Handling Issues](#event-handling-issues) +- [Configuration](#configuration) + - [Selecting the LoRaWAN Version](#selecting-the-lorawan-version) + - [Selecting V1.0.2](#selecting-v102) + - [Selecting V1.0.3](#selecting-v103) + - [Selecting the LoRaWAN Region Configuration](#selecting-the-lorawan-region-configuration) + - [eu868, as923, in866, kr920](#eu868-as923-in866-kr920) + - [us915, au915](#us915-au915) + - [Selecting the target radio transceiver](#selecting-the-target-radio-transceiver) + - [Controlling use of interrupts](#controlling-use-of-interrupts) + - [Disabling PING](#disabling-ping) + - [Disabling Beacons](#disabling-beacons) + - [Enabling Network Time Support](#enabling-network-time-support) + - [Rarely changed variables](#rarely-changed-variables) + - [Changing debug output](#changing-debug-output) + - [Getting debug from the RF library](#getting-debug-from-the-rf-library) + - [Selecting the AES library](#selecting-the-aes-library) + - [Defining the OS Tick Frequency](#defining-the-os-tick-frequency) + - [Setting the SPI-bus frequency](#setting-the-spi-bus-frequency) + - [Changing handling of runtime assertion failures](#changing-handling-of-runtime-assertion-failures) + - [Disabling JOIN](#disabling-join) + - [Disabling Class A MAC commands](#disabling-class-a-mac-commands) + - [Disabling Class B MAC commands](#disabling-class-b-mac-commands) + - [Disabling user events](#disabling-user-events) + - [Disabling external reference to `onEvent()`](#disabling-external-reference-to-onevent) + - [Enabling long messages](#enabling-long-messages) + - [Enabling LMIC event logging calls](#enabling-lmic-event-logging-calls) + - [Special purpose](#special-purpose) +- [Supported hardware](#supported-hardware) +- [Pre-Integrated Boards](#pre-integrated-boards) +- [PlatformIO](#platformio) +- [Manual configuration](#manual-configuration) + - [Power](#power) + - [SPI](#spi) + - [DIO pins](#dio-pins) + - [Reset](#reset) + - [RXTX](#rxtx) + - [RXTX Polarity](#rxtx-polarity) + - [Pin mapping](#pin-mapping) + - [Advanced initialization](#advanced-initialization) + - [HalConfiguration_t methods](#halconfiguration_t-methods) + - [LoRa Nexus by Ideetron](#lora-nexus-by-ideetron) +- [Example Sketches](#example-sketches) +- [Timing](#timing) + - [Controlling protocol timing](#controlling-protocol-timing) + - [`LMIC_setClockError()`](#lmic_setclockerror) + - [Interrupts and Arduino system timing](#interrupts-and-arduino-system-timing) +- [Downlink data rate](#downlink-data-rate) +- [Encoding Utilities](#encoding-utilities) + - [sflt16](#sflt16) + - [JavaScript decoder](#javascript-decoder) + - [uflt16](#uflt16) + - [uflt16 JavaScript decoder](#uflt16-javascript-decoder) + - [sflt12](#sflt12) + - [sflt12f JavaScript decoder](#sflt12f-javascript-decoder) + - [uflt12](#uflt12) + - [uflt12f JavaScript decoder](#uflt12f-javascript-decoder) +- [Release History](#release-history) +- [Contributions](#contributions) +- [Trademark Acknowledgements](#trademark-acknowledgements) +- [License](#license) + - [Support Open Source Hardware and Software](#support-open-source-hardware-and-software) + +<!-- /TOC --> +<!-- markdownlint-restore --> +<!-- Due to a bug in Markdown TOC, the table is formatted incorrectly if tab indentation is set other than 4. Due to another bug, this comment must be *after* the TOC entry. --> + +## Installing + +To install this library: + +- install it using the Arduino Library manager ("Sketch" -> "Include + Library" -> "Manage Libraries..."), or +- download a zip file from GitHub using the "Download ZIP" button and + install it using the IDE ("Sketch" -> "Include Library" -> "Add .ZIP + Library..." +- clone this git repository into your sketchbook/libraries folder. + +For more info, see [https://www.arduino.cc/en/Guide/Libraries](https://www.arduino.cc/en/Guide/Libraries). + +## Getting Help + +### If it's not working + +Ask questions at [`forum.mcci.io`](https://forum.mcci.io/c/device-software/arduino-lmic/5). Wireless is tricky, so don't be afraid to ask. The LMIC has been used successfully in a lot of applications, but it's common to have problems getting it working. To keep the code size down, there are not a lot of debugging features, and the features are not always easy to use. + +### If you've found a bug + +Raise a GitHub issue at [`github.com/mcci-catena/arduino-lmic`](https://github.com/mcci-catena/arduino-lmic/issues/). + +## Features + +The LMIC library provides a fairly complete LoRaWAN Class A and Class B +implementation, supporting the EU-868, US-915, AU-921, AS-923, and IN-866 bands. Only a limited +number of features was tested using this port on Arduino hardware, so be careful when using any of the untested features. + +The library has only been tested with LoRaWAN 1.0.2/1.03 networks and does not have the separated key structure defined by LoRaWAN 1.1. + +What certainly works: + +- Sending packets uplink, taking into account duty cycling. +- Encryption and message integrity checking. +- Custom frequencies and data rate settings. +- Over-the-air activation (OTAA / joining). +- Receiving downlink packets in the RX1 and RX2 windows. +- MAC command processing. + +What has not been tested: + +- Class B operation. +- FSK has not been extensively tested. (Testing with the RedwoodComm RWC5020A analyzer in 2019 indicated that FSK downlink is stable but not reliable. This prevents successful completion of LoRaWAN pre-certification in regions that require support for FSK.) + +If you try one of these untested features and it works, be sure to let +us know (creating a GitHub issue is probably the best way for that). + +## Additional Documentation + +### PDF/Word Documentation + +The `doc` directory contains [LMIC-v3.3.0.pdf](doc/LMIC-v3.3.0.pdf), which documents the library APIs and use. It's based on the original IBM documentation, but has been adapted for this version of the library. However, as this library is used for more than Arduino, that document is supplemented by practical details in this document. + +### Adding Regions + +There is a general framework for adding support for a new region. [HOWTO-ADD-REGION.md](./HOWTO-ADD-REGION.md) has step-by-step instructions for adding a region. + +### Known bugs and issues + +See the list of bugs at [`mcci-catena/arduino-lmic`](https://github.com/mcci-catena/arduino-lmic/issues). + +#### Timing Issues + +The LoRaWAN technology for class A devices requires devices to meet hard real-time deadlines. The Arduino environment doesn't provide built-in support for this, and this port of the LMIC doesn't really ensure it, either. It is your responsibility, when constructing your application, to ensure that you call `os_runloop_once()` "often enough". + +How often is often enough? + +It depends on what the LMIC is doing. For Class A devices, when the LMIC is idle, `os_runloop_once()` need not be called at all. However, during a message transmit, it's critical to ensure that `os_runloop_once()` is called frequently prior to hard deadlines. The API `os_queryTimeCriticalJobs()` can be used to check whether there are any deadlines due soon. Before doing work that takes `n` milliseconds, call `os_queryTimeCriticalJobs(ms2osticks(n))`, and skip the work if the API indicates that the LMIC needs attention. + +However, in the current implementation, the LMIC is tracking the completion of uplink transmits. This is done by checking for transmit-complete indications, which is done by polling. So you must also continually call `os_runloop_once()` while waiting for a transmit to be completed. This is an area for future improvement. + +#### Working with MCCI Murata-based boards + +The Board Support Package V2.5.0 for the MCCI Murata-based boards ([MCCI Catena 4610](https://mcci.io/catena4610), [MCCI Catena 4612](https://mcci.io/catena4612), etc.) has a defect in clock calibration that prevents the compliance script from being used without modification. Versions V2.6.0 and later solve this issue. + +#### Event-Handling Issues + +The LMIC has a simple event notification system. When an interesting event occurs, it calls a user-provided function. + +This function is sometimes called at time critical moments. + +This means that your event function should avoid doing any time-critical work. + +Furthermore, in versions of the LMIC prior to v3.0.99.3, the event function may be called in situations where it's not safe to call the general LMIC APIs. In those older LMIC versions, please be careful to defer all work from your event function to your `loop()` function. See the compliance example sketch for an elaborate version of how this can be done. + +## Configuration + +A number of features can be enabled or disabled at compile time. +This is done by adding the desired settings to the file +`project_config/lmic_project_config.h`. The `project_config` +directory is the only directory that contains files that you +should edit to match your project; we organize things this way +so that your local changes are more clearly separated from +the distribution files. The Arduino environment doesn't give +us a better way to do this, unless you change `BOARDS.txt`. + +Unlike other ports of the LMIC code, in this port, you should not edit `src/lmic/config.h` to configure this package. The intention is that you'll edit the `project_config/lmic_project_config.h` (if using the Arduino environment), or change compiler command-line input (if using PlatformIO, make, etc.). + +The following configuration variables are available. + +### Selecting the LoRaWAN Version + +This library implements V1.0.3 of the LoRaWAN specification. However, it can also be used with V1.0.2. The only significant change when selecting V1.0.2 is that the US accepted power range in MAC commands is 10 dBm to 30 dBm; whereas in V1.0.3 the accepted range 2 dBm to 30 dBm. + +The default LoRaWAN version, if no version is explicitly selected, is V1.0.3. + +`LMIC_LORAWAN_SPEC_VERSION` is defined as an integer reflecting the targeted spec version; it will be set to `LMIC_LORAWAN_SPEC_VERSION_1_0_2` or `LMIC_LORAWAN_SPEC_VERSION_1_0_3`. Arithmetic comparisons can be done on these version numbers: and we guarantee `LMIC_LORAWAN_SPEC_VERSION_1_0_3 > LMIC_LORAWAN_SPEC_VERSION_1_0_2`, but the details of the how the versions are encoded may change, and your code should not rely upon the details. + +#### Selecting V1.0.2 + +In `project_config/lmic_project_config.h`, add: + +```c +#define LMIC_LORAWAN_SPEC_VERSION LMIC_LORAWAN_SPEC_VERSION_1_0_2 +``` + +On your compiler command line, add: + +```shell +-D LMIC_LORAWAN_SPEC_VERSION=LMIC_LORAWAN_SPEC_VERSION_1_0_2 +``` + +#### Selecting V1.0.3 + +In `project_config/lmic_project_config.h`, add: + +```c +#define LMIC_LORAWAN_SPEC_VERSION LMIC_LORAWAN_SPEC_VERSION_1_0_3 +``` + +On your compiler command line, add: + +```shell +-D LMIC_LORAWAN_SPEC_VERSION=LMIC_LORAWAN_SPEC_VERSION_1_0_3 +``` + +This is the default. + +### Selecting the LoRaWAN Region Configuration + +The library supports the following regions: + +`-D` variable | CFG region name | CFG region value | LoRaWAN Regional Spec 1.0.3 Reference| Frequency +------------|-----------------|:----------------:|:-------------------:|-------- +`-D CFG_eu868` | `LMIC_REGION_eu868` | 1 | 2.2 | EU 863-870 MHz ISM +`-D CFG_us915` | `LMIC_REGION_us915` | 2 | 2.3 | US 902-928 MHz ISM +`-D CFG_au915` | `LMIC_REGION_au915` | 5 | 2.6 | Australia 915-928 MHz ISM +`-D CFG_as923` | `LMIC_REGION_as923` | 7 | 2.8 | Asia 923 MHz ISM +`-D CFG_as923jp` | `LMIC_REGION_as923` and `LMIC_COUNTRY_CODE_JP` | 7 | 2.8 | Asia 923 MHz ISM with Japan listen-before-talk (LBT) rules +`-D CFG_kr920` | `LMIC_REGION_kr920` | 8 | 2.9 | Korea 920-923 MHz ISM +`-D CFG_in866` | `LMIC_REGION_in866` | 9 | 2.10 | India 865-867 MHz ISM + +The library requires that the compile environment or the project config file define exactly one of `CFG_...` variables. As released, `project_config/lmic_project_config.h` defines `CFG_us915`. If you build with PlatformIO or other environments, and you do not provide a pointer to the platform config file, `src/lmic/config.h` will define `CFG_eu868`. + +MCCI BSPs add menu entries to the Arduino IDE so you can select the target region interactively. + +The library changes configuration pretty substantially according to the region selected, and this affects the symbols in-scope in your sketches and `.cpp` files. Some of the differences are listed below. This list is not comprehensive, and is subject to change in future major releases. + +#### eu868, as923, in866, kr920 + +If the library is configured for EU868, AS923, or IN866 operation, we make +the following changes: + +- Add the API `LMIC_setupBand()`. +- Add the constants `MAX_CHANNELS`, `MAX_BANDS`, `LIMIT_CHANNELS`, `BAND_MILLI`, +`BAND_CENTI`, `BAND_DECI`, and `BAND_AUX`. + +#### us915, au915 + +If the library is configured for US915 operation, we make the following changes: + +- Add the APIs `LMIC_enableChannel()`, +`LMIC_enableSubBand()`, `LMIC_disableSubBand()`, and `LMIC_selectSubBand()`. +- Add a number of additional `DR_...` symbols. + +### Selecting the target radio transceiver + +You should define one of the following variables. If you don't, the library assumes +sx1276. There is a runtime check to make sure the actual transceiver matches the library +configuration. + +`#define CFG_sx1272_radio 1` + +Configures the library for use with an sx1272 transceiver. + +`#define CFG_sx1276_radio 1` + +Configures the library for use with an sx1276 transceiver. + +### Controlling use of interrupts + +`#define LMIC_USE_INTERRUPTS` + +If defined, configures the library to use interrupts for detecting events from the transceiver. If left undefined, the library will poll for events from the transceiver. See [Timing](#timing) for more info. Be aware that interrupts are not tested or supported on many platforms. + +### Disabling PING + +`#define DISABLE_PING` + +If defined, removes all code needed for Class B downlink during ping slots (PING). Removes the APIs `LMIC_setPingable()` and `LMIC_stopPingable()`. +Class A devices don't support PING, so defining `DISABLE_PING` is often a good idea. + +By default, PING support is included in the library. + +### Disabling Beacons + +`#define DISABLE_BEACONS` + +If defined, removes all code needed for handling beacons. Removes the APIs `LMIC_enableTracking()` and `LMIC_disableTracking()`. + +Enabling beacon handling allows tracking of network time, and is required if you want to enable downlink during ping slots. However, many networks don't support Class B devices. Class A devices don't support tracking beacons, so defining `DISABLE_BEACONS` might be a good idea. + +By default, beacon support is included in the library. + +### Enabling Network Time Support + +`#define LMIC_ENABLE_DeviceTimeReq number /* boolean: 0 or non-zero */` + +Disable or enable support for device network-time requests (LoRaWAN MAC request 0x0D). If zero, support is disabled. If non-zero, support is enabled. + +If disabled, stub routines are provided that will return failure (so you don't need conditional compiles in client code). + +### Rarely changed variables + +The remaining variables are rarely used, but we list them here for completeness. + +#### Changing debug output + +`#define LMIC_PRINTF_TO SerialLikeObject` + +This variable should be set to the name of a `Serial`-like object (any subclass of Arduino's `Print` class), used for printing messages. If this variable is set, any calls to the standard `printf` function (or more generally all writes to the global `stdout` file descriptor) will redirected to the specified stream. + +When this is not defined, `printf` and `stdout` are untouched and their behavior might vary among boards (and could print to somewhere, but also throw away output or crash). So *if* you want to use `printf` or `LMIC_DEBUG_LEVEL`, make sure to also define this. + +#### Getting debug from the RF library + +`#define LMIC_DEBUG_LEVEL number /* 0, 1, or 2 */` + +This variable determines the amount of debug output to be produced by the library. The default is `0`. + +If `LMIC_DEBUG_LEVEL` is zero, no output is produced. If `1`, limited output is produced. If `2`, more extensive output is produced. + +Note that debug output will influence the timing of various parts of the library and could introduce timing problems (especially in the RX window timing), so use it carefully. + +Debug output is generated using the standard `printf` function, so unless your environment already redirects `printf` / `stdout` somewhere, you should also configure `LIMC_PRINTF_TO`. + +#### Selecting the AES library + +The library comes with two AES implementations. The original implementation is better on +ARM processors because it's faster, but it's larger. For smaller AVR8 processors, a +second library ("IDEETRON") is provided that has a smaller code footprint. +You may define one of the following variables to choose the AES implementation. If you don't, +the library uses the IDEETRON version. + +`#define USE_ORIGINAL_AES` + +If defined, the original AES implementation is used. + +`#define USE_IDEETRON_AES` + +If defined, the IDEETRON AES implementation is used. + +#### Defining the OS Tick Frequency + +`#define US_PER_OSTICK_EXPONENT number` + +This variable should be set to the base-2 logarithm of the number of microseconds per OS tick. The default is 4, +which indicates that each tick corresponds to 16 microseconds (because 16 == 2^4). + +#### Setting the SPI-bus frequency + +`#define LMIC_SPI_FREQ floatNumber` + +This variable sets the default frequency for the SPI bus connection to the transceiver. The default is `1E6`, meaning 1 MHz. However, this can be overridden by the contents of the `lmic_pinmap` structure, and we recommend that you use that approach rather than editing the `project_config/lmic_project_config.h` file. + +#### Changing handling of runtime assertion failures + +The variables `LMIC_FAILURE_TO` and `DISABLE_LMIC_FAILURE_TO` +control the handling of runtime assertion failures. By default, assertion messages are displayed using +the `Serial` object. You can define LMIC_FAILURE_TO to be the name of some other `Print`-like object. You can +also define `DISABLE_LMIC_FAILURE_TO` to any value, in which case assert failures will silently halt execution. + +#### Disabling JOIN + +`#define DISABLE_JOIN` + +If defined, removes code needed for OTAA activation. Removes the APIs `LMIC_startJoining()` and `LMIC_tryRejoin()`. + +#### Disabling Class A MAC commands + +`DISABLE_MCMD_DutyCycleReq`, `DISABLE_MCMD_RXParamSetupReq`, `DISABLE_MCMD_RXTimingSetupReq`, `DISABLE_MCMD_NewChannelReq`, and `DISABLE_MCMD_DlChannelReq` respectively disable code for various Class A MAC commands. + +#### Disabling Class B MAC commands + +`DISABLE_MCMD_PingSlotChannelReq` disables the PING_SET MAC commands. It's implied by `DISABLE_PING`. + +`ENABLE_MCMD_BeaconTimingAns` enables the next-beacon start command. It's disabled by default, and overridden (if enabled) by `DISABLE_BEACON`. (This command is deprecated.) + +#### Disabling user events + +Code to handle registered callbacks for transmit, receive, and events can be suppressed by setting `LMIC_ENABLE_user_events` to zero. This C preprocessor macro is always defined as a post-condition of `#include "config.h"`; if non-zero, user events are supported, if zero, user events are not-supported. The default is to support user events. + +#### Disabling external reference to `onEvent()` + +In V3 of the LMIC, you do not need to define a function named `onEvent`. The LMIC will notice that there's no such function, and will suppress the call. However, be cautious -- in a large software package, `onEvent()` may be defined for some other purpose. The LMIC has no way of knowing that this is not the LMIC's `onEvent`, so it will call the function, and this may cause problems. + +All reference to `onEvent()` can be suppressed by setting `LMIC_ENABLE_onEvent` to 0. This C preprocessor macro is always defined as a post-condition of `#include "config.h"`; if non-zero, a weak reference to `onEvent()` will be used; if zero, the user `onEvent()` function is not supported, and the client must register an event handler explicitly. See the PDF documentation for details on `LMIC_registerEventCb()`. + +#### Enabling long messages + +By default, LMIC allows messages up to 255 bytes, as defined in the LoRaWAN standard and required by compliance testing. To save RAM for simple devices, this can be limited using the `LMIC_MAX_FRAME_LENGTH` macro. This macro defines the length of the full frame, the maximum payload size is a bit smaller (and can be read from the `MAX_LEN_PAYLOAD` constant). + +This value controls both the TX and RX buffers, so reducing it by 1 saves 2 bytes of RAM. The value should be not be set too small, since that can prevent properly receiving network downlinks (e.g. join accepts or MAC commands). Using `#define LMIC_MAX_FRAME_LENGTH 64` is common and should be big enough for most operation, while saving 384 bytes of RAM. + +Originally, this was configured using the `LMIC_ENABLE_long_messages` macro, which is still supported for compatibility. Setting `LMIC_ENABLE_long_messages` to 0 is equivalent to setting `LMIC_MAX_FRAME_LENGTH` to 64. + +#### Enabling LMIC event logging calls + +When debugging the LMIC, debug prints change timing, and can make things not work at all. The LMIC has embedded optional calls to capture debug information that can be printed out later, when the LMIC is not active. Logging is enabled by setting `LMIC_ENABLE_event_logging` to 1. The default is not to log. This C preprocessor macro is always defined as a post-condition of `#include "config.h"`. + +The compliance test script includes a suitable logging implementation; the other example scripts do not. + +#### Special purpose + +`#define DISABLE_INVERT_IQ_ON_RX` disables the inverted Q-I polarity on RX. **Use of this variable is deprecated, see issue [#250](https://github.com/mcci-catena/arduino-lmic/issues/250).** Rather than defining this, set the value of `LMIC.noRXIQinversion`. If set non-zero, receive will be non-inverted. End-devices will be able to receive messages from each other, but will not be able to hear the gateway (other than Class B beacons)aa. If set zero, (the default), end devices will only be able to hear gateways, not each other. + +## Supported hardware + +This library is intended to be used with plain LoRa transceivers, +connecting to them using SPI. In particular, the SX1272 and SX1276 +families are supported (which should include SX1273, SX1277, SX1278 and +SX1279 which only differ in the available frequencies, bandwidths and +spreading factors). It has been tested with both SX1272 and SX1276 +chips, using the Semtech SX1272 evaluation board and the HopeRF RFM92 +and RFM95 boards (which supposedly contain an SX1272 and SX1276 chip +respectively). + +This library contains a full LoRaWAN stack and is intended to drive +these Transceivers directly. It is *not* intended to be used with +full-stack devices like the Microchip RN2483 and the Embit LR1272E. +These contain a transceiver and microcontroller that implements the +LoRaWAN stack and exposes a high-level serial interface instead of the +low-level SPI transceiver interface. + +This library is intended to be used inside the Arduino environment. It +should be architecture-independent. Users have tested this on AVR, ARM, Xtensa-based, and RISC-V based system. + +This library can be quite heavy on small systems, especially if the fairly small ATmega +328p (such as in the Arduino Uno) is used. In the default configuration, +the available 32K flash space is nearly filled up (this includes some +debug output overhead, though). By disabling some features in `project_config/lmic_project_config.h` +(like beacon tracking and ping slots, which are not needed for Class A devices), +some space can be freed up. + +## Pre-Integrated Boards + +There are two ways of using this library, either with pre-integrated boards or with manually configured boards. + +The following boards are pre-integrated. + +- Adafruit [Feather 32u4 LoRa 900 MHz][1] (SX1276) +- Adafruit [Feather M0 LoRa 900 MHz][2] (SX1276) +- MCCI Catena 4410, 4420, [4450][3], [4460][4] and [4470][5] boards (based on Adafruit Feather boards plus wings) (SX1276) +- MCCI Catena 4551, [4610][6], 4611, [4612][7], 4617, [4618][7a], 4630, [4801][8] and 4802[12] boards (based on the Murata CMWX1ZZABZ-078 module) (SX1276) +- [TTGo LoRa32 V1][10] (based on the ESP32) +- [Heltec WiFi LoRa 32 V2][11] (based on the ESP32) + +[1]: https://www.adafruit.com/products/3078 +[2]: https://www.adafruit.com/products/3178 +[3]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/catena-4450-lorawan-iot-device +[4]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/catena-4460-sensor-wing-w-bme680 +[5]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/mcci-catena-4470-modbus-node-for-lorawan-technology +[6]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/mcci-catena-4610-integrated-node-for-lorawan-technology +[7]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/catena-4612-integrated-lorawan-node +[7a]: https://mcci.com/lorawan/products/catena-4618/ +[8]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/catena-4801 +[10]: https://makeradvisor.com/tools/ttgo-lora32-sx1276-esp32-oled/ +[11]: https://heltec.org/project/wifi-lora-32/ +[12]: https://store.mcci.com/collections/lorawan-iot-and-the-things-network/products/catena-4802 + +> To help you know if you have to worry, we'll call such boards "pre-integrated" and prefix each section with suitable guidance. + +## PlatformIO + +For use with PlatformIO, the `lmic_project_config.h` has to be disabled with the flag `ARDUINO_LMIC_PROJECT_CONFIG_H_SUPPRESS`. +The settings are defined in PlatformIO by `build_flags`. + +```ini +lib_deps = + MCCI LoRaWAN LMIC library + +build_flags = + -D ARDUINO_LMIC_PROJECT_CONFIG_H_SUPPRESS + -D CFG_eu868=1 + -D CFG_sx1276_radio=1 +``` + +## Manual configuration + +If your desired transceiver board is not pre-integrated, you need to provide the library with the required information. + +You may need to wire up your transceiver. The exact +connections are a bit dependent on the transceiver board and Arduino +used, so this section tries to explain what each connection is for and +in what cases it is (not) required. + +Note that the SX127x module runs at 3.3V and likely does not like 5V on +its pins (though the datasheet is not say anything about this, and my +transceiver did not obviously break after accidentally using 5V I/O for +a few hours). To be safe, make sure to use a level shifter, or an +Arduino running at 3.3V. The Semtech evaluation board has 100 ohm resistors in +series with all data lines that might prevent damage, but I would not +count on that. + +### Power + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +The SX127x transceivers need a supply voltage between 1.8V and 3.9V. +Using a 3.3V supply is typical. Some modules have a single power pin +(like the HopeRF modules, labeled 3.3V) but others expose multiple power +pins for different parts (like the Semtech evaluation board that has +`VDD_RF`, `VDD_ANA` and `VDD_FEM`), which can all be connected together. +Any *GND* pins need to be connected to the Arduino *GND* pin(s). + +### SPI + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +The primary way of communicating with the transceiver is through SPI +(Serial Peripheral Interface). This uses four pins: MOSI, MISO, SCK and +SS. The former three need to be directly connected: so MOSI to MOSI, +MISO to MISO, SCK to SCK. Where these pins are located on your Arduino +varies, see for example the "Connections" section of the [Arduino SPI +documentation](SPI). + +The SS (slave select) connection is a bit more flexible. On the SPI +slave side (the transceiver), this must be connect to the pin +(typically) labeled *NSS*. On the SPI master (Arduino) side, this pin +can connect to any I/O pin. Most Arduinos also have a pin labeled "SS", +but this is only relevant when the Arduino works as an SPI slave, which +is not the case here. Whatever pin you pick, you need to tell the +library what pin you used through the pin mapping (see [below](#pin-mapping)). + +[SPI]: https://www.arduino.cc/en/Reference/SPI + +### DIO pins + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +The DIO (digital I/O) pins on the SX127x can be configured +for various functions. The LMIC library uses them to get instant status +information from the transceiver. For example, when a LoRa transmission +starts, the DIO0 pin is configured as a TxDone output. When the +transmission is complete, the DIO0 pin is made high by the transceiver, +which can be detected by the LMIC library. + +The LMIC library needs only access to DIO0, DIO1 and DIO2, the other +DIOx pins can be left disconnected. On the Arduino side, they can +connect to any I/O pin. If interrupts are used, the accuracy of timing +will be improved, particularly the rest of your `loop()` function has +lengthy calculations; but in that case, the enabled DIO pins must all +support rising-edge interrupts. See the [Timing](#timing) section below. + +In LoRa mode the DIO pins are used as follows: + +* DIO0: TxDone and RxDone +* DIO1: RxTimeout + +In FSK mode they are used as follows:: + +* DIO0: PayloadReady and PacketSent +* DIO2: TimeOut + +Both modes need only 2 pins, but the transceiver does not allow mapping +them in such a way that all needed interrupts map to the same 2 pins. +So, if both LoRa and FSK modes are used, all three pins must be +connected. + +The pins used on the Arduino side should be configured in the pin +mapping in your sketch, by setting the values of `lmic_pinmap::dio[0]`, `[1]`, and `[2]` (see [below](#pin-mapping)). + +### Reset + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +The transceiver has a reset pin that can be used to explicitly reset +it. The LMIC library uses this to ensure the chip is in a consistent +state at startup. In practice, this pin can be left disconnected, since +the transceiver will already be in a sane state on power-on, but +connecting it might prevent problems in some cases. + +On the Arduino side, any I/O pin can be used. The pin number used must +be configured in the pin mapping `lmic_pinmap::rst` field (see [below](#pin-mapping)). + +### RXTX + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +The transceiver contains two separate antenna connections: One for RX +and one for TX. A typical transceiver board contains an antenna switch +chip, that allows switching a single antenna between these RX and TX +connections. Such a antenna switcher can typically be told what +position it should be through an input pin, often labeled *RXTX*. + +The easiest way to control the antenna switch is to use the *RXTX* pin +on the SX127x transceiver. This pin is automatically set high during TX +and low during RX. For example, the HopeRF boards seem to have this +connection in place, so they do not expose any *RXTX* pins and the pin +can be marked as unused in the pin mapping. + +Some boards do expose the antenna switcher pin, and sometimes also the +SX127x *RXTX* pin. For example, the SX1272 evaluation board calls the +former *FEM_CTX* and the latter *RXTX*. Again, simply connecting these +together with a jumper wire is the easiest solution. + +Alternatively, or if the SX127x *RXTX* pin is not available, LMIC can be +configured to control the antenna switch. Connect the antenna switch +control pin (e.g. *FEM_CTX* on the Semtech evaluation board) to any I/O +pin on the Arduino side, and configure the pin used in the pin map (see +[below](#pin-mapping)). + +The configuration entry `lmic_pinmap::rxtx` configures the pin to be used for the *RXTX* control function, in terms of the Arduino `wire.h` digital pin number. If set to `LMIC_UNUSED_PIN`, then the library assumes that software does not need to control the antenna switch. + +### RXTX Polarity + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +If an external switch is used, you also must specify the polarity. Some modules want *RXTX* to be high for transmit, low for receive; Others want it to be low for transmit, high for receive. The Murata module, for example, requires that *RXTX* be *high* for receive, *low* for transmit. + +The configuration entry `lmic_pinmap::rxtx_rx_active` should be set to the state to be written to the *RXTX* pin to make the receiver active. The opposite state is written to make the transmitter active. If `lmic_pinmap::rxtx` is `LMIC_UNUSED_PIN`, then the value of `lmic_pinmap::rxtx_rx_active` is ignored. + +### Pin mapping + +> If you're using a [pre-integrated board](#pre-integrated-boards), you can skip this section. + +Refer to the documentation on your board for the required settings. + +Remember, for pre-integrated boards, you don't worry about this. + +We have details for the following manually-configured boards here: + +- [LoRa Nexus by Ideetron](#lora-nexus-by-ideetron) + +If your board is not configured, you need at least to provide your own `lmic_pinmap`. As described above, a variety of configurations are possible. To tell the LMIC library how your board is configured, you must declare a variable containing a pin mapping struct in your sketch file. If you call `os_init()` to initialize the LMIC, you must name this structure `lmic_pins`. If you call `os_init_ex()`, you may name the structure what you like, but you pass a pointer as the parameter to `os_init_ex()`. + +Here's an example of a simple initialization: + +```c++ + lmic_pinmap lmic_pins = { + .nss = 6, + .rxtx = LMIC_UNUSED_PIN, + .rst = 5, + .dio = {2, 3, 4}, + // optional: set polarity of rxtx pin. + .rxtx_rx_active = 0, + // optional: set RSSI cal for listen-before-talk + // this value is in dB, and is added to RSSI + // measured prior to decision. + // Must include noise guardband! Ignored in US, + // EU, IN, other markets where LBT is not required. + .rssi_cal = 0, + // optional: override LMIC_SPI_FREQ if non-zero + .spi_freq = 0, + }; +``` + +The names refer to the pins on the transceiver side, the numbers refer +to the Arduino pin numbers (to use the analog pins, use constants like +`A0`). For the DIO pins, the three numbers refer to DIO0, DIO1 and DIO2 +respectively. Any pins that are not needed should be specified as +`LMIC_UNUSED_PIN`. The NSS and dio0 pins are required. The others can +potentially left out (depending on the environments and requirements, +see the notes above for when a pin can or cannot be left out). + +#### Advanced initialization + +In some boards require much more advanced management. The LMIC has a very flexible framework to support this, but it requires you to do some C++ work. + +1. You must define a new class derived from `Multipass_LMIC::HalConfiguration_t`. (We'll call this `cMyHalConfiguration_t`). + +2. This class *may* define overrides for several methods (discussed below). + +3. You must create an instance of your class, e.g. + + ```c++ + cMyHalConfiguration_t myHalConfigInstance; + ``` + +4. You add another entry in your `lmic_pinmap`, `pConfig = &myHalConfigInstance`, to link your pin-map to your object. + +The full example looks like this: + +```c++ +class cMyHlaConfiguration_t : public Multipass_LMIC::HalConfiguration_t + { +public: + // ... + // put your method function override declarations here. + + // this example uses RFO at 10 dBm or less, PA_BOOST up to 17 dBm, + // or the high-power mode above 17 dBm. In other words, it lets the + // LMIC-determined policy determine what's to be done. + + virutal TxPowerPolicy_t getTxPowerPolicy( + TxPowerPolicy_t policy, + int8_t requestedPower, + uint32_t frequency + ) override + { + return policy; + } + } +``` + +#### HalConfiguration_t methods + +- `ostime_t setModuleActive(bool state)` is called by the LMIC to make the module active or to deactivate it (the value of `state` is true to activate). The implementation must turn power to the module on and otherwise prepare for it to go to work, and must return the number of OS ticks to wait before starting to use the radio. + +- `void begin(void)` is called during initialization, and is your code's chance to do any early setup. + +- `void end(void)` is (to be) called during late shutdown. (Late shutdown is not implemented yet; but we wanted to add the API for consistency.) + +- `bool queryUsingTcxo(void)` shall return `true` if the module uses a TCXO; `false` otherwise. + +- `TxPowerPolicy_t getTxPowerPolicy(TxPowerPolicy_t policy, int8_t requestedPower, uint32_t frequency)` allows you to override the LMIC's selection of transmit power. If not provided, the default method forces the LMIC to use PA_BOOST mode. (We chose to do this because we found empirically that the Hope RF module doesn't support RFO, and because legacy LMIC code never used anything except PA_BOOST mode.) + +Caution: the LMIC has no way of knowing whether the mode you return makes sense. Use of 20 dBm mode without limiting duty cycle can over-stress your module. The LMIC currently does not have any code to duty-cycle US transmissions at 20 dBm. If properly limiting transmissions to 400 milliseconds, a 1% duty-cycle means at most one message every 40 seconds. This shouldn't be a problem in practice, but buggy upper level software still might do things more rapidly. + +<!-- there are links to the following section, so be careful when renaming --> +#### LoRa Nexus by Ideetron + +This board uses the following pin mapping: + +```c++ + const lmic_pinmap lmic_pins = { + .nss = 10, + .rxtx = LMIC_UNUSED_PIN, + .rst = LMIC_UNUSED_PIN, // hardwired to AtMega RESET + .dio = {4, 5, 7}, + }; +``` + +## Example Sketches + +This library provides several examples. + +- [`ttn-otaa.ino`](examples/ttn-otaa/ttn-otaa.ino) shows a basic transmission of a "Hello, world!" message + using the LoRaWAN protocol. It contains some frequency settings and + encryption keys intended for use with The Things Network, but these + also correspond to the default settings of most gateways, so it + should work with other networks and gateways as well. + The example uses over-the-air activation (OTAA) to first join the network to establish a + session and security keys. This was tested with The Things Network, + but should also work (perhaps with some changes) for other networks. + OTAA is the preferred way to work with production LoRaWAN networks. + +- [`ttn-otaa-feather-us915.ino`](examples/ttn-otaa-feather-us915/ttn-otaa-feather-us915.ino) is a version of `ttn-otaa.ino` that has + been configured for use with the Feather M0 LoRa, in the US915 region, + with The Things Network. Remember that you may also have to change `config.h` + from defaults. This sketch also works with the MCCI Catena family of products + as well as with the Feather 32u4 LoRa. + +- [`ttn-otaa-halconfig-us915.ino`](examples/ttn-otaa-halconfig-us915/ttn-otaa-halconfig-us915.ino) is a version of `ttn-otaa.ino` that uses the LMIC automatic configuration system, in the US915 region, + with The Things Network. Remember that you may also have to change `config.h` + from defaults. This sketch works with all the boards listed above under [Pre-Integrated Boards](#pre-integrated-boards). + +- [`ttn-otaa-feather-us915-dht22.ino`](examples/ttn-otaa-feather-us915-dht22/ttn-otaa-feather-us915-dht22.ino) + is a further refinement of `ttn-otaa-feather-us915.ino`. It measures and + transmits temperature and relative humidity using a DHT22 sensor. It's only + been tested with Feather M0-family products. + +- [`raw.ino`](examples/raw/raw.ino) shows how to access the radio on a somewhat low level, + and allows to send raw (non-LoRaWAN) packets between nodes directly. + This is useful to verify basic connectivity, and when no gateway is + available, but this example also bypasses duty cycle checks, so be + careful when changing the settings. + +- [`raw-feather.ino`](examples/raw-feather/raw-feather.ino) is a version of `raw.ino` that is completely configured + for the Adafruit [Feather M0 LoRa](https://www.adafruit.com/product/3178), and for a variety + of other MCCI products. + +- [`raw-halconfig.ino`](examples/raw-halconfig/raw-halconfig.ino) is like the other `raw` examples, but is most general. It's configured according to the LMIC's auto-configuration mechanism, and adapts according to the selected region. + +- [`ttn-abp.ino`](examples/ttn-abp/ttn-abp.ino) shows a basic transmission of a "Hello, world!" message + using the LoRaWAN protocol. This example + uses activation-by-personalization (ABP, preconfiguring a device + address and encryption keys), and does not employ over-the-air + activation. + + ABP should not be used if you have access to a production gateway and network; it's + not compliant with LoRaWAN standards, it's not FCC compliant, and it's uses spectrum + in a way that's unfair to other users. However, it's often the most economical way to + get your feet wet with this technology. It's possible to do ABP compliantly with the LMIC + framework, but you need to have FRAM storage and a framework that saves uplink and + downlink counts across reboots and resets. See, for example, + [Catena-Arduino-Platform](https://github.com/mcci-catena/Catena-Arduino-Platform). + +- [`ttn-abp-feather-us915-dht22.ino`](examples/ttn-abp-feather-us915-dht22/ttn-abp-feather-us915-dht22.ino) + refines `ttn-abp.ino` by configuring for use with the Feather M0 LoRa in the US915 region, + with a single-channel gateway on The Things Network; it measures and transmits temperature and relative + humidity using a DHT22 sensor. It's only been tested with Feather M0-family products. + + ABP should not be used if you have access to a production gateway and network; it's + not compliant with LoRaWAN standards, it's not FCC compliant, and it's uses spectrum + in a way that's unfair to other users. However, it's often the most economical way to + get your feet wet with this technology. It's possible to do ABP compliantly with the LMIC + framework, but you need to have FRAM storage and a framework that saves uplink and + downlink counts across reboots and resets. See, for example, + [Catena-Arduino-Platform](https://github.com/mcci-catena/Catena-Arduino-Platform). + +- [`header_test.ino`](examples/header_test/header_test.ino) just tests the header files; it's used for regression testing. + +- [`compliance-otaa-halconfig.ino`](examples/compliance-otaa-halconfig/compliance-otaa-halconfig.ino) is a test sketch that is used for LoRaWAN compliance testing. + +- [`helium-otaa.ino`](examples/helium-otaa/helium-otaa.ino) is a complete example for using the LMIC on the Helium network. It's very similar to the OTAA examples, but sets up the prejoin parameters properly for the initial deployment of Helium LoRaWAN support. + +- [`ttn-otaa-network-time.ino`](examples/ttn-otaa-network-time/ttn-otaa-network-time.ino) demonstrates use of the network time request. Network time requests are not supported by The Things Network as of the time of writing. + +## Timing + +The library is +responsible for keeping track of time of certain network events, and scheduling +other events relative to those events. For Class A uplink transmissions, the library must note +when a packet finishes transmitting, so it can open up the RX1 and RX2 +receive windows at a fixed time after the end of transmission. The library does this +by watching for rising edges on the DIO0 output of the SX127x, and noting the time. + +The library observes and processes rising edges on the pins as part of `os_runloop()` processing. +This can be configured in one of two ways (see +[Controlling use of interrupts](#controlling-use-of-interrupts)). See [Interrupts and Arduino system timing](#interrupts-and-arduino-system-timing) for implementation details. + +By default, the library +polls the enabled pins to determine whether an event has occurred. This approach +allows use of any CPU pin to sense the DIOs, and makes no assumptions about +interrupts. However, it means that the end-of-transmit event is not observed +(and time-stamped) until `os_runloop_once()` is called. + +Optionally, you can configure the LMIC library to use interrupts. The +interrupt handlers capture the time of +the event. Actual processing is done the next time that `os_runloop_once()` +is called, using the captured time. However, this requires that the +DIO pins be wired to Arduino pins that support rising-edge interrupts, +and it may require custom initialization code on your platform to +hook up the interrupts. + +### Controlling protocol timing + +The timing of end-of-transmit interrupts is used to determine when to open the downlink receive window. Because of the considerations above, some inaccuracy in the time stamp for the end-of-transmit interrupt is inevitable. + +Fortunately, the timing of the receive windows at the device need not be extremely accurate; the LMIC has to turn on the receiver early enough to capture a downlink +from the gateway and must leave the receiver on long enough to compensate for timing +errors due to various inaccuracies. To make it easier for the device to catch downlinks, the gateway first transmits a preamble consisting of 8 symbols. The SX127x receiver needs to see at least 4 symbols to detect a message. The Arduino LMIC tries to enable the receiver for 6 +symbol times slightly before the start of the receive window. + +The HAL bases all timing on the Arduino `micros()` timer, which has a platform-specific +granularity and accuracy, and is based on the primary microcontroller clock. + +If using an internal oscillator that is less than 100ppm accurate but better than 4000 ppm accurate, or if your other `loop()` processing +is time consuming, you can use [`LMIC_setClockError()`](#lmic_setclockerror) +to cause the library to leave the radio on longer. Note that for various reasons, it is not practical to set enormous clock errors. Oscillators that are 4000 ppm accurate or worse should be supplemented or disciplined with a better timing source. The LoRaWAN spec, for class B, implicitly assumes 100 ppm accuracy in the clock. + +Users of older versions of the library were advised to set large clock errors if they were experiencing timing problems. However, close analysis and debugging during the preparation of v3.1.0 of this library revealed that the real errors were in the timing calculations in the library. Once those were corrected, the need for large clock error settings was reduced. It's still possible to use large clock errors if needed, but this must be enabled via a compile time switch. + +An even more accurate solution could be to use a dedicated timer with an +input capture unit, that can store the timestamp of a change on the DIO0 +pin (the only one that is timing-critical) entirely in hardware. +Experience shows that this is not normally required, so we leave this as +a customization to be performed on a platform-by-platform basis. We provide +a special API, `radio_irq_handler_v2(u1_t dio, ostime_t tEvent)`. This +API allows you to supply a hardware-captured time for extra accuracy. + +The practical consequence of inaccurate timing is reduced battery life; +the LMIC must turn on the receiver earlier in order to be sure to capture downlink packets. However, this is a second order effect on class A devices; every receive is preceded by a transmit, which takes approximately ten times as much power per millisecond as a receive. + +### `LMIC_setClockError()` + +You may call this routine during initialization to inform the LMIC code about the timing accuracy of your system. + +```c++ +enum { MAX_CLOCK_ERROR = 65535 }; + +void LMIC_setClockError( + u2_t error +); +``` + +This function sets the anticipated relative clock error. `MAX_CLOCK_ERROR` +represents +/- 100%, and 0 represents no additional clock compensation. +To allow for an error of 20%, you would call + +```c++ +LMIC_setClockError(MAX_CLOCK_ERROR * 20 / 100); +``` + +Setting a high clock error causes the RX windows to be opened earlier than it otherwise would be. This causes more power to be consumed. For Class A devices, this extra power is not substantial, but for Class B devices, this can be significant. + +For a variety of reasons, the LMIC normally ignores clock errors greater than 4000 ppm (0.4%). The compile-time flag `LMIC_ENABLE_arbitrary_clock_error` can remove this limit. To do this, define it to a non-zero value. + +This clock error is not reset by `LMIC_reset()`. + +### Interrupts and Arduino system timing + +The IBM LMIC used as the basis for this code disables interrupts while the radio driver is active, to prevent reentrancy via `radio_irq_handler()` at unexpected moments. It uses `os_getTime()`, and assumes that `os_getTime()` still works when interrupts were disabled. This causes problems on Arduino platforms. Most board support packages use interrupts to advance `millis()` and `micros()`, and with these BSPs, `millis()` and `micros()` return incorrect values while interrupts are disabled. Although some BSPs (like the ones provided by MCCI) provide real time correctly while interrupts are disabled, this is not portable. It's not practical to make such changes in every BSP. + +To avoid this, the LMIC processes events in several steps; these steps ensure that `radio_irq_handler_v2()` is only called at predictable times. + +1. If interrupts are enabled via `LMIC_USE_INTERRUPTS`, hardware interrupts catch the time of the interrupt and record that the interrupt occurred. These routines rely on hardware edge-sensitive interrupts. If your hardware interrupts are level-sensitive, you must mask the interrupt somehow at the ISR. You can't use SPI routines to talk to the radio, because this may leave the SPI system and the radio in undefined states. In this configuration, `hal_io_pollIRQs()` exists but is a no-op. + +2. If interrupts are not enabled via `LMIC_USE_INTERRUPTS`, the digital I/O lines are polled every so often by calling the routine `hal_io_pollIRQs()`. This routine watches for edges on the relevant digital I/O lines, and records the time of transition. + +3. The LMIC `os_runloop_once()` routine calls `hal_processPendingIRQs()`. This routine uses the timestamps captured by the hardware ISRs and `hal_io_pollIRQs()` to invoke `radio_irq_hander_v2()` with the appropriate information. `hal_processPendingIRQs()` in turn calls `hal_io_pollIRQs()` (in case interrupts are not configured). + +4. For compatibility with older versions of the Arduino LMIC, `hal_enableIRQs()` also calls `hal_io_pollIRQs()` when enabling interrupts. However, it does not dispatch the interrupts to `radio_irq_handler_v2()`; this must be done by a subsequent call to `hal_processPendingIRQs()`. + +## Downlink data rate + +Note that the data rate used for downlink packets in the RX2 window varies by region. Consult your network's manual for any divergences from the LoRaWAN Regional Parameters. This library assumes that the network follows the regional default. + +Some networks use different values than the specification. For example, in Europe, the specification default is DR0 (SF12, 125 kHz bandwidth). However, iot.semtech.com and The Things Network both used SF9 / 125 kHz or DR3). If using over-the-air activation (OTAA), the network will download RX2 parameters as part of the JoinAccept message; the LMIC will honor the downloaded parameters. + +However, when using personalized activate (ABP), it is your +responsibility to set the right settings, e.g. by adding this to your +sketch (after calling `LMIC_setSession`). `ttn-abp.ino` already does +this. + +```c++ +LMIC.dn2Dr = DR_SF9; +``` + +## Encoding Utilities + +It is generally important to make LoRaWAN messages as small as practical. Extra bytes mean extra transmit time, which wastes battery power and interferes with other nodes on the network. + +To simplify coding, the Arduino header file <lmic.h> defines some data encoding utility functions to encode floating-point data into `uint16_t` values using `sflt16` or `uflt16` bit layout. For even more efficiency, there are versions that use only the bottom 12 bits of the `uint16_t`, allowing for other bits to be carried in the top 4 bits, or for two values to be crammed into three bytes. + +- `uint16_t LMIC_f2sflt16(float)` converts a floating point number to a [`sflt16`](#sflt16)-encoded `uint16_t`. +- `uint16_t LMIC_f2uflt16(float)` converts a floating-point number to a [`uflt16`](#uflt16)-encoded `uint16_t`. +- `uint16_t LMIC_f2sflt12(float)` converts a floating-point number to a [`sflt12`](#sflt12)-encoded `uint16_t`, leaving the top four bits of the result set to zero. +- `uint16_t LMIC_f2uflt12(float)` converts a floating-point number to a [`uflt12`](#sflt12)-encoded `uint16_t`, leaving the top four bits of the result set to zero. + +JavaScript code for decoding the data can be found in the following sections. + +### sflt16 + +A `sflt16` datum represents an unsigned floating point number in the range [0, 1.0), transmitted as a 16-bit field. The encoded field is interpreted as follows: + +bits | description +:---:|:--- +15 | Sign bit +14..11 | binary exponent `b` +10..0 | fraction `f` + +The corresponding floating point value is computed by computing `f`/2048 * 2^(`b`-15). Note that this format is deliberately not IEEE-compliant; it's intended to be easy to decode by hand and not overwhelmingly sophisticated. However, it is similar to IEEE format in that it uses sign-magnitude rather than twos-complement for negative values. + +For example, if the data value is 0x8D, 0x55, the equivalent floating point number is found as follows. + +1. The full 16-bit number is 0x8D55. +2. Bit 15 is 1, so this is a negative value. +3. `b` is 1, and `b`-15 is -14. 2^-14 is 1/16384 +4. `f` is 0x555. 0x555/2048 = 1365/2048 is 0.667 +5. `f * 2^(b-15)` is therefore 0.667/16384 or 0.00004068 +6. Since the number is negative, the value is -0.00004068 + +Floating point mavens will immediately recognize: + +* This format uses sign/magnitude representation for negative numbers. +* Numbers do not need to be normalized (although in practice they always are). +* The format is somewhat wasteful, because it explicitly transmits the most-significant bit of the fraction. (Most binary floating-point formats assume that `f` is is normalized, which means by definition that the exponent `b` is adjusted and `f` is shifted left until the most-significant bit of `f` is one. Most formats then choose to delete the most-significant bit from the encoding. If we were to do that, we would insist that the actual value of `f` be in the range 2048..4095, and then transmit only `f - 2048`, saving a bit. However, this complicates the handling of gradual underflow; see next point.) +* Gradual underflow at the bottom of the range is automatic and simple with this encoding; the more sophisticated schemes need extra logic (and extra testing) in order to provide the same feature. + +#### JavaScript decoder + +```javascript +function sflt162f(rawSflt16) + { + // rawSflt16 is the 2-byte number decoded from wherever; + // it's in range 0..0xFFFF + // bit 15 is the sign bit + // bits 14..11 are the exponent + // bits 10..0 are the the mantissa. Unlike IEEE format, + // the msb is explicit; this means that numbers + // might not be normalized, but makes coding for + // underflow easier. + // As with IEEE format, negative zero is possible, so + // we special-case that in hopes that JavaScript will + // also cooperate. + // + // The result is a number in the open interval (-1.0, 1.0); + // + + // throw away high bits for repeatability. + rawSflt16 &= 0xFFFF; + + // special case minus zero: + if (rawSflt16 == 0x8000) + return -0.0; + + // extract the sign. + var sSign = ((rawSflt16 & 0x8000) != 0) ? -1 : 1; + + // extract the exponent + var exp1 = (rawSflt16 >> 11) & 0xF; + + // extract the "mantissa" (the fractional part) + var mant1 = (rawSflt16 & 0x7FF) / 2048.0; + + // convert back to a floating point number. We hope + // that Math.pow(2, k) is handled efficiently by + // the JS interpreter! If this is time critical code, + // you can replace by a suitable shift and divide. + var f_unscaled = sSign * mant1 * Math.pow(2, exp1 - 15); + + return f_unscaled; + } +``` + +### uflt16 + +A `uflt16` datum represents an unsigned floating point number in the range [0, 1.0), transmitted as a 16-bit field. The encoded field is interpreted as follows: + +bits | description +:---:|:--- +15..12 | binary exponent `b` +11..0 | fraction `f` + +The corresponding floating point value is computed by computing `f`/4096 * 2^(`b`-15). Note that this format is deliberately not IEEE-compliant; it's intended to be easy to decode by hand and not overwhelmingly sophisticated. + +For example, if the transmitted message contains 0xEB, 0xF7, and the transmitted byte order is big endian, the equivalent floating point number is found as follows. + +1. The full 16-bit number is 0xEBF7. +2. `b` is therefore 0xE, and `b`-15 is -1. 2^-1 is 1/2 +3. `f` is 0xBF7. 0xBF7/4096 is 3063/4096 == 0.74780... +4. `f * 2^(b-15)` is therefore 0.74780/2 or 0.37390 + +Floating point mavens will immediately recognize: + +* There is no sign bit; all numbers are positive. +* Numbers do not need to be normalized (although in practice they always are). +* The format is somewhat wasteful, because it explicitly transmits the most-significant bit of the fraction. (Most binary floating-point formats assume that `f` is is normalized, which means by definition that the exponent `b` is adjusted and `f` is shifted left until the most-significant bit of `f` is one. Most formats then choose to delete the most-significant bit from the encoding. If we were to do that, we would insist that the actual value of `f` be in the range 4096..8191, and then transmit only `f - 4096`, saving a bit. However, this complicated the handling of gradual underflow; see next point.) +* Gradual underflow at the bottom of the range is automatic and simple with this encoding; the more sophisticated schemes need extra logic (and extra testing) in order to provide the same feature. + +#### uflt16 JavaScript decoder + +```javascript +function uflt162f(rawUflt16) + { + // rawUflt16 is the 2-byte number decoded from wherever; + // it's in range 0..0xFFFF + // bits 15..12 are the exponent + // bits 11..0 are the the mantissa. Unlike IEEE format, + // the msb is explicit; this means that numbers + // might not be normalized, but makes coding for + // underflow easier. + // As with IEEE format, negative zero is possible, so + // we special-case that in hopes that JavaScript will + // also cooperate. + // + // The result is a number in the half-open interval [0, 1.0); + // + + // throw away high bits for repeatability. + rawUflt16 &= 0xFFFF; + + // extract the exponent + var exp1 = (rawUflt16 >> 12) & 0xF; + + // extract the "mantissa" (the fractional part) + var mant1 = (rawUflt16 & 0xFFF) / 4096.0; + + // convert back to a floating point number. We hope + // that Math.pow(2, k) is handled efficiently by + // the JS interpreter! If this is time critical code, + // you can replace by a suitable shift and divide. + var f_unscaled = mant1 * Math.pow(2, exp1 - 15); + + return f_unscaled; + } +``` + +### sflt12 + +A `sflt12` datum represents an signed floating point number in the range [0, 1.0), transmitted as a 12-bit field. The encoded field is interpreted as follows: + +bits | description +:---:|:--- +11 | sign bit +11..8 | binary exponent `b` +7..0 | fraction `f` + +The corresponding floating point value is computed by computing `f`/128 * 2^(`b`-15). Note that this format is deliberately not IEEE-compliant; it's intended to be easy to decode by hand and not overwhelmingly sophisticated. + +For example, if the transmitted message contains 0x8, 0xD5, the equivalent floating point number is found as follows. + +1. The full 16-bit number is 0x8D5. +2. The number is negative. +3. `b` is 0x1, and `b`-15 is -14. 2^-14 is 1/16384 +4. `f` is 0x55. 0x55/128 is 85/128, or 0.66 +5. `f * 2^(b-15)` is therefore 0.66/16384 or 0.000041 (to two significant digits) +6. The decoded number is therefore -0.000041. + +Floating point mavens will immediately recognize: + +* This format uses sign/magnitude representation for negative numbers. +* Numbers do not need to be normalized (although in practice they always are). +* The format is somewhat wasteful, because it explicitly transmits the most-significant bit of the fraction. (Most binary floating-point formats assume that `f` is is normalized, which means by definition that the exponent `b` is adjusted and `f` is shifted left until the most-significant bit of `f` is one. Most formats then choose to delete the most-significant bit from the encoding. If we were to do that, we would insist that the actual value of `f` be in the range 128 .. 256, and then transmit only `f - 128`, saving a bit. However, this complicates the handling of gradual underflow; see next point.) +* Gradual underflow at the bottom of the range is automatic and simple with this encoding; the more sophisticated schemes need extra logic (and extra testing) in order to provide the same feature. +* It can be strongly argued that dropping the sign bit would be worth the effort, as this would get us 14% more resolution for a minor amount of work. + +#### sflt12f JavaScript decoder + +```javascript +function sflt12f(rawSflt12) + { + // rawSflt12 is the 2-byte number decoded from wherever; + // it's in range 0..0xFFF (12 bits). For safety, we mask + // on entry and discard the high-order bits. + // bit 11 is the sign bit + // bits 10..7 are the exponent + // bits 6..0 are the the mantissa. Unlike IEEE format, + // the msb is explicit; this means that numbers + // might not be normalized, but makes coding for + // underflow easier. + // As with IEEE format, negative zero is possible, so + // we special-case that in hopes that JavaScript will + // also cooperate. + // + // The result is a number in the open interval (-1.0, 1.0); + // + + // throw away high bits for repeatability. + rawSflt12 &= 0xFFF; + + // special case minus zero: + if (rawSflt12 == 0x800) + return -0.0; + + // extract the sign. + var sSign = ((rawSflt12 & 0x800) != 0) ? -1 : 1; + + // extract the exponent + var exp1 = (rawSflt12 >> 7) & 0xF; + + // extract the "mantissa" (the fractional part) + var mant1 = (rawSflt12 & 0x7F) / 128.0; + + // convert back to a floating point number. We hope + // that Math.pow(2, k) is handled efficiently by + // the JS interpreter! If this is time critical code, + // you can replace by a suitable shift and divide. + var f_unscaled = sSign * mant1 * Math.pow(2, exp1 - 15); + + return f_unscaled; + } +``` + +### uflt12 + +A `uflt12` datum represents an unsigned floating point number in the range [0, 1.0), transmitted as a 16-bit field. The encoded field is interpreted as follows: + +bits | description +:---:|:--- +11..8 | binary exponent `b` +7..0 | fraction `f` + +The corresponding floating point value is computed by computing `f`/256 * 2^(`b`-15). Note that this format is deliberately not IEEE-compliant; it's intended to be easy to decode by hand and not overwhelmingly sophisticated. + +For example, if the transmitted message contains 0x1, 0xAB, the equivalent floating point number is found as follows. + +1. The full 16-bit number is 0x1AB. +2. `b` is therefore 0x1, and `b`-15 is -14. 2^-14 is 1/16384 +3. `f` is 0xAB. 0xAB/256 is 0.67 +4. `f * 2^(b-15)` is therefore 0.67/16384 or 0.0000408 (to three significant digits) + +Floating point mavens will immediately recognize: + +* There is no sign bit; all numbers are positive. +* Numbers do not need to be normalized (although in practice they always are). +* The format is somewhat wasteful, because it explicitly transmits the most-significant bit of the fraction. (Most binary floating-point formats assume that `f` is is normalized, which means by definition that the exponent `b` is adjusted and `f` is shifted left until the most-significant bit of `f` is one. Most formats then choose to delete the most-significant bit from the encoding. If we were to do that, we would insist that the actual value of `f` be in the range 256 .. 512, and then transmit only `f - 256`, saving a bit. However, this complicates the handling of gradual underflow; see next point.) +* Gradual underflow at the bottom of the range is automatic and simple with this encoding; the more sophisticated schemes need extra logic (and extra testing) in order to provide the same feature. + +#### uflt12f JavaScript decoder + +```javascript +function uflt12f(rawUflt12) + { + // rawUflt12 is the 2-byte number decoded from wherever; + // it's in range 0..0xFFF (12 bits). For safety, we mask + // on entry and discard the high-order bits. + // bits 11..8 are the exponent + // bits 7..0 are the the mantissa. Unlike IEEE format, + // the msb is explicit; this means that numbers + // might not be normalized, but makes coding for + // underflow easier. + // As with IEEE format, negative zero is possible, so + // we special-case that in hopes that JavaScript will + // also cooperate. + // + // The result is a number in the half-open interval [0, 1.0); + // + + // throw away high bits for repeatability. + rawUflt12 &= 0xFFF; + + // extract the exponent + var exp1 = (rawUflt12 >> 8) & 0xF; + + // extract the "mantissa" (the fractional part) + var mant1 = (rawUflt12 & 0xFF) / 256.0; + + // convert back to a floating point number. We hope + // that Math.pow(2, k) is handled efficiently by + // the JS interpreter! If this is time critical code, + // you can replace by a suitable shift and divide. + var f_unscaled = sSign * mant1 * Math.pow(2, exp1 - 15); + + return f_unscaled; + } +``` + +## Release History + +- v4.0 is a major release; changes are significant enough to be "likely breaking". It includes the following changes. + + - Fix some broken documentation references [#644](https://github.com/mcci-catena/arduino-lmic/issues/644), [#646](https://github.com/mcci-catena/arduino-lmic/pulls/646), [#673](https://github.com/mcci-catena/arduino-lmic/pulls/673). + - Re-added CI testing, since Travis CI no longer works for us [#647](https://github.com/mcci-catena/arduino-lmic/issues/647); fixed AVR compliance CI compile [#679](https://github.com/mcci-catena/arduino-lmic/issues/679). + - Don't use `defined()` in macro definitions [#606](https://github.com/mcci-catena/arduino-lmic/issues/606) + - Fix a warning on AVR32 [#709](https://github.com/mcci-catena/arduino-lmic/pulls/709). + - Fix Helium link in examples [#715](https://github.com/mcci-catena/arduino-lmic/issues/715), [#718](https://github.com/mcci-catena/arduino-lmic/pulls/718). + - Remove `XCHANNEL` support from US region [#404](https://github.com/mcci-catena/arduino-lmic/issues/404) + - Assign channels randomly without replacement [#515](https://github.com/mcci-catena/arduino-lmic/issues/515), [#619](https://github.com/mcci-catena/arduino-lmic/issues/619), [#730](https://github.com/mcci-catena/arduino-lmic/issues/730). + - Don't allow `LMIC_setupChannel()` to change default channels [#722](https://github.com/mcci-catena/arduino-lmic/issues/722). Add `LMIC_queryNumDefaultChannels()` [#700](https://github.com/mcci-catena/arduino-lmic/issues/700). + - Don't accept out-of-range DRs from MAC downlink messages [#723](https://github.com/mcci-catena/arduino-lmic/issues/723) + - Adopt semantic versions completely [#726](https://github.com/mcci-catena/arduino-lmic/issues/726). + - Implement JoinAccept CFList processing for US/AU [#739](https://github.com/mcci-catena/arduino-lmic/issues/739). + - Correct JoinAccept CFList processing for AS923 [#740](https://github.com/mcci-catena/arduino-lmic/issues/740). + - Don't compile board config objects when we know for sure they'll not be used; compilers can't always tell [#736](https://github.com/mcci-catena/arduino-lmic/issues/736). + +- v3.3.0 is primarily a maintenance and roll-up release. + + - Added [LoRaWAN-at-a-glance](doc/LoRaWAN-at-a-glance.pdf) and a [state diagram of the LMIC](doc/LMIC-FSM.pdf). + - Several PRs from Matthijs Kooijman to improve compatibility with the original Arduino LMIC ([#608](https://github.com/mcci-catena/arduino-lmic/issues/608), [#609](https://github.com/mcci-catena/arduino-lmic/issues/609)). + - Numerous documentation improvements contributed by the community ([#431](https://github.com/mcci-catena/arduino-lmic/issues/431), [#612](https://github.com/mcci-catena/arduino-lmic/issues/612), [#614](https://github.com/mcci-catena/arduino-lmic/issues/614), [#625](https://github.com/mcci-catena/arduino-lmic/issues/625)). + +- v3.2.0 has the following changes: + + - [#550](https://github.com/mcci-catena/arduino-lmic/issues/550) fixes debug prints in `ttn-otaa.ino`. + - [#553](https://github.com/mcci-catena/arduino-lmic/issues/553) add full regional support to `raw.ino` and `ttn-abp.ino`. + - [#570](https://github.com/mcci-catena/arduino-lmic/issues/570) corrects handling of piggy-back MAC responses when sending an `LMIC_sendAlive()` (`OPMODE_POLL`) message. + - [#524](https://github.com/mcci-catena/arduino-lmic/issues/524) corrects handling of interrupt disable, and slightly refactors the low-level interrupt handling wrappers for clarity. With this change, `radio_irq_handler_v2()` is never called except from the run loop, and so the radio driver need not (and does not) disable interrupts. Version is v3.1.0.20. + - [#568](https://github.com/mcci-catena/arduino-lmic/issues/568) improves documentation for the radio driver. + - [#537](https://github.com/mcci-catena/arduino-lmic/pull/537) fixes a compile error in SX1272 support. (Thanks @ricaun.) Version is v3.1.0.10. + +- v3.1.0 officially adopts the changes from v3.0.99. There were dozens of changes; check the GitHub issue logs and change logs. This was a breaking release (due to changes in data layout in the LMIC structure; the structure is accessed by apps). + +- v3.0.99 (the pre-release for v3.1.0) added the following changes. (This is not an exhaustive list.) Note that the behavior of the LMIC changes in important ways, as it now enforces the LoRaWAN mandated maximum frame size for a given data rate. For Class A devices, this may cause your device to go silent after join, if you're not able to handle the frame size dictated by the parameters downloaded to the device by the network during join. The library will attempt to find a data rate that will work, but there is no guarantee that the network has provided such a data rate. + + - [#470](https://github.com/mcci-catena/arduino-lmic/pull/470) corrects the name of AU915 region. [#516](https://github.com/mcci-catena/arduino-lmic/pull/516) makes sure that `LMIC_REGION_au921` is defined (but deprecated) for backward compatibility. + - [#452](https://github.com/mcci-catena/arduino-lmic/pull/452) fixes a bug [#450](https://github.com/mcci-catena/arduino-lmic/issues/450) in `LMIC_clrTxData()` that would cause join hiccups if called while (1) a join was in progress and (2) a regular data packet was waiting to be uplinked after the join completes. Also fixes AS923- and AU915-specific bugs [#446](https://github.com/mcci-catena/arduino-lmic/issues/446), [#447](https://github.com/mcci-catena/arduino-lmic/issues/447), [#448](https://github.com/mcci-catena/arduino-lmic/issues/448). Version is `v3.0.99.5`. + - [#443](https://github.com/mcci-catena/arduino-lmic/pull/443) addresses a number of problems found in cooperation with [RedwoodComm](https://redwoodcomm.com). They suggested a timing improvement to speed testing; this lead to the discovery of a number of problems. Some were in the compliance framework, but one corrects timing for very high spreading factors, several ([#442](https://github.com/mcci-catena/arduino-lmic/issues/442), [#436](https://github.com/mcci-catena/arduino-lmic/issues/438), [#435](https://github.com/mcci-catena/arduino-lmic/issues/435), [#434](https://github.com/mcci-catena/arduino-lmic/issues/434) fix glaring problems in FSK support; [#249](https://github.com/mcci-catena/arduino-lmic/issues/249) greatly enhances stability by making API calls much less likely to crash the LMIC if it's active. Version is v3.0.99.3. + - [#388](https://github.com/mcci-catena/arduino-lmic/issues/388), [#389](https://github.com/mcci-catena/arduino-lmic/issues/390), [#390](https://github.com/mcci-catena/arduino-lmic/issues/390) change the LMIC to honor the maximum frame size for a given DR in the current region. This proves to be a breaking change for many applications, especially in the US, because DR0 in the US supports only an 11-byte payload, and many apps were ignoring this. Additional error codes were defined so that apps can detect and recover from this situation, but they must detect; otherwise they run the risk of being blocked from the network by the LMIC. Because of this change, the next version of the LMIC will be V3.1 or higher, and the LMIC version for development is bumped to 3.0.99.0. + - [#401](https://github.com/mcci-catena/arduino-lmic/issues/401) adds 865 MHz through 868 MHz to the "1%" band for EU. + - [#395](https://github.com/mcci-catena/arduino-lmic/pull/395) corrects pin-mode initialization if using `hal_interrupt_init()`. + - [#385](https://github.com/mcci-catena/arduino-lmic/issues/385) corrects an error handling data rate selection for `TxParamSetupReq`, found in US-915 certification testing. (v2.3.2.71) + - [#378](https://github.com/mcci-catena/arduino-lmic/pull/378) completely reworks MAC downlink handling. Resulting code passes the LoRaWAN V1.5 EU certification test. (v2.3.2.70) + - [#360](https://github.com/mcci-catena/arduino-lmic/issues/360) adds support for the KR-920 regional plan. + +- v2.3.2 is a patch release. It incorporates two pull requests. + + - [#204](https://github.com/mcci-catena/arduino-lmic/pull/204) eliminates a warning if using a custom pin-map. + - [#206](https://github.com/mcci-catena/arduino-lmic/pull/206) updates CI testing to Arduino IDE v1.8.8. + +- v2.3.1 is a patch release. It adds `<arduino_lmic_user_configuration.h>`, which loads the pre-processor LMIC configuration variables into scope (issue [#199](https://github.com/mcci-catena/arduino-lmic/issues/199)). + +- v2.3.0 introduces two important changes. + + 1. The pin-map is extended with an additional field `pConfig`, pointing to a C++ class instance. This instance, if provided, has extra methods for dealing with TCXO control and other fine details of operating the radio. It also gives a natural way for us to extend the behavior of the HAL. + + 2. Pinmaps can be pre-configured into the library, so that users don't have to do this in every sketch. + + Accompanying this was a fairly large refactoring of inner header files. We now have top-level header file `<arduino_lmic_hal_configuration.h>`, which provides much the same info as the original `<hal/hal.h>`, without bringing most of the LMIC internal definitions into scope. We also changed the SPI API based on a suggestion from `@manuelbl`, making the HAL more friendly to structured BSPs (and also making the SPI API potentially faster). + +- Interim bug fixes: added a new API (`radio_irq_handler_v2()`), which allows the caller to provide the timestamp of the interrupt. This allows for more accurate timing, because the knowledge of interrupt overhead can be moved to a platform-specific layer ([#148](https://github.com/mcci-catena/arduino-lmic/issues/148)). Fixed compile issues on ESP32 ([#140](https://github.com/mcci-catena/arduino-lmic/issues/140) and [#153](https://github.com/mcci-catena/arduino-lmic/issues/150)). We added ESP32 and 32u4 as targets in CI testing. We switched CI testing to Arduino IDE 1.8.7. + Fixed issue [#161](https://github.com/mcci-catena/arduino-lmic/issues/161) selecting the Japan version of as923 using `CFG_as923jp` (selecting via `CFG_as923` and `LMIC_COUNTRY_CODE=LMIC_COUNTRY_CODE_JP` worked). + Fixed [#38](https://github.com/mcci-catena/arduino-lmic/issues/38) -- now any call to hal_init() will put the NSS line in the idle (high/inactive) state. As a side effect, RXTX is initialized, and RESET code changed to set value before transitioning state. Likely no net effect, but certainly more correct. + +- V2.2.2 adds `ttn-abp-feather-us915-dht22.ino` example, and fixes some documentation typos. It also fixes encoding of the `Margin` field of the `DevStatusAns` MAC message ([#130](https://github.com/mcci-catena/arduino-lmic/issues/130)). This makes Arduino LMIC work with networks implemented with [LoraServer](https://www.loraserver.io/). + +- V2.2.1 corrects the value of `ARDUINO_LMIC_VERSION` ([#123](https://github.com/mcci-catena/arduino-lmic/issues/123)), allows ttn-otaa-feather-us915 example to compile for the Feather 32u4 LoRa ([#116](https://github.com/mcci-catena/arduino-lmic/issues/116)), and addresses documentation issues ([#122](https://github.com/mcci-catena/arduino-lmic/issues/122), [#120](https://github.com/mcci-catena/arduino-lmic/issues/120)). + +- V2.2.0 adds encoding functions and `tn-otaa-feather-us915-dht22.ino` example. Plus a large number of issues: [#59](https://github.com/mcci-catena/arduino-lmic/issues/59), [#60](https://github.com/mcci-catena/arduino-lmic/issues/60), [#63](https://github.com/mcci-catena/arduino-lmic/issues/63), [#64](https://github.com/mcci-catena/arduino-lmic/issues/47) (listen-before-talk for Japan), [#65](https://github.com/mcci-catena/arduino-lmic/issues/65), [#68](https://github.com/mcci-catena/arduino-lmic/issues/68), [#75](https://github.com/mcci-catena/arduino-lmic/issues/75), [#78](https://github.com/mcci-catena/arduino-lmic/issues/78), [#80](https://github.com/mcci-catena/arduino-lmic/issues/80), [#91](https://github.com/mcci-catena/arduino-lmic/issues/91), [#98](https://github.com/mcci-catena/arduino-lmic/issues/98), [#101](https://github.com/mcci-catena/arduino-lmic/issues/101). Added full Travis CI testing, switched to travis-ci.com as the CI service. Prepared to publish library in the official Arduino library list. + +- V2.1.5 fixes issue [#56](https://github.com/mcci-catena/arduino-lmic/issues/56) (a documentation bug). Documentation was quickly reviewed and other issues were corrected. The OTAA examples were also updated slightly. + +- V2.1.4 fixes issues [#47](https://github.com/mcci-catena/arduino-lmic/issues/47) and [#50](https://github.com/mcci-catena/arduino-lmic/issues/50) in the radio driver for the SX1276 (both related to handling of output power control bits). + +- V2.1.3 has a fix for issue [#43](https://github.com/mcci-catena/arduino-lmic/issues/43): handling of `LinkAdrRequest` was incorrect for US915 and AU915; when TTN added ADR support on US and AU, the deficiency was revealed (and caused an ASSERT). + +- V2.1.2 has a fix for issue [#39](https://github.com/mcci-catena/arduino-lmic/issues/39) (adding a prototype for `LMIC_DEBUG_PRINTF` if needed). Fully upward compatible, so just a patch. + +- V2.1.1 has the same content as V2.1.2, but was accidentally released without updating `library.properties`. + +- V2.1.0 adds support for the Murata LoRaWAN module. + +- V2.0.2 adds support for additional regions. + +## Contributions + +This library started from the IBM V1.5 open-source code. + +- Thomas Telkamp and Matthijs Kooijman ported V1.5 to Arduino and did a lot of bug fixing. + +- Terry Moore, LeRoy Leslie, Frank Rose, and ChaeHee Won did a lot of work on US support. + +- Terry Moore added the AU915, AS923, KR920 and IN866 regions, and created the regionalization framework, and did corrections for LoRaWAN 1.0.3 compliance testing. + +- [`@tanupoo`](https://github.com/tanupoo) of the WIDE Project debugged AS923JP and LBT support. + +- [`@frazar`](https://github.com/frazar) contributed numerous features, e.g. network time support, CI testing, documentation improvements. + +- [`@manuelbl`](https://github.com/manuelbl) contributed numerous ESP32-related patches and improvements. + +- [`@ngraziano`](https://github.com/ngraziano) did extensive testing and contributed numerous ADR-related patches. + +There are many others, who have contributed code and also participated in discussions, performed testing, reported problems and results. Thanks to all who have participated. We hope to use something like [All Contributors](https://https://allcontributors.org/) to help keep this up to date, but so far the automation isn't working. + +## Trademark Acknowledgements + +LoRa is a registered trademark of Semtech Corporation. LoRaWAN is a registered trademark of the LoRa Alliance. + +MCCI and MCCI Catena are registered trademarks of MCCI Corporation. + +All other trademarks are the properties of their respective owners. + +## License + +The upstream files from IBM v1.6 are based on the Berkeley license, +and the merge which synchronized this repository therefore migrated +the core files to the Berkeley license. However, modifications made +in the Arduino branch were done under the Eclipse license, so the +overall license of this repository is still Eclipse Public License +v1.0. The examples which use a more liberal +license. Some of the AES code is available under the LGPL. Refer to each +individual source file for more details, but bear in mind that until +the upstream developers look into this issue, it is safest to assume +the Eclipse license applies. + +### Support Open Source Hardware and Software + +MCCI invests time and resources providing this open source code, please support MCCI and open-source hardware by purchasing products from MCCI, Adafruit and other open-source hardware/software vendors! + +For information about MCCI's products, please visit [store.mcci.com](https://store.mcci.com/). diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/library.properties b/src/lib/MCCI_LoRaWAN_LMIC_library/library.properties new file mode 100644 index 0000000..4b571b3 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/library.properties @@ -0,0 +1,9 @@ +name=MCCI LoRaWAN LMIC library +version=4.0.0 +author=IBM, Matthijs Kooijman, Terry Moore, ChaeHee Won, Frank Rose +maintainer=Terry Moore <tmm@mcci.com> +sentence=Arduino port of the LMIC (LoraWAN-MAC-in-C) framework provided by IBM. +paragraph=Supports LoRaWAN 1.0.2/1.0.3 Class A devices implemented using the Semtech SX1272/SX1276 (including HopeRF RFM92/RFM95 and Murata modules). Support for EU868, US, AU, AS923, KR and IN regional plans. Untested support for Class B and FSK operation. Various enhancements and bug fixes from MCCI and The Things Network New York. Original IBM URL http://www.research.ibm.com/labs/zurich/ics/lrsc/lmic.html. +category=Communication +url=https://github.com/mcci-catena/arduino-lmic +architectures=* diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/project_config/lmic_project_config.h b/src/lib/MCCI_LoRaWAN_LMIC_library/project_config/lmic_project_config.h new file mode 100644 index 0000000..b7110ea --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/project_config/lmic_project_config.h @@ -0,0 +1,11 @@ +// project-specific definitions +#define CFG_eu868 1 +//#define CFG_us915 1 +//#define CFG_au915 1 +//#define CFG_as923 1 +// #define LMIC_COUNTRY_CODE LMIC_COUNTRY_CODE_JP /* for as923-JP */ +//#define CFG_kr920 1 +//#define CFG_in866 1 +#define CFG_sx1276_radio 1 +//#define LMIC_USE_INTERRUPTS +#define DISABLE_LMIC_FAILURE_TO diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/ideetron/AES-128_V10.cc b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/ideetron/AES-128_V10.cc new file mode 100644 index 0000000..d52623d --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/ideetron/AES-128_V10.cc @@ -0,0 +1,348 @@ +/****************************************************************************************** +#if defined(USE_IDEETRON_AES) +* Copyright 2015, 2016 Ideetron B.V. +* +* This program is free software: you can redistribute it and/or modify +* it under the terms of the GNU Lesser General Public License as published by +* the Free Software Foundation, either version 3 of the License, or +* (at your option) any later version. +* +* This program is distributed in the hope that it will be useful, +* but WITHOUT ANY WARRANTY; without even the implied warranty of +* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +* GNU Lesser General Public License for more details. +* +* You should have received a copy of the GNU Lesser General Public License +* along with this program. If not, see <http://www.gnu.org/licenses/>. +******************************************************************************************/ +/****************************************************************************************** +* +* File: AES-128_V10.cpp +* Author: Gerben den Hartog +* Compagny: Ideetron B.V. +* Website: http://www.ideetron.nl/LoRa +* E-mail: info@ideetron.nl +******************************************************************************************/ +/**************************************************************************************** +* +* Created on: 20-10-2015 +* Supported Hardware: ID150119-02 Nexus board with RFM95 +* +* Firmware Version 1.0 +* First version +****************************************************************************************/ + +// This file was taken from +// https://github.com/Ideetron/RFM95W_Nexus/tree/master/LoRaWAN_V31 for +// use with LMIC. It was only cosmetically modified: +// - AES_Encrypt was renamed to lmic_aes_encrypt. +// - All other functions and variables were made static +// - Tabs were converted to 2 spaces +// - An #include and #if guard was added +// - S_Table is now stored in PROGMEM + +#include "../../lmic/oslmic.h" + +#if defined(USE_IDEETRON_AES) + +/* +******************************************************************************************** +* Global Variables +******************************************************************************************** +*/ + +static unsigned char State[4][4]; + +static CONST_TABLE(unsigned char, S_Table)[16][16] = { + {0x63,0x7C,0x77,0x7B,0xF2,0x6B,0x6F,0xC5,0x30,0x01,0x67,0x2B,0xFE,0xD7,0xAB,0x76}, + {0xCA,0x82,0xC9,0x7D,0xFA,0x59,0x47,0xF0,0xAD,0xD4,0xA2,0xAF,0x9C,0xA4,0x72,0xC0}, + {0xB7,0xFD,0x93,0x26,0x36,0x3F,0xF7,0xCC,0x34,0xA5,0xE5,0xF1,0x71,0xD8,0x31,0x15}, + {0x04,0xC7,0x23,0xC3,0x18,0x96,0x05,0x9A,0x07,0x12,0x80,0xE2,0xEB,0x27,0xB2,0x75}, + {0x09,0x83,0x2C,0x1A,0x1B,0x6E,0x5A,0xA0,0x52,0x3B,0xD6,0xB3,0x29,0xE3,0x2F,0x84}, + {0x53,0xD1,0x00,0xED,0x20,0xFC,0xB1,0x5B,0x6A,0xCB,0xBE,0x39,0x4A,0x4C,0x58,0xCF}, + {0xD0,0xEF,0xAA,0xFB,0x43,0x4D,0x33,0x85,0x45,0xF9,0x02,0x7F,0x50,0x3C,0x9F,0xA8}, + {0x51,0xA3,0x40,0x8F,0x92,0x9D,0x38,0xF5,0xBC,0xB6,0xDA,0x21,0x10,0xFF,0xF3,0xD2}, + {0xCD,0x0C,0x13,0xEC,0x5F,0x97,0x44,0x17,0xC4,0xA7,0x7E,0x3D,0x64,0x5D,0x19,0x73}, + {0x60,0x81,0x4F,0xDC,0x22,0x2A,0x90,0x88,0x46,0xEE,0xB8,0x14,0xDE,0x5E,0x0B,0xDB}, + {0xE0,0x32,0x3A,0x0A,0x49,0x06,0x24,0x5C,0xC2,0xD3,0xAC,0x62,0x91,0x95,0xE4,0x79}, + {0xE7,0xC8,0x37,0x6D,0x8D,0xD5,0x4E,0xA9,0x6C,0x56,0xF4,0xEA,0x65,0x7A,0xAE,0x08}, + {0xBA,0x78,0x25,0x2E,0x1C,0xA6,0xB4,0xC6,0xE8,0xDD,0x74,0x1F,0x4B,0xBD,0x8B,0x8A}, + {0x70,0x3E,0xB5,0x66,0x48,0x03,0xF6,0x0E,0x61,0x35,0x57,0xB9,0x86,0xC1,0x1D,0x9E}, + {0xE1,0xF8,0x98,0x11,0x69,0xD9,0x8E,0x94,0x9B,0x1E,0x87,0xE9,0xCE,0x55,0x28,0xDF}, + {0x8C,0xA1,0x89,0x0D,0xBF,0xE6,0x42,0x68,0x41,0x99,0x2D,0x0F,0xB0,0x54,0xBB,0x16} +}; + +#ifdef __cplusplus +extern "C" { +#endif + void lmic_aes_encrypt(unsigned char *Data, unsigned char *Key); +#ifdef __cplusplus +} +#endif + +static void AES_Add_Round_Key(unsigned char *Round_Key); +static unsigned char AES_Sub_Byte(unsigned char Byte); +static void AES_Shift_Rows(); +static void AES_Mix_Collums(); +static void AES_Calculate_Round_Key(unsigned char Round, unsigned char *Round_Key); + +/* +***************************************************************************************** +* Description : Function for encrypting data using AES-128 +* +* Arguments : *Data Data to encrypt is a 16 byte long arry +* *Key Key to encrypt data with is a 16 byte long arry +***************************************************************************************** +*/ +void lmic_aes_encrypt(unsigned char *Data, unsigned char *Key) +{ + unsigned char i; + unsigned char Row,Collum; + unsigned char Round = 0x00; + unsigned char Round_Key[16]; + + //Copy input to State arry + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + State[Row][Collum] = Data[Row + (4*Collum)]; + } + } + + //Copy key to round key + for(i = 0; i < 16; i++) + { + Round_Key[i] = Key[i]; + } + + //Add round key + AES_Add_Round_Key(Round_Key); + + //Preform 9 full rounds + for(Round = 1; Round < 10; Round++) + { + //Preform Byte substitution with S table + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + State[Row][Collum] = AES_Sub_Byte(State[Row][Collum]); + } + } + + //Preform Row Shift + AES_Shift_Rows(); + + //Mix Collums + AES_Mix_Collums(); + + //Calculate new round key + AES_Calculate_Round_Key(Round,Round_Key); + + //Add round key + AES_Add_Round_Key(Round_Key); + } + + //Last round whitout mix collums + //Preform Byte substitution with S table + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + State[Row][Collum] = AES_Sub_Byte(State[Row][Collum]); + } + } + + //Shift rows + AES_Shift_Rows(); + + //Calculate new round key + AES_Calculate_Round_Key(Round,Round_Key); + + //Add round Key + AES_Add_Round_Key(Round_Key); + + //Copy the State into the data array + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + Data[Row + (4*Collum)] = State[Row][Collum]; + } + } + +} + +/* +***************************************************************************************** +* Description : Function that add's the round key for the current round +* +* Arguments : *Round_Key 16 byte long array holding the Round Key +***************************************************************************************** +*/ +static void AES_Add_Round_Key(unsigned char *Round_Key) +{ + unsigned char Row,Collum; + + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + State[Row][Collum] = State[Row][Collum] ^ Round_Key[Row + (4*Collum)]; + } + } +} + +/* +***************************************************************************************** +* Description : Function that substitutes a byte with a byte from the S_Table +* +* Arguments : Byte The byte that will be substituted +* +* Return : The return is the found byte in the S_Table +***************************************************************************************** +*/ +static unsigned char AES_Sub_Byte(unsigned char Byte) +{ + unsigned char S_Row,S_Collum; + unsigned char S_Byte; + + //Split byte up in Row and Collum + S_Row = ((Byte >> 4) & 0x0F); + S_Collum = (Byte & 0x0F); + + //Find the correct byte in the S_Table + S_Byte = TABLE_GET_U1_TWODIM(S_Table, S_Row, S_Collum); + + return S_Byte; +} + +/* +***************************************************************************************** +* Description : Function that preforms the shift row operation described in the AES standard +***************************************************************************************** +*/ +static void AES_Shift_Rows() +{ + unsigned char Buffer; + + //Row 0 doesn't change + + //Shift Row 1 one left + //Store firt byte in buffer + Buffer = State[1][0]; + //Shift all bytes + State[1][0] = State[1][1]; + State[1][1] = State[1][2]; + State[1][2] = State[1][3]; + State[1][3] = Buffer; + + //Shift row 2 two left + Buffer = State[2][0]; + State[2][0] = State[2][2]; + State[2][2] = Buffer; + Buffer = State[2][1]; + State[2][1] = State[2][3]; + State[2][3] = Buffer; + + //Shift row 3 three left + Buffer = State[3][3]; + State[3][3] = State[3][2]; + State[3][2] = State[3][1]; + State[3][1] = State[3][0]; + State[3][0] = Buffer; +} + +/* +***************************************************************************************** +* Description : Function that preforms the Mix Collums operation described in the AES standard +***************************************************************************************** +*/ +static void AES_Mix_Collums() +{ + unsigned char Row,Collum; + unsigned char a[4], b[4]; + for(Collum = 0; Collum < 4; Collum++) + { + for(Row = 0; Row < 4; Row++) + { + a[Row] = State[Row][Collum]; + b[Row] = (State[Row][Collum] << 1); + + if((State[Row][Collum] & 0x80) == 0x80) + { + b[Row] = b[Row] ^ 0x1B; + } + } + State[0][Collum] = b[0] ^ a[1] ^ b[1] ^ a[2] ^ a[3]; + State[1][Collum] = a[0] ^ b[1] ^ a[2] ^ b[2] ^ a[3]; + State[2][Collum] = a[0] ^ a[1] ^ b[2] ^ a[3] ^ b[3]; + State[3][Collum] = a[0] ^ b[0] ^ a[1] ^ a[2] ^ b[3]; + } +} + +/* +***************************************************************************************** +* Description : Function that calculaties the round key for the current round +* +* Arguments : Round Number of current Round +* *Round_Key 16 byte long array holding the Round Key +***************************************************************************************** +*/ +static void AES_Calculate_Round_Key(unsigned char Round, unsigned char *Round_Key) +{ + unsigned char i,j; + unsigned char b; + unsigned char Temp[4]; + unsigned char Buffer; + unsigned char Rcon; + + //Calculate first Temp + //Copy laste byte from previous key + for(i = 0; i < 4; i++) + { + Temp[i] = Round_Key[i+12]; + } + + //Rotate Temp + Buffer = Temp[0]; + Temp[0] = Temp[1]; + Temp[1] = Temp[2]; + Temp[2] = Temp[3]; + Temp[3] = Buffer; + + //Substitute Temp + for(i = 0; i < 4; i++) + { + Temp[i] = AES_Sub_Byte(Temp[i]); + } + + //Calculate Rcon + Rcon = 0x01; + while(Round != 1) + { + b = Rcon & 0x80; + Rcon = Rcon << 1; + if(b == 0x80) + { + Rcon = Rcon ^ 0x1b; + } + Round--; + } + + //XOR Rcon + Temp[0] = Temp[0] ^ Rcon; + + //Calculate new key + for(i = 0; i < 4; i++) + { + for(j = 0; j < 4; j++) + { + Round_Key[j + (4*i)] = Round_Key[j + (4*i)] ^ Temp[j]; + Temp[j] = Round_Key[j + (4*i)]; + } + } +} + +#endif // defined(USE_IDEETRON_AES) diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/lmic.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/lmic.c new file mode 100644 index 0000000..2a5bca3 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/lmic.c @@ -0,0 +1,386 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "../lmic/oslmic.h" + +#if defined(USE_ORIGINAL_AES) + +#define AES_MICSUB 0x30 // internal use only + +static CONST_TABLE(u4_t, AES_RCON)[10] = { + 0x01000000, 0x02000000, 0x04000000, 0x08000000, 0x10000000, + 0x20000000, 0x40000000, 0x80000000, 0x1B000000, 0x36000000 +}; + +static CONST_TABLE(u1_t, AES_S)[256] = { + 0x63, 0x7C, 0x77, 0x7B, 0xF2, 0x6B, 0x6F, 0xC5, 0x30, 0x01, 0x67, 0x2B, 0xFE, 0xD7, 0xAB, 0x76, + 0xCA, 0x82, 0xC9, 0x7D, 0xFA, 0x59, 0x47, 0xF0, 0xAD, 0xD4, 0xA2, 0xAF, 0x9C, 0xA4, 0x72, 0xC0, + 0xB7, 0xFD, 0x93, 0x26, 0x36, 0x3F, 0xF7, 0xCC, 0x34, 0xA5, 0xE5, 0xF1, 0x71, 0xD8, 0x31, 0x15, + 0x04, 0xC7, 0x23, 0xC3, 0x18, 0x96, 0x05, 0x9A, 0x07, 0x12, 0x80, 0xE2, 0xEB, 0x27, 0xB2, 0x75, + 0x09, 0x83, 0x2C, 0x1A, 0x1B, 0x6E, 0x5A, 0xA0, 0x52, 0x3B, 0xD6, 0xB3, 0x29, 0xE3, 0x2F, 0x84, + 0x53, 0xD1, 0x00, 0xED, 0x20, 0xFC, 0xB1, 0x5B, 0x6A, 0xCB, 0xBE, 0x39, 0x4A, 0x4C, 0x58, 0xCF, + 0xD0, 0xEF, 0xAA, 0xFB, 0x43, 0x4D, 0x33, 0x85, 0x45, 0xF9, 0x02, 0x7F, 0x50, 0x3C, 0x9F, 0xA8, + 0x51, 0xA3, 0x40, 0x8F, 0x92, 0x9D, 0x38, 0xF5, 0xBC, 0xB6, 0xDA, 0x21, 0x10, 0xFF, 0xF3, 0xD2, + 0xCD, 0x0C, 0x13, 0xEC, 0x5F, 0x97, 0x44, 0x17, 0xC4, 0xA7, 0x7E, 0x3D, 0x64, 0x5D, 0x19, 0x73, + 0x60, 0x81, 0x4F, 0xDC, 0x22, 0x2A, 0x90, 0x88, 0x46, 0xEE, 0xB8, 0x14, 0xDE, 0x5E, 0x0B, 0xDB, + 0xE0, 0x32, 0x3A, 0x0A, 0x49, 0x06, 0x24, 0x5C, 0xC2, 0xD3, 0xAC, 0x62, 0x91, 0x95, 0xE4, 0x79, + 0xE7, 0xC8, 0x37, 0x6D, 0x8D, 0xD5, 0x4E, 0xA9, 0x6C, 0x56, 0xF4, 0xEA, 0x65, 0x7A, 0xAE, 0x08, + 0xBA, 0x78, 0x25, 0x2E, 0x1C, 0xA6, 0xB4, 0xC6, 0xE8, 0xDD, 0x74, 0x1F, 0x4B, 0xBD, 0x8B, 0x8A, + 0x70, 0x3E, 0xB5, 0x66, 0x48, 0x03, 0xF6, 0x0E, 0x61, 0x35, 0x57, 0xB9, 0x86, 0xC1, 0x1D, 0x9E, + 0xE1, 0xF8, 0x98, 0x11, 0x69, 0xD9, 0x8E, 0x94, 0x9B, 0x1E, 0x87, 0xE9, 0xCE, 0x55, 0x28, 0xDF, + 0x8C, 0xA1, 0x89, 0x0D, 0xBF, 0xE6, 0x42, 0x68, 0x41, 0x99, 0x2D, 0x0F, 0xB0, 0x54, 0xBB, 0x16, +}; + +static CONST_TABLE(u4_t, AES_E1)[256] = { + 0xC66363A5, 0xF87C7C84, 0xEE777799, 0xF67B7B8D, 0xFFF2F20D, 0xD66B6BBD, 0xDE6F6FB1, 0x91C5C554, + 0x60303050, 0x02010103, 0xCE6767A9, 0x562B2B7D, 0xE7FEFE19, 0xB5D7D762, 0x4DABABE6, 0xEC76769A, + 0x8FCACA45, 0x1F82829D, 0x89C9C940, 0xFA7D7D87, 0xEFFAFA15, 0xB25959EB, 0x8E4747C9, 0xFBF0F00B, + 0x41ADADEC, 0xB3D4D467, 0x5FA2A2FD, 0x45AFAFEA, 0x239C9CBF, 0x53A4A4F7, 0xE4727296, 0x9BC0C05B, + 0x75B7B7C2, 0xE1FDFD1C, 0x3D9393AE, 0x4C26266A, 0x6C36365A, 0x7E3F3F41, 0xF5F7F702, 0x83CCCC4F, + 0x6834345C, 0x51A5A5F4, 0xD1E5E534, 0xF9F1F108, 0xE2717193, 0xABD8D873, 0x62313153, 0x2A15153F, + 0x0804040C, 0x95C7C752, 0x46232365, 0x9DC3C35E, 0x30181828, 0x379696A1, 0x0A05050F, 0x2F9A9AB5, + 0x0E070709, 0x24121236, 0x1B80809B, 0xDFE2E23D, 0xCDEBEB26, 0x4E272769, 0x7FB2B2CD, 0xEA75759F, + 0x1209091B, 0x1D83839E, 0x582C2C74, 0x341A1A2E, 0x361B1B2D, 0xDC6E6EB2, 0xB45A5AEE, 0x5BA0A0FB, + 0xA45252F6, 0x763B3B4D, 0xB7D6D661, 0x7DB3B3CE, 0x5229297B, 0xDDE3E33E, 0x5E2F2F71, 0x13848497, + 0xA65353F5, 0xB9D1D168, 0x00000000, 0xC1EDED2C, 0x40202060, 0xE3FCFC1F, 0x79B1B1C8, 0xB65B5BED, + 0xD46A6ABE, 0x8DCBCB46, 0x67BEBED9, 0x7239394B, 0x944A4ADE, 0x984C4CD4, 0xB05858E8, 0x85CFCF4A, + 0xBBD0D06B, 0xC5EFEF2A, 0x4FAAAAE5, 0xEDFBFB16, 0x864343C5, 0x9A4D4DD7, 0x66333355, 0x11858594, + 0x8A4545CF, 0xE9F9F910, 0x04020206, 0xFE7F7F81, 0xA05050F0, 0x783C3C44, 0x259F9FBA, 0x4BA8A8E3, + 0xA25151F3, 0x5DA3A3FE, 0x804040C0, 0x058F8F8A, 0x3F9292AD, 0x219D9DBC, 0x70383848, 0xF1F5F504, + 0x63BCBCDF, 0x77B6B6C1, 0xAFDADA75, 0x42212163, 0x20101030, 0xE5FFFF1A, 0xFDF3F30E, 0xBFD2D26D, + 0x81CDCD4C, 0x180C0C14, 0x26131335, 0xC3ECEC2F, 0xBE5F5FE1, 0x359797A2, 0x884444CC, 0x2E171739, + 0x93C4C457, 0x55A7A7F2, 0xFC7E7E82, 0x7A3D3D47, 0xC86464AC, 0xBA5D5DE7, 0x3219192B, 0xE6737395, + 0xC06060A0, 0x19818198, 0x9E4F4FD1, 0xA3DCDC7F, 0x44222266, 0x542A2A7E, 0x3B9090AB, 0x0B888883, + 0x8C4646CA, 0xC7EEEE29, 0x6BB8B8D3, 0x2814143C, 0xA7DEDE79, 0xBC5E5EE2, 0x160B0B1D, 0xADDBDB76, + 0xDBE0E03B, 0x64323256, 0x743A3A4E, 0x140A0A1E, 0x924949DB, 0x0C06060A, 0x4824246C, 0xB85C5CE4, + 0x9FC2C25D, 0xBDD3D36E, 0x43ACACEF, 0xC46262A6, 0x399191A8, 0x319595A4, 0xD3E4E437, 0xF279798B, + 0xD5E7E732, 0x8BC8C843, 0x6E373759, 0xDA6D6DB7, 0x018D8D8C, 0xB1D5D564, 0x9C4E4ED2, 0x49A9A9E0, + 0xD86C6CB4, 0xAC5656FA, 0xF3F4F407, 0xCFEAEA25, 0xCA6565AF, 0xF47A7A8E, 0x47AEAEE9, 0x10080818, + 0x6FBABAD5, 0xF0787888, 0x4A25256F, 0x5C2E2E72, 0x381C1C24, 0x57A6A6F1, 0x73B4B4C7, 0x97C6C651, + 0xCBE8E823, 0xA1DDDD7C, 0xE874749C, 0x3E1F1F21, 0x964B4BDD, 0x61BDBDDC, 0x0D8B8B86, 0x0F8A8A85, + 0xE0707090, 0x7C3E3E42, 0x71B5B5C4, 0xCC6666AA, 0x904848D8, 0x06030305, 0xF7F6F601, 0x1C0E0E12, + 0xC26161A3, 0x6A35355F, 0xAE5757F9, 0x69B9B9D0, 0x17868691, 0x99C1C158, 0x3A1D1D27, 0x279E9EB9, + 0xD9E1E138, 0xEBF8F813, 0x2B9898B3, 0x22111133, 0xD26969BB, 0xA9D9D970, 0x078E8E89, 0x339494A7, + 0x2D9B9BB6, 0x3C1E1E22, 0x15878792, 0xC9E9E920, 0x87CECE49, 0xAA5555FF, 0x50282878, 0xA5DFDF7A, + 0x038C8C8F, 0x59A1A1F8, 0x09898980, 0x1A0D0D17, 0x65BFBFDA, 0xD7E6E631, 0x844242C6, 0xD06868B8, + 0x824141C3, 0x299999B0, 0x5A2D2D77, 0x1E0F0F11, 0x7BB0B0CB, 0xA85454FC, 0x6DBBBBD6, 0x2C16163A, +}; + +static CONST_TABLE(u4_t, AES_E2)[256] = { + 0xA5C66363, 0x84F87C7C, 0x99EE7777, 0x8DF67B7B, 0x0DFFF2F2, 0xBDD66B6B, 0xB1DE6F6F, 0x5491C5C5, + 0x50603030, 0x03020101, 0xA9CE6767, 0x7D562B2B, 0x19E7FEFE, 0x62B5D7D7, 0xE64DABAB, 0x9AEC7676, + 0x458FCACA, 0x9D1F8282, 0x4089C9C9, 0x87FA7D7D, 0x15EFFAFA, 0xEBB25959, 0xC98E4747, 0x0BFBF0F0, + 0xEC41ADAD, 0x67B3D4D4, 0xFD5FA2A2, 0xEA45AFAF, 0xBF239C9C, 0xF753A4A4, 0x96E47272, 0x5B9BC0C0, + 0xC275B7B7, 0x1CE1FDFD, 0xAE3D9393, 0x6A4C2626, 0x5A6C3636, 0x417E3F3F, 0x02F5F7F7, 0x4F83CCCC, + 0x5C683434, 0xF451A5A5, 0x34D1E5E5, 0x08F9F1F1, 0x93E27171, 0x73ABD8D8, 0x53623131, 0x3F2A1515, + 0x0C080404, 0x5295C7C7, 0x65462323, 0x5E9DC3C3, 0x28301818, 0xA1379696, 0x0F0A0505, 0xB52F9A9A, + 0x090E0707, 0x36241212, 0x9B1B8080, 0x3DDFE2E2, 0x26CDEBEB, 0x694E2727, 0xCD7FB2B2, 0x9FEA7575, + 0x1B120909, 0x9E1D8383, 0x74582C2C, 0x2E341A1A, 0x2D361B1B, 0xB2DC6E6E, 0xEEB45A5A, 0xFB5BA0A0, + 0xF6A45252, 0x4D763B3B, 0x61B7D6D6, 0xCE7DB3B3, 0x7B522929, 0x3EDDE3E3, 0x715E2F2F, 0x97138484, + 0xF5A65353, 0x68B9D1D1, 0x00000000, 0x2CC1EDED, 0x60402020, 0x1FE3FCFC, 0xC879B1B1, 0xEDB65B5B, + 0xBED46A6A, 0x468DCBCB, 0xD967BEBE, 0x4B723939, 0xDE944A4A, 0xD4984C4C, 0xE8B05858, 0x4A85CFCF, + 0x6BBBD0D0, 0x2AC5EFEF, 0xE54FAAAA, 0x16EDFBFB, 0xC5864343, 0xD79A4D4D, 0x55663333, 0x94118585, + 0xCF8A4545, 0x10E9F9F9, 0x06040202, 0x81FE7F7F, 0xF0A05050, 0x44783C3C, 0xBA259F9F, 0xE34BA8A8, + 0xF3A25151, 0xFE5DA3A3, 0xC0804040, 0x8A058F8F, 0xAD3F9292, 0xBC219D9D, 0x48703838, 0x04F1F5F5, + 0xDF63BCBC, 0xC177B6B6, 0x75AFDADA, 0x63422121, 0x30201010, 0x1AE5FFFF, 0x0EFDF3F3, 0x6DBFD2D2, + 0x4C81CDCD, 0x14180C0C, 0x35261313, 0x2FC3ECEC, 0xE1BE5F5F, 0xA2359797, 0xCC884444, 0x392E1717, + 0x5793C4C4, 0xF255A7A7, 0x82FC7E7E, 0x477A3D3D, 0xACC86464, 0xE7BA5D5D, 0x2B321919, 0x95E67373, + 0xA0C06060, 0x98198181, 0xD19E4F4F, 0x7FA3DCDC, 0x66442222, 0x7E542A2A, 0xAB3B9090, 0x830B8888, + 0xCA8C4646, 0x29C7EEEE, 0xD36BB8B8, 0x3C281414, 0x79A7DEDE, 0xE2BC5E5E, 0x1D160B0B, 0x76ADDBDB, + 0x3BDBE0E0, 0x56643232, 0x4E743A3A, 0x1E140A0A, 0xDB924949, 0x0A0C0606, 0x6C482424, 0xE4B85C5C, + 0x5D9FC2C2, 0x6EBDD3D3, 0xEF43ACAC, 0xA6C46262, 0xA8399191, 0xA4319595, 0x37D3E4E4, 0x8BF27979, + 0x32D5E7E7, 0x438BC8C8, 0x596E3737, 0xB7DA6D6D, 0x8C018D8D, 0x64B1D5D5, 0xD29C4E4E, 0xE049A9A9, + 0xB4D86C6C, 0xFAAC5656, 0x07F3F4F4, 0x25CFEAEA, 0xAFCA6565, 0x8EF47A7A, 0xE947AEAE, 0x18100808, + 0xD56FBABA, 0x88F07878, 0x6F4A2525, 0x725C2E2E, 0x24381C1C, 0xF157A6A6, 0xC773B4B4, 0x5197C6C6, + 0x23CBE8E8, 0x7CA1DDDD, 0x9CE87474, 0x213E1F1F, 0xDD964B4B, 0xDC61BDBD, 0x860D8B8B, 0x850F8A8A, + 0x90E07070, 0x427C3E3E, 0xC471B5B5, 0xAACC6666, 0xD8904848, 0x05060303, 0x01F7F6F6, 0x121C0E0E, + 0xA3C26161, 0x5F6A3535, 0xF9AE5757, 0xD069B9B9, 0x91178686, 0x5899C1C1, 0x273A1D1D, 0xB9279E9E, + 0x38D9E1E1, 0x13EBF8F8, 0xB32B9898, 0x33221111, 0xBBD26969, 0x70A9D9D9, 0x89078E8E, 0xA7339494, + 0xB62D9B9B, 0x223C1E1E, 0x92158787, 0x20C9E9E9, 0x4987CECE, 0xFFAA5555, 0x78502828, 0x7AA5DFDF, + 0x8F038C8C, 0xF859A1A1, 0x80098989, 0x171A0D0D, 0xDA65BFBF, 0x31D7E6E6, 0xC6844242, 0xB8D06868, + 0xC3824141, 0xB0299999, 0x775A2D2D, 0x111E0F0F, 0xCB7BB0B0, 0xFCA85454, 0xD66DBBBB, 0x3A2C1616, +}; + +static CONST_TABLE(u4_t, AES_E3)[256] = { + 0x63A5C663, 0x7C84F87C, 0x7799EE77, 0x7B8DF67B, 0xF20DFFF2, 0x6BBDD66B, 0x6FB1DE6F, 0xC55491C5, + 0x30506030, 0x01030201, 0x67A9CE67, 0x2B7D562B, 0xFE19E7FE, 0xD762B5D7, 0xABE64DAB, 0x769AEC76, + 0xCA458FCA, 0x829D1F82, 0xC94089C9, 0x7D87FA7D, 0xFA15EFFA, 0x59EBB259, 0x47C98E47, 0xF00BFBF0, + 0xADEC41AD, 0xD467B3D4, 0xA2FD5FA2, 0xAFEA45AF, 0x9CBF239C, 0xA4F753A4, 0x7296E472, 0xC05B9BC0, + 0xB7C275B7, 0xFD1CE1FD, 0x93AE3D93, 0x266A4C26, 0x365A6C36, 0x3F417E3F, 0xF702F5F7, 0xCC4F83CC, + 0x345C6834, 0xA5F451A5, 0xE534D1E5, 0xF108F9F1, 0x7193E271, 0xD873ABD8, 0x31536231, 0x153F2A15, + 0x040C0804, 0xC75295C7, 0x23654623, 0xC35E9DC3, 0x18283018, 0x96A13796, 0x050F0A05, 0x9AB52F9A, + 0x07090E07, 0x12362412, 0x809B1B80, 0xE23DDFE2, 0xEB26CDEB, 0x27694E27, 0xB2CD7FB2, 0x759FEA75, + 0x091B1209, 0x839E1D83, 0x2C74582C, 0x1A2E341A, 0x1B2D361B, 0x6EB2DC6E, 0x5AEEB45A, 0xA0FB5BA0, + 0x52F6A452, 0x3B4D763B, 0xD661B7D6, 0xB3CE7DB3, 0x297B5229, 0xE33EDDE3, 0x2F715E2F, 0x84971384, + 0x53F5A653, 0xD168B9D1, 0x00000000, 0xED2CC1ED, 0x20604020, 0xFC1FE3FC, 0xB1C879B1, 0x5BEDB65B, + 0x6ABED46A, 0xCB468DCB, 0xBED967BE, 0x394B7239, 0x4ADE944A, 0x4CD4984C, 0x58E8B058, 0xCF4A85CF, + 0xD06BBBD0, 0xEF2AC5EF, 0xAAE54FAA, 0xFB16EDFB, 0x43C58643, 0x4DD79A4D, 0x33556633, 0x85941185, + 0x45CF8A45, 0xF910E9F9, 0x02060402, 0x7F81FE7F, 0x50F0A050, 0x3C44783C, 0x9FBA259F, 0xA8E34BA8, + 0x51F3A251, 0xA3FE5DA3, 0x40C08040, 0x8F8A058F, 0x92AD3F92, 0x9DBC219D, 0x38487038, 0xF504F1F5, + 0xBCDF63BC, 0xB6C177B6, 0xDA75AFDA, 0x21634221, 0x10302010, 0xFF1AE5FF, 0xF30EFDF3, 0xD26DBFD2, + 0xCD4C81CD, 0x0C14180C, 0x13352613, 0xEC2FC3EC, 0x5FE1BE5F, 0x97A23597, 0x44CC8844, 0x17392E17, + 0xC45793C4, 0xA7F255A7, 0x7E82FC7E, 0x3D477A3D, 0x64ACC864, 0x5DE7BA5D, 0x192B3219, 0x7395E673, + 0x60A0C060, 0x81981981, 0x4FD19E4F, 0xDC7FA3DC, 0x22664422, 0x2A7E542A, 0x90AB3B90, 0x88830B88, + 0x46CA8C46, 0xEE29C7EE, 0xB8D36BB8, 0x143C2814, 0xDE79A7DE, 0x5EE2BC5E, 0x0B1D160B, 0xDB76ADDB, + 0xE03BDBE0, 0x32566432, 0x3A4E743A, 0x0A1E140A, 0x49DB9249, 0x060A0C06, 0x246C4824, 0x5CE4B85C, + 0xC25D9FC2, 0xD36EBDD3, 0xACEF43AC, 0x62A6C462, 0x91A83991, 0x95A43195, 0xE437D3E4, 0x798BF279, + 0xE732D5E7, 0xC8438BC8, 0x37596E37, 0x6DB7DA6D, 0x8D8C018D, 0xD564B1D5, 0x4ED29C4E, 0xA9E049A9, + 0x6CB4D86C, 0x56FAAC56, 0xF407F3F4, 0xEA25CFEA, 0x65AFCA65, 0x7A8EF47A, 0xAEE947AE, 0x08181008, + 0xBAD56FBA, 0x7888F078, 0x256F4A25, 0x2E725C2E, 0x1C24381C, 0xA6F157A6, 0xB4C773B4, 0xC65197C6, + 0xE823CBE8, 0xDD7CA1DD, 0x749CE874, 0x1F213E1F, 0x4BDD964B, 0xBDDC61BD, 0x8B860D8B, 0x8A850F8A, + 0x7090E070, 0x3E427C3E, 0xB5C471B5, 0x66AACC66, 0x48D89048, 0x03050603, 0xF601F7F6, 0x0E121C0E, + 0x61A3C261, 0x355F6A35, 0x57F9AE57, 0xB9D069B9, 0x86911786, 0xC15899C1, 0x1D273A1D, 0x9EB9279E, + 0xE138D9E1, 0xF813EBF8, 0x98B32B98, 0x11332211, 0x69BBD269, 0xD970A9D9, 0x8E89078E, 0x94A73394, + 0x9BB62D9B, 0x1E223C1E, 0x87921587, 0xE920C9E9, 0xCE4987CE, 0x55FFAA55, 0x28785028, 0xDF7AA5DF, + 0x8C8F038C, 0xA1F859A1, 0x89800989, 0x0D171A0D, 0xBFDA65BF, 0xE631D7E6, 0x42C68442, 0x68B8D068, + 0x41C38241, 0x99B02999, 0x2D775A2D, 0x0F111E0F, 0xB0CB7BB0, 0x54FCA854, 0xBBD66DBB, 0x163A2C16, +}; + +static CONST_TABLE(u4_t, AES_E4)[256] = { + 0x6363A5C6, 0x7C7C84F8, 0x777799EE, 0x7B7B8DF6, 0xF2F20DFF, 0x6B6BBDD6, 0x6F6FB1DE, 0xC5C55491, + 0x30305060, 0x01010302, 0x6767A9CE, 0x2B2B7D56, 0xFEFE19E7, 0xD7D762B5, 0xABABE64D, 0x76769AEC, + 0xCACA458F, 0x82829D1F, 0xC9C94089, 0x7D7D87FA, 0xFAFA15EF, 0x5959EBB2, 0x4747C98E, 0xF0F00BFB, + 0xADADEC41, 0xD4D467B3, 0xA2A2FD5F, 0xAFAFEA45, 0x9C9CBF23, 0xA4A4F753, 0x727296E4, 0xC0C05B9B, + 0xB7B7C275, 0xFDFD1CE1, 0x9393AE3D, 0x26266A4C, 0x36365A6C, 0x3F3F417E, 0xF7F702F5, 0xCCCC4F83, + 0x34345C68, 0xA5A5F451, 0xE5E534D1, 0xF1F108F9, 0x717193E2, 0xD8D873AB, 0x31315362, 0x15153F2A, + 0x04040C08, 0xC7C75295, 0x23236546, 0xC3C35E9D, 0x18182830, 0x9696A137, 0x05050F0A, 0x9A9AB52F, + 0x0707090E, 0x12123624, 0x80809B1B, 0xE2E23DDF, 0xEBEB26CD, 0x2727694E, 0xB2B2CD7F, 0x75759FEA, + 0x09091B12, 0x83839E1D, 0x2C2C7458, 0x1A1A2E34, 0x1B1B2D36, 0x6E6EB2DC, 0x5A5AEEB4, 0xA0A0FB5B, + 0x5252F6A4, 0x3B3B4D76, 0xD6D661B7, 0xB3B3CE7D, 0x29297B52, 0xE3E33EDD, 0x2F2F715E, 0x84849713, + 0x5353F5A6, 0xD1D168B9, 0x00000000, 0xEDED2CC1, 0x20206040, 0xFCFC1FE3, 0xB1B1C879, 0x5B5BEDB6, + 0x6A6ABED4, 0xCBCB468D, 0xBEBED967, 0x39394B72, 0x4A4ADE94, 0x4C4CD498, 0x5858E8B0, 0xCFCF4A85, + 0xD0D06BBB, 0xEFEF2AC5, 0xAAAAE54F, 0xFBFB16ED, 0x4343C586, 0x4D4DD79A, 0x33335566, 0x85859411, + 0x4545CF8A, 0xF9F910E9, 0x02020604, 0x7F7F81FE, 0x5050F0A0, 0x3C3C4478, 0x9F9FBA25, 0xA8A8E34B, + 0x5151F3A2, 0xA3A3FE5D, 0x4040C080, 0x8F8F8A05, 0x9292AD3F, 0x9D9DBC21, 0x38384870, 0xF5F504F1, + 0xBCBCDF63, 0xB6B6C177, 0xDADA75AF, 0x21216342, 0x10103020, 0xFFFF1AE5, 0xF3F30EFD, 0xD2D26DBF, + 0xCDCD4C81, 0x0C0C1418, 0x13133526, 0xECEC2FC3, 0x5F5FE1BE, 0x9797A235, 0x4444CC88, 0x1717392E, + 0xC4C45793, 0xA7A7F255, 0x7E7E82FC, 0x3D3D477A, 0x6464ACC8, 0x5D5DE7BA, 0x19192B32, 0x737395E6, + 0x6060A0C0, 0x81819819, 0x4F4FD19E, 0xDCDC7FA3, 0x22226644, 0x2A2A7E54, 0x9090AB3B, 0x8888830B, + 0x4646CA8C, 0xEEEE29C7, 0xB8B8D36B, 0x14143C28, 0xDEDE79A7, 0x5E5EE2BC, 0x0B0B1D16, 0xDBDB76AD, + 0xE0E03BDB, 0x32325664, 0x3A3A4E74, 0x0A0A1E14, 0x4949DB92, 0x06060A0C, 0x24246C48, 0x5C5CE4B8, + 0xC2C25D9F, 0xD3D36EBD, 0xACACEF43, 0x6262A6C4, 0x9191A839, 0x9595A431, 0xE4E437D3, 0x79798BF2, + 0xE7E732D5, 0xC8C8438B, 0x3737596E, 0x6D6DB7DA, 0x8D8D8C01, 0xD5D564B1, 0x4E4ED29C, 0xA9A9E049, + 0x6C6CB4D8, 0x5656FAAC, 0xF4F407F3, 0xEAEA25CF, 0x6565AFCA, 0x7A7A8EF4, 0xAEAEE947, 0x08081810, + 0xBABAD56F, 0x787888F0, 0x25256F4A, 0x2E2E725C, 0x1C1C2438, 0xA6A6F157, 0xB4B4C773, 0xC6C65197, + 0xE8E823CB, 0xDDDD7CA1, 0x74749CE8, 0x1F1F213E, 0x4B4BDD96, 0xBDBDDC61, 0x8B8B860D, 0x8A8A850F, + 0x707090E0, 0x3E3E427C, 0xB5B5C471, 0x6666AACC, 0x4848D890, 0x03030506, 0xF6F601F7, 0x0E0E121C, + 0x6161A3C2, 0x35355F6A, 0x5757F9AE, 0xB9B9D069, 0x86869117, 0xC1C15899, 0x1D1D273A, 0x9E9EB927, + 0xE1E138D9, 0xF8F813EB, 0x9898B32B, 0x11113322, 0x6969BBD2, 0xD9D970A9, 0x8E8E8907, 0x9494A733, + 0x9B9BB62D, 0x1E1E223C, 0x87879215, 0xE9E920C9, 0xCECE4987, 0x5555FFAA, 0x28287850, 0xDFDF7AA5, + 0x8C8C8F03, 0xA1A1F859, 0x89898009, 0x0D0D171A, 0xBFBFDA65, 0xE6E631D7, 0x4242C684, 0x6868B8D0, + 0x4141C382, 0x9999B029, 0x2D2D775A, 0x0F0F111E, 0xB0B0CB7B, 0x5454FCA8, 0xBBBBD66D, 0x16163A2C, +}; + +#define msbf4_read(p) ((p)[0]<<24 | (p)[1]<<16 | (p)[2]<<8 | (p)[3]) +#define msbf4_write(p,v) (p)[0]=(v)>>24,(p)[1]=(v)>>16,(p)[2]=(v)>>8,(p)[3]=(v) +#define swapmsbf(x) ( (x&0xFF)<<24 | (x&0xFF00)<<8 | (x&0xFF0000)>>8 | (x>>24) ) + +#define u1(v) ((u1_t)(v)) + +#define AES_key4(r1,r2,r3,r0,i) r1 = ki[i+1]; \ + r2 = ki[i+2]; \ + r3 = ki[i+3]; \ + r0 = ki[i] + +#define AES_expr4(r1,r2,r3,r0,i) r1 ^= TABLE_GET_U4(AES_E4, u1(i)); \ + r2 ^= TABLE_GET_U4(AES_E3, u1(i>>8)); \ + r3 ^= TABLE_GET_U4(AES_E2, u1(i>>16)); \ + r0 ^= TABLE_GET_U4(AES_E1, (i>>24)) + +#define AES_expr(a,r0,r1,r2,r3,i) a = ki[i]; \ + a ^= ((u4_t)TABLE_GET_U1(AES_S, r0>>24 )<<24); \ + a ^= ((u4_t)TABLE_GET_U1(AES_S, u1(r1>>16))<<16); \ + a ^= ((u4_t)TABLE_GET_U1(AES_S, u1(r2>> 8))<< 8); \ + a ^= (u4_t)TABLE_GET_U1(AES_S, u1(r3) ) + +// global area for passing parameters (aux, key) and for storing round keys +u4_t AESAUX[16/sizeof(u4_t)]; +u4_t AESKEY[11*16/sizeof(u4_t)]; + +// generate 1+10 roundkeys for encryption with 128-bit key +// read 128-bit key from AESKEY in MSBF, generate roundkey words in place +static void aesroundkeys () { + int i; + u4_t b; + + for( i=0; i<4; i++) { + AESKEY[i] = swapmsbf(AESKEY[i]); + } + + b = AESKEY[3]; + for( ; i<44; i++ ) { + if( i%4==0 ) { + // b = SubWord(RotWord(b)) xor Rcon[i/4] + b = ((u4_t)TABLE_GET_U1(AES_S, u1(b >> 16)) << 24) ^ + ((u4_t)TABLE_GET_U1(AES_S, u1(b >> 8)) << 16) ^ + ((u4_t)TABLE_GET_U1(AES_S, u1(b) ) << 8) ^ + ((u4_t)TABLE_GET_U1(AES_S, b >> 24 ) ) ^ + TABLE_GET_U4(AES_RCON, (i-4)/4); + } + AESKEY[i] = b ^= AESKEY[i-4]; + } +} + +u4_t os_aes (u1_t mode, xref2u1_t buf, u2_t len) { + + aesroundkeys(); + + if( mode & AES_MICNOAUX ) { + AESAUX[0] = AESAUX[1] = AESAUX[2] = AESAUX[3] = 0; + } else { + AESAUX[0] = swapmsbf(AESAUX[0]); + AESAUX[1] = swapmsbf(AESAUX[1]); + AESAUX[2] = swapmsbf(AESAUX[2]); + AESAUX[3] = swapmsbf(AESAUX[3]); + } + + while( (signed char)len > 0 ) { + u4_t a0, a1, a2, a3; + u4_t t0, t1, t2, t3; + u4_t *ki, *ke; + + // load input block + if( (mode & AES_CTR) || ((mode & AES_MIC) && (mode & AES_MICNOAUX)==0) ) { // load CTR block or first MIC block + a0 = AESAUX[0]; + a1 = AESAUX[1]; + a2 = AESAUX[2]; + a3 = AESAUX[3]; + } + else if( (mode & AES_MIC) && len <= 16 ) { // last MIC block + a0 = a1 = a2 = a3 = 0; // load null block + mode |= ((len == 16) ? 1 : 2) << 4; // set MICSUB: CMAC subkey K1 or K2 + } else + LOADDATA: { // load data block (partially) + for(t0=0; t0<16; t0++) { + t1 = (t1<<8) | ((t0<len) ? buf[t0] : (t0==len) ? 0x80 : 0x00); + if((t0&3)==3) { + a0 = a1; + a1 = a2; + a2 = a3; + a3 = t1; + } + } + if( mode & AES_MIC ) { + a0 ^= AESAUX[0]; + a1 ^= AESAUX[1]; + a2 ^= AESAUX[2]; + a3 ^= AESAUX[3]; + } + } + + // perform AES encryption on block in a0-a3 + ki = AESKEY; + ke = ki + 8*4; + a0 ^= ki[0]; + a1 ^= ki[1]; + a2 ^= ki[2]; + a3 ^= ki[3]; + do { + AES_key4 (t1,t2,t3,t0,4); + AES_expr4(t1,t2,t3,t0,a0); + AES_expr4(t2,t3,t0,t1,a1); + AES_expr4(t3,t0,t1,t2,a2); + AES_expr4(t0,t1,t2,t3,a3); + + AES_key4 (a1,a2,a3,a0,8); + AES_expr4(a1,a2,a3,a0,t0); + AES_expr4(a2,a3,a0,a1,t1); + AES_expr4(a3,a0,a1,a2,t2); + AES_expr4(a0,a1,a2,a3,t3); + } while( (ki+=8) < ke ); + + AES_key4 (t1,t2,t3,t0,4); + AES_expr4(t1,t2,t3,t0,a0); + AES_expr4(t2,t3,t0,t1,a1); + AES_expr4(t3,t0,t1,t2,a2); + AES_expr4(t0,t1,t2,t3,a3); + + AES_expr(a0,t0,t1,t2,t3,8); + AES_expr(a1,t1,t2,t3,t0,9); + AES_expr(a2,t2,t3,t0,t1,10); + AES_expr(a3,t3,t0,t1,t2,11); + // result of AES encryption in a0-a3 + + if( mode & AES_MIC ) { + if( (t1 = (mode & AES_MICSUB) >> 4) != 0 ) { // last block + do { + // compute CMAC subkey K1 and K2 + t0 = a0 >> 31; // save MSB + a0 = (a0 << 1) | (a1 >> 31); + a1 = (a1 << 1) | (a2 >> 31); + a2 = (a2 << 1) | (a3 >> 31); + a3 = (a3 << 1); + if( t0 ) a3 ^= 0x87; + } while( --t1 ); + + AESAUX[0] ^= a0; + AESAUX[1] ^= a1; + AESAUX[2] ^= a2; + AESAUX[3] ^= a3; + mode &= ~AES_MICSUB; + goto LOADDATA; + } else { + // save cipher block as new iv + AESAUX[0] = a0; + AESAUX[1] = a1; + AESAUX[2] = a2; + AESAUX[3] = a3; + } + } else { // CIPHER + if( mode & AES_CTR ) { // xor block (partially) + t0 = (len > 16) ? 16: len; + for(t1=0; t1<t0; t1++) { + buf[t1] ^= (a0>>24); + a0 <<= 8; + if((t1&3)==3) { + a0 = a1; + a1 = a2; + a2 = a3; + } + } + // update counter + AESAUX[3]++; + } else { // ECB + // store block + msbf4_write(buf+0, a0); + msbf4_write(buf+4, a1); + msbf4_write(buf+8, a2); + msbf4_write(buf+12, a3); + } + } + + // update block state + if( (mode & AES_MIC)==0 || (mode & AES_MICNOAUX) ) { + buf += 16; + len -= 16; + } + mode |= AES_MICNOAUX; + } + return AESAUX[0]; +} + +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/other.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/other.c new file mode 100644 index 0000000..7093fb4 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/aes/other.c @@ -0,0 +1,145 @@ +/******************************************************************************* + * Copyright (c) 2016 Matthijs Kooijman + * + * LICENSE + * + * Permission is hereby granted, free of charge, to anyone + * obtaining a copy of this document and accompanying files, + * to do whatever they want with them without any restriction, + * including, but not limited to, copying, modification and + * redistribution. + * + * NO WARRANTY OF ANY KIND IS PROVIDED. + *******************************************************************************/ + +/* + * The original LMIC AES implementation integrates raw AES encryption + * with CMAC and AES-CTR in a single piece of code. Most other AES + * implementations (only) offer raw single block AES encryption, so this + * file contains an implementation of CMAC and AES-CTR, and offers the + * same API through the os_aes() function as the original AES + * implementation. This file assumes that there is an encryption + * function available with this signature: + * + * extern "C" void lmic_aes_encrypt(u1_t *data, u1_t *key); + * + * That takes a single 16-byte buffer and encrypts it wit the given + * 16-byte key. + */ + +#include "../lmic/oslmic.h" + +#if !defined(USE_ORIGINAL_AES) + +// This should be defined elsewhere +void lmic_aes_encrypt(u1_t *data, u1_t *key); + +// global area for passing parameters (aux, key) +u4_t AESAUX[16/sizeof(u4_t)]; +u4_t AESKEY[16/sizeof(u4_t)]; + +// Shift the given buffer left one bit +static void shift_left(xref2u1_t buf, u1_t len) { + while (len--) { + u1_t next = len ? buf[1] : 0; + + u1_t val = (*buf << 1); + if (next & 0x80) + val |= 1; + *buf++ = val; + } +} + +// Apply RFC4493 CMAC, using AESKEY as the key. If prepend_aux is true, +// AESAUX is prepended to the message. AESAUX is used as working memory +// in any case. The CMAC result is returned in AESAUX as well. +static void os_aes_cmac(xref2u1_t buf, u2_t len, u1_t prepend_aux) { + if (prepend_aux) + lmic_aes_encrypt(AESaux, AESkey); + else + memset (AESaux, 0, 16); + + while (len > 0) { + u1_t need_padding = 0; + for (u1_t i = 0; i < 16; ++i, ++buf, --len) { + if (len == 0) { + // The message is padded with 0x80 and then zeroes. + // Since zeroes are no-op for xor, we can just skip them + // and leave AESAUX unchanged for them. + AESaux[i] ^= 0x80; + need_padding = 1; + break; + } + AESaux[i] ^= *buf; + } + + if (len == 0) { + // Final block, xor with K1 or K2. K1 and K2 are calculated + // by encrypting the all-zeroes block and then applying some + // shifts and xor on that. + u1_t final_key[16]; + memset(final_key, 0, sizeof(final_key)); + lmic_aes_encrypt(final_key, AESkey); + + // Calculate K1 + u1_t msb = final_key[0] & 0x80; + shift_left(final_key, sizeof(final_key)); + if (msb) + final_key[sizeof(final_key)-1] ^= 0x87; + + // If the final block was not complete, calculate K2 from K1 + if (need_padding) { + msb = final_key[0] & 0x80; + shift_left(final_key, sizeof(final_key)); + if (msb) + final_key[sizeof(final_key)-1] ^= 0x87; + } + + // Xor with K1 or K2 + for (u1_t i = 0; i < sizeof(final_key); ++i) + AESaux[i] ^= final_key[i]; + } + + lmic_aes_encrypt(AESaux, AESkey); + } +} + +// Run AES-CTR using the key in AESKEY and using AESAUX as the +// counter block. The last byte of the counter block will be incremented +// for every block. The given buffer will be encrypted in place. +static void os_aes_ctr (xref2u1_t buf, u2_t len) { + u1_t ctr[16]; + while (len) { + // Encrypt the counter block with the selected key + memcpy(ctr, AESaux, sizeof(ctr)); + lmic_aes_encrypt(ctr, AESkey); + + // Xor the payload with the resulting ciphertext + for (u1_t i = 0; i < 16 && len > 0; i++, len--, buf++) + *buf ^= ctr[i]; + + // Increment the block index byte + AESaux[15]++; + } +} + +u4_t os_aes (u1_t mode, xref2u1_t buf, u2_t len) { + switch (mode & ~AES_MICNOAUX) { + case AES_MIC: + os_aes_cmac(buf, len, /* prepend_aux */ !(mode & AES_MICNOAUX)); + return os_rmsbf4(AESaux); + + case AES_ENC: + // TODO: Check / handle when len is not a multiple of 16 + for (u1_t i = 0; i < len; i += 16) + lmic_aes_encrypt(buf+i, AESkey); + break; + + case AES_CTR: + os_aes_ctr(buf, len); + break; + } + return 0; +} + +#endif // !defined(USE_ORIGINAL_AES) diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic.h new file mode 100644 index 0000000..4e8d953 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic.h @@ -0,0 +1,34 @@ +/* + +Module: arduino_lmic.h + +Function: + Arduino-LMIC C++ top-level include file + +Copyright & License: + See accompanying LICENSE file. + +Author: + Matthijs Kooijman 2015 + Terry Moore, MCCI November 2018 + +*/ + +#pragma once + +#ifndef _ARDUINO_LMIC_H_ +# define _ARDUINO_LMIC_H_ + +#ifdef __cplusplus +extern "C"{ +#endif + +#include "lmic/lmic.h" +#include "lmic/lmic_bandplan.h" +#include "lmic/lmic_util.h" + +#ifdef __cplusplus +} +#endif + +#endif /* _ARDUINO_LMIC_H_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_boards.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_boards.h new file mode 100644 index 0000000..cf4e1d7 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_boards.h @@ -0,0 +1,47 @@ +/* + +Module: arduino_lmic_hal_boards.h + +Function: + Arduino-LMIC C++ HAL pinmaps for various boards + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI November 2018 + +*/ + +#pragma once + +#ifndef _arduino_lmic_hal_boards_h_ +# define _arduino_lmic_hal_boards_h_ + +#include "arduino_lmic_hal_configuration.h" + +namespace Multipass_LMIC { + +const HalPinmap_t *GetPinmap_FeatherM0LoRa(); +const HalPinmap_t *GetPinmap_Feather32U4LoRa(); + +const HalPinmap_t *GetPinmap_Catena4420(); +const HalPinmap_t *GetPinmap_Catena4551(); +const HalPinmap_t *GetPinmap_Catena4610(); +const HalPinmap_t *GetPinmap_Catena4610(); +const HalPinmap_t *GetPinmap_Catena4611(); +const HalPinmap_t *GetPinmap_Catena4612(); +const HalPinmap_t *GetPinmap_Catena4617(); +const HalPinmap_t *GetPinmap_Catena4618(); +const HalPinmap_t *GetPinmap_Catena4630(); +const HalPinmap_t *GetPinmap_Catena4801(); +const HalPinmap_t *GetPinmap_Catena4802(); +const HalPinmap_t* GetPinmap_ttgo_lora32_v1(); +const HalPinmap_t* GetPinmap_heltec_lora32(); +const HalPinmap_t* GetPinmap_Disco_L072cz_Lrwan1(); + +const HalPinmap_t *GetPinmap_ThisBoard(); + +}; /* namespace Arduino_LIMC */ + +#endif /* _arduino_lmic_hal_boards_h_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_configuration.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_configuration.h new file mode 100644 index 0000000..c0d91cf --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_hal_configuration.h @@ -0,0 +1,117 @@ +/* + +Module: arduino_lmic_hal_configuration.h + +Function: + Arduino-LMIC C++ HAL configuration APIs + +Copyright & License: + See accompanying LICENSE file. + +Author: + Matthijs Kooijman 2015 + Terry Moore, MCCI November 2018 + +*/ +#pragma once + +#ifndef _arduino_lmic_hal_configuration_h_ +# define _arduino_lmic_hal_configuration_h_ + +#include <stdint.h> +#include "lmic/lmic_env.h" + +namespace Multipass_LMIC { + +/* these types should match the types used by the LMIC */ +typedef int32_t ostime_t; + +// this type is used when we need to represent a threee-state signal +enum class ThreeState_t : uint8_t { + Off = 0, + On = 1, + HiZ = 2 +}; + +// forward reference +class HalConfiguration_t; + +// +// for legacy reasons, we need a plain-old-data C-like +// structure that defines the "pin mapping" for the +// common pins. Many clients initialize an instance of +// this structure using named-field initialization. +// +// Be careful of alignment below. +struct HalPinmap_t { + // Use this for any unused pins. + static constexpr uint8_t UNUSED_PIN = 0xff; + static constexpr int NUM_DIO = 3; + // for backward compatibility... + static constexpr uint8_t LMIC_UNUSED_PIN = UNUSED_PIN; + + /* the contents */ + uint8_t nss; // byte 0: pin for select + uint8_t rxtx; // byte 1: pin for rx/tx control + uint8_t rst; // byte 2: pin for reset + uint8_t dio[NUM_DIO]; // bytes 3..5: pins for DIO0, DOI1, DIO2 + // true if we must set rxtx for rx_active, false for tx_active + uint8_t rxtx_rx_active; // byte 6: polarity of rxtx active + int8_t rssi_cal; // byte 7: cal in dB -- added to RSSI + // measured prior to decision. + // Must include noise guardband! + uint32_t spi_freq; // bytes 8..11: SPI freq in Hz. + + // optional pointer to configuration object (bytes 12..15) + HalConfiguration_t *pConfig; + }; + +class HalConfiguration_t + { +public: + HalConfiguration_t() {}; + + // these must match the constants in radio.c + enum class TxPowerPolicy_t : uint8_t + { + RFO, + PA_BOOST, + PA_BOOST_20dBm + }; + + virtual ostime_t setModuleActive(bool state) { + LMIC_API_PARAMETER(state); + + // by default, if not overridden, do nothing + // and return 0 to indicate that the caller + // need not delay. + return 0; + } + + virtual void begin(void) {} + virtual void end(void) {} + virtual bool queryUsingTcxo(void) { return false; } + + // compute desired transmit power policy. HopeRF needs + // (and previous versions of this library always chose) + // PA_BOOST mode. So that's our default. Override this + // for the Murata module. + virtual TxPowerPolicy_t getTxPowerPolicy( + TxPowerPolicy_t policy, + int8_t requestedPower, + uint32_t frequency + ) + { + LMIC_API_PARAMETER(policy); + LMIC_API_PARAMETER(requestedPower); + LMIC_API_PARAMETER(frequency); + // default: use PA_BOOST exclusively + return TxPowerPolicy_t::PA_BOOST; + } + }; + +bool hal_init_with_pinmap(const HalPinmap_t *pPinmap); + +}; // end namespace Multipass_LMIC + +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_lorawan_compliance.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_lorawan_compliance.h new file mode 100644 index 0000000..ceedc1b --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_lorawan_compliance.h @@ -0,0 +1,31 @@ +/* + +Module: arduino_lmic_lorawan_compliance.h + +Function: + Arduino-LMIC C++ include file for LoRaWAN compliance + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI March 2019 + +*/ + +#pragma once + +#ifndef _ARDUINO_LMIC_LORAWAN_COMPLIANCE_H_ +# define _ARDUINO_LMIC_LORAWAN_COMPLIANCE_H_ + +#ifdef __cplusplus +extern "C"{ +#endif + +#include "lmic/lorawan_spec_compliance.h" + +#ifdef __cplusplus +} +#endif + +#endif /* _ARDUINO_LMIC_LORAWAN_COMPLIANCE_H_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_user_configuration.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_user_configuration.h new file mode 100644 index 0000000..c7c9576 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/arduino_lmic_user_configuration.h @@ -0,0 +1,30 @@ +/* + +Module: arduino_lmic_user_configuration.h + +Function: + Get the Arduino-LMIC configuration into scope + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI November 2018 + +*/ +#pragma once + +#ifndef _arduino_lmic_user_configuration_h_ +# define _arduino_lmic_user_configuration_h_ + +# ifdef __cplusplus +extern "C" { +# endif + +# include "lmic/lmic_config_preconditions.h" + +# ifdef __cplusplus +} +# endif + +#endif /* _arduino_lmic_user_configuration_h_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.cc b/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.cc new file mode 100644 index 0000000..987c8e2 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.cc @@ -0,0 +1,437 @@ +/******************************************************************************* + * Copyright (c) 2015 Matthijs Kooijman + * Copyright (c) 2018-2019 MCCI Corporation + * Copyright (C) 2021 Daniel Friesel + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * which is available at http://www.eclipse.org/legal/epl-v10.html + * + * This the HAL to run LMIC on top of multipass, adapted from the HAL to + * run LMIC on top of the Arduino environment. + *******************************************************************************/ + +#include "arch.h" +#include "driver/gpio.h" +#include "driver/spi.h" +#include <avr/interrupt.h> +// include all the lmic header files, including ../lmic/hal.h +#include "../lmic.h" +// include the C++ hal.h +#include "hal.h" +// we may need some things from stdio. +#include <stdio.h> + +// ----------------------------------------------------------------------------- +// I/O + +static const Multipass_LMIC::HalPinmap_t *plmic_pins; +static Multipass_LMIC::HalConfiguration_t *pHalConfig; +static Multipass_LMIC::HalConfiguration_t nullHalConig; +static hal_failure_handler_t* custom_hal_failure_handler = NULL; + +// 16bit hardware counter + 16bit overflow counter == 32bit tick counter +static volatile uint16_t timer3_overflow = 0; + +static void hal_interrupt_init(); // Fwd declaration + +static void hal_io_init () { + // NSS and DIO0 are required, DIO1 is required for LoRa, DIO2 for FSK + ASSERT(plmic_pins->nss != LMIC_UNUSED_PIN); + ASSERT(plmic_pins->dio[0] != LMIC_UNUSED_PIN); + ASSERT(plmic_pins->dio[1] != LMIC_UNUSED_PIN || plmic_pins->dio[2] != LMIC_UNUSED_PIN); + +// Serial.print("nss: "); Serial.println(plmic_pins->nss); +// Serial.print("rst: "); Serial.println(plmic_pins->rst); +// Serial.print("dio[0]: "); Serial.println(plmic_pins->dio[0]); +// Serial.print("dio[1]: "); Serial.println(plmic_pins->dio[1]); +// Serial.print("dio[2]: "); Serial.println(plmic_pins->dio[2]); + + // initialize SPI chip select to high (it's active low) + gpio.output(plmic_pins->nss, 1); + + if (plmic_pins->rxtx != LMIC_UNUSED_PIN) { + // initialize to RX + gpio.output(plmic_pins->rxtx, !plmic_pins->rxtx_rx_active); + } + if (plmic_pins->rst != LMIC_UNUSED_PIN) { + // initialize RST to floating + gpio.input(plmic_pins->rst); + } + + hal_interrupt_init(); +} + +// val == 1 => tx +void hal_pin_rxtx (u1_t val) { + if (plmic_pins->rxtx != LMIC_UNUSED_PIN) + gpio.write(plmic_pins->rxtx, val != plmic_pins->rxtx_rx_active); +} + +// set radio RST pin to given value (or keep floating!) +void hal_pin_rst (u1_t val) { + if (plmic_pins->rst == LMIC_UNUSED_PIN) + return; + + if(val == 0 || val == 1) { // drive pin + gpio.output(plmic_pins->rst, val); + } else { // keep pin floating + gpio.input(plmic_pins->rst); + } +} + +s1_t hal_getRssiCal (void) { + return plmic_pins->rssi_cal; +} + +//-------------------- +// Interrupt handling +//-------------------- +static constexpr unsigned NUM_DIO_INTERRUPT = 3; +static_assert(NUM_DIO_INTERRUPT <= NUM_DIO, "Number of interrupt-sensitive lines must be less than number of GPIOs"); +static ostime_t interrupt_time[NUM_DIO_INTERRUPT] = {0}; + +#if !defined(LMIC_USE_INTERRUPTS) +static void hal_interrupt_init() { + gpio.input(plmic_pins->dio[0]); + if (plmic_pins->dio[1] != LMIC_UNUSED_PIN) + gpio.input(plmic_pins->dio[1]); + if (plmic_pins->dio[2] != LMIC_UNUSED_PIN) + gpio.input(plmic_pins->dio[2]); + static_assert(NUM_DIO_INTERRUPT == 3, "Number of interrupt lines must be set to 3"); +} + +static bool dio_states[NUM_DIO_INTERRUPT] = {0}; +void hal_pollPendingIRQs_helper() { + uint8_t i; + for (i = 0; i < NUM_DIO_INTERRUPT; ++i) { + if (plmic_pins->dio[i] == LMIC_UNUSED_PIN) + continue; + + if (dio_states[i] != (gpio.read(plmic_pins->dio[i]) ? true : false)) { + dio_states[i] = !dio_states[i]; + if (dio_states[i] && interrupt_time[i] == 0) { + ostime_t const now = os_getTime(); + interrupt_time[i] = now ? now : 1; + } + } + } +} + +#else +// Interrupt handlers + +static void hal_isrPin0() { + if (interrupt_time[0] == 0) { + ostime_t now = os_getTime(); + interrupt_time[0] = now ? now : 1; + } +} +static void hal_isrPin1() { + if (interrupt_time[1] == 0) { + ostime_t now = os_getTime(); + interrupt_time[1] = now ? now : 1; + } +} +static void hal_isrPin2() { + if (interrupt_time[2] == 0) { + ostime_t now = os_getTime(); + interrupt_time[2] = now ? now : 1; + } +} + +typedef void (*isr_t)(); +static const isr_t interrupt_fns[NUM_DIO_INTERRUPT] = {hal_isrPin0, hal_isrPin1, hal_isrPin2}; +static_assert(NUM_DIO_INTERRUPT == 3, "number of interrupts must be 3 for initializing interrupt_fns[]"); + +static void hal_interrupt_init() { + for (uint8_t i = 0; i < NUM_DIO_INTERRUPT; ++i) { + if (plmic_pins->dio[i] == LMIC_UNUSED_PIN) + continue; + + pinMode(plmic_pins->dio[i], INPUT); + attachInterrupt(digitalPinToInterrupt(plmic_pins->dio[i]), interrupt_fns[i], RISING); + } +} +#endif // LMIC_USE_INTERRUPTS + +void hal_processPendingIRQs() { + uint8_t i; + for (i = 0; i < NUM_DIO_INTERRUPT; ++i) { + ostime_t iTime; + if (plmic_pins->dio[i] == LMIC_UNUSED_PIN) + continue; + + // NOTE(tmm@mcci.com): if using interrupts, this next step + // assumes uniprocessor and fairly strict memory ordering + // semantics relative to ISRs. It would be better to use + // interlocked-exchange, but that's really far beyond + // Arduino semantics. Because our ISRs use "first time + // stamp" semantics, we don't have a value-race. But if + // we were to disable ints here, we might observe a second + // edge that we'll otherwise miss. Not a problem in this + // use case, as the radio won't release IRQs until we + // explicitly clear them. + iTime = interrupt_time[i]; + if (iTime) { + interrupt_time[i] = 0; + radio_irq_handler_v2(i, iTime); + } + } +} + +// ----------------------------------------------------------------------------- +// SPI + +static void hal_spi_init () { + spi.setup(); +} + +static void hal_spi_trx(u1_t cmd, u1_t* buf, size_t len, bit_t is_read) { + u1_t nss = plmic_pins->nss; + + gpio.write(nss, 0); + + spi.xmit(1, &cmd, 0, NULL); + spi.xmit(is_read ? 0 : len, buf, is_read ? len : 0, buf); + + gpio.write(nss, 1); +} + +void hal_spi_write(u1_t cmd, const u1_t* buf, size_t len) { + hal_spi_trx(cmd, (u1_t*)buf, len, 0); +} + +void hal_spi_read(u1_t cmd, u1_t* buf, size_t len) { + hal_spi_trx(cmd, buf, len, 1); +} + +// ----------------------------------------------------------------------------- +// TIME + +static void hal_time_init () { + /* + * Use 16-bit Timer 3 for ticks (one tick == 32 µs == 256 CPU cycles). + * Increment global 16-bit variable timer3_overflow on overflow. + * Resulting counter resolution: 32 bit (overflows after 38 hours). + */ + TCCR3A = 0; + TCCR3B = _BV(WGM12) | _BV(CS32); // normal mode, /256 + TIMSK3 = _BV(TOIE3); +} + +u4_t hal_ticks () { + return ((uint32_t)timer3_overflow << 16) | TCNT3; +} + +// Returns the number of ticks until time. Negative values indicate that +// time has already passed. +static s4_t delta_time(u4_t time) { + return (s4_t)(time - hal_ticks()); +} + +u4_t hal_waitUntil (u4_t time) { + sei(); + s4_t delta = delta_time(time); + cli(); + // check for already too late. + if (delta < 0) + return -delta; + + // Enable interrupts so that timer3_overflow is incremented on overflow. + sei(); + while (delta_time(time) > 0); + cli(); + + return 0; +} + +// check and rewind for target time +u1_t hal_checkTimer (u4_t time) { + // No need to schedule wakeup, since we're not sleeping + return delta_time(time) <= 0; +} + +static uint8_t irqlevel = 0; + +void hal_disableIRQs () { + cli(); + irqlevel++; +} + +void hal_enableIRQs () { + if(--irqlevel == 0) { + sei(); + +#if !defined(LMIC_USE_INTERRUPTS) + // Instead of using proper interrupts (which are a bit tricky + // and/or not available on all pins on AVR), just poll the pin + // values. Since os_runloop disables and re-enables interrupts, + // putting this here makes sure we check at least once every + // loop. + // + // As an additional bonus, this prevents the can of worms that + // we would otherwise get for running SPI transfers inside ISRs. + // We merely collect the edges and timestamps here; we wait for + // a call to hal_processPendingIRQs() before dispatching. + hal_pollPendingIRQs_helper(); +#endif /* !defined(LMIC_USE_INTERRUPTS) */ + } +} + +uint8_t hal_getIrqLevel(void) { + return irqlevel; +} + +void hal_sleep () { + // Not implemented +} + +// ----------------------------------------------------------------------------- + +#if defined(LMIC_PRINTF_TO) +#if !defined(__AVR) +static ssize_t uart_putchar (void *, const char *buf, size_t len) { + return LMIC_PRINTF_TO.write((const uint8_t *)buf, len); +} + +static cookie_io_functions_t functions = + { + .read = NULL, + .write = uart_putchar, + .seek = NULL, + .close = NULL + }; + +void hal_printf_init() { + stdout = fopencookie(NULL, "w", functions); + if (stdout != nullptr) { + setvbuf(stdout, NULL, _IONBF, 0); + } +} +#else // defined(__AVR) +static int uart_putchar (char c, FILE *) +{ + LMIC_PRINTF_TO.write(c) ; + return 0 ; +} + +void hal_printf_init() { + // create a FILE structure to reference our UART output function + static FILE uartout; + memset(&uartout, 0, sizeof(uartout)); + + // fill in the UART file descriptor with pointer to writer. + fdev_setup_stream (&uartout, uart_putchar, NULL, _FDEV_SETUP_WRITE); + + // The uart is the standard output device STDOUT. + stdout = &uartout ; +} + +#endif // !defined(ESP8266) || defined(ESP31B) || defined(ESP32) +#endif // defined(LMIC_PRINTF_TO) + +void hal_init (void) { + // use the global constant + Multipass_LMIC::hal_init_with_pinmap(&lmic_pins); +} + +// hal_init_ex is a C API routine, written in C++, and it's called +// with a pointer to an lmic_pinmap. +void hal_init_ex (const void *pContext) { + const lmic_pinmap * const pHalPinmap = (const lmic_pinmap *) pContext; + if (! Multipass_LMIC::hal_init_with_pinmap(pHalPinmap)) { + hal_failed(__FILE__, __LINE__); + } +} + +// C++ API: initialize the HAL properly with a configuration object +namespace Multipass_LMIC { +bool hal_init_with_pinmap(const HalPinmap_t *pPinmap) + { + if (pPinmap == nullptr) + return false; + + // set the static pinmap pointer. + plmic_pins = pPinmap; + + // set the static HalConfiguration pointer. + HalConfiguration_t * const pThisHalConfig = pPinmap->pConfig; + + if (pThisHalConfig != nullptr) + pHalConfig = pThisHalConfig; + else + pHalConfig = &nullHalConig; + + pHalConfig->begin(); + + // configure radio I/O and interrupt handler + hal_io_init(); + // configure radio SPI + hal_spi_init(); + // configure timer and interrupt handler + hal_time_init(); +#if defined(LMIC_PRINTF_TO) + // printf support + hal_printf_init(); +#endif + // declare success + return true; + } +}; // namespace Multipass_LMIC + + +void hal_failed (const char *file, u2_t line) { + if (custom_hal_failure_handler != NULL) { + (*custom_hal_failure_handler)(file, line); + } + +#if defined(LMIC_FAILURE_TO) + LMIC_FAILURE_TO.println("FAILURE "); + LMIC_FAILURE_TO.print(file); + LMIC_FAILURE_TO.print(':'); + LMIC_FAILURE_TO.println(line); + LMIC_FAILURE_TO.flush(); +#endif + + hal_disableIRQs(); + + // Infinite loop + while (1) { + ; + } +} + +void hal_set_failure_handler(const hal_failure_handler_t* const handler) { + custom_hal_failure_handler = handler; +} + +ostime_t hal_setModuleActive (bit_t val) { + // setModuleActive() takes a c++ bool, so + // it effectively says "val != 0". We + // don't have to. + return pHalConfig->setModuleActive(val); +} + +bit_t hal_queryUsingTcxo(void) { + return pHalConfig->queryUsingTcxo(); +} + +uint8_t hal_getTxPowerPolicy( + u1_t inputPolicy, + s1_t requestedPower, + u4_t frequency + ) { + return (uint8_t) pHalConfig->getTxPowerPolicy( + Multipass_LMIC::HalConfiguration_t::TxPowerPolicy_t(inputPolicy), + requestedPower, + frequency + ); +} + +#ifndef __acweaving +ISR(TIMER3_OVF_vect) +{ + timer3_overflow++; +} +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.h new file mode 100644 index 0000000..2339540 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/hal/hal.h @@ -0,0 +1,32 @@ +/******************************************************************************* + * Copyright (c) 2015-2016 Matthijs Kooijman + * Copyright (c) 2016-2018 MCCI Corporation + * + * All rights reserved. This program and the accompanying materials + * are made available under the terms of the Eclipse Public License v1.0 + * which accompanies this distribution, and is available at + * http://www.eclipse.org/legal/epl-v10.html + * + * This the HAL to run LMIC on top of the Arduino environment. + *******************************************************************************/ +#ifndef _hal_hal_h_ +#define _hal_hal_h_ + +#include "arduino_lmic_hal_configuration.h" + +// for compatbility reasons, we need to disclose the configuration +// structure as global type lmic_pinmap. +using lmic_pinmap = Multipass_LMIC::HalPinmap_t; + +// similarly, we need to disclose NUM_DIO and LMIC_UNUSED_PIN +static const int NUM_DIO = lmic_pinmap::NUM_DIO; + +// Use this for any unused pins. +const u1_t LMIC_UNUSED_PIN = lmic_pinmap::UNUSED_PIN; + +// Declared here, to be defined and initialized by the application. +// Use os_init_ex() if you want not to use a const table, or if +// you need to define a derived type (so you can override methods). +extern const lmic_pinmap lmic_pins; + +#endif // _hal_hal_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic.h new file mode 100644 index 0000000..d0423a3 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic.h @@ -0,0 +1,30 @@ +/* + +Module: lmic.h + +Function: + Deprecated C++ top-level include file (use <arduino_lmic.h> instead). + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI November 2018 + +Note: + This header file is deprecated and is included for + transitional purposes. It's deprecated because it's + confusing to have src/lmic.h (this file) and src/lmic/lmic.h + (the API file for the C library). We can't take it out + yet, because it would inconvenience the world, but + we can hope that someday it will wither away (on a major + version bump). + + Please don't add any new functionality in this file; + it is just a wrapper for arduino_lmic.h. + +*/ + +#include "arduino_lmic.h" + +/* end of file */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/config.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/config.h new file mode 100644 index 0000000..fc7e914 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/config.h @@ -0,0 +1,223 @@ +#ifndef _lmic_config_h_ +#define _lmic_config_h_ + +// In the original LMIC code, these config values were defined on the +// gcc commandline. Since Arduino does not allow easily modifying the +// compiler commandline unless you modify the BSP, you have two choices: +// +// - edit {libraries}/arduino-lmic/project_config/lmic_project_config.h; +// - use a BSP like the MCCI Arduino BSPs, which get the configuration +// from the boards.txt file through a menu option. +// +// You definitely should not edit this file. + +// set up preconditions, and load configuration if needed. +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +// check post-conditions. + +// make sure that we have exactly one target region defined. +#if CFG_LMIC_REGION_MASK == 0 +# define CFG_eu868 1 +#elif (CFG_LMIC_REGION_MASK & (-CFG_LMIC_REGION_MASK)) != CFG_LMIC_REGION_MASK +# error You can define at most one of CFG_... variables +#elif (CFG_LMIC_REGION_MASK & LMIC_REGIONS_SUPPORTED) == 0 +# error The selected CFG_... region is not supported yet. +#endif + +// make sure that LMIC_COUNTRY_CODE is defined. +#ifndef LMIC_COUNTRY_CODE +# define LMIC_COUNTRY_CODE LMIC_COUNTRY_CODE_NONE +#endif + +// if the country code is Japan, then the region must be AS923 +#if LMIC_COUNTRY_CODE == LMIC_COUNTRY_CODE_JP && CFG_region != LMIC_REGION_as923 +# error "If country code is JP, then region must be AS923" +#endif + +// check for internal consistency +#if !(CFG_LMIC_EU_like || CFG_LMIC_US_like) +# error "Internal error: Neither EU-like nor US-like!" +#endif + +// This is the SX1272/SX1273 radio, which is also used on the HopeRF +// RFM92 boards. +//#define CFG_sx1272_radio 1 +// This is the SX1276/SX1277/SX1278/SX1279 radio, which is also used on +// the HopeRF RFM95 boards. +//#define CFG_sx1276_radio 1 + +// ensure that a radio is defined. +#if ! (defined(CFG_sx1272_radio) || defined(CFG_sx1276_radio)) +# warning Target radio not defined, assuming CFG_sx1276_radio +#define CFG_sx1276_radio 1 +#elif defined(CFG_sx1272_radio) && defined(CFG_sx1276_radio) +# error You can define at most one of CFG_sx1272_radio and CF_sx1276_radio +#endif + +// LMIC requires ticks to be 15.5μs - 100 μs long +#ifndef OSTICKS_PER_SEC +// 16 μs per tick +# ifndef US_PER_OSTICK_EXPONENT +# define US_PER_OSTICK_EXPONENT 5 +# endif +# define US_PER_OSTICK (1 << US_PER_OSTICK_EXPONENT) +# define OSTICKS_PER_SEC (1000000 / US_PER_OSTICK) +#endif /* OSTICKS_PER_SEC */ + +#if ! (10000 <= OSTICKS_PER_SEC && OSTICKS_PER_SEC < 64516) +# error LMIC requires ticks to be 15.5 us to 100 us long +#endif + +// Change the SPI clock speed if you encounter errors +// communicating with the radio. +// The standard range is 125kHz-8MHz, but some boards can go faster. +#ifndef LMIC_SPI_FREQ +#define LMIC_SPI_FREQ 1E6 +#endif + +// Set this to 1 to enable some basic debug output (using printf) about +// RF settings used during transmission and reception. Set to 2 to +// enable more verbose output. Make sure that printf is actually +// configured (e.g. on AVR it is not by default), otherwise using it can +// cause crashing. +#ifndef LMIC_DEBUG_LEVEL +#define LMIC_DEBUG_LEVEL 0 +#endif + +// Enable this to allow using printf() to print to the given serial port +// (or any other Print object). This can be easy for debugging. The +// current implementation only works on AVR, though. +//#define LMIC_PRINTF_TO Serial + +// Enable this to use interrupt handler routines listening for RISING signals. +// Otherwise, the library polls digital input lines for changes. +//#define LMIC_USE_INTERRUPTS + +// If DISABLE_LMIC_FAILURE_TO is defined, runtime assertion failures +// silently halt execution. Otherwise, LMIC_FAILURE_TO should be defined +// as the name of an object derived from Print, which will be used for +// displaying runtime assertion failures. If you say nothing in your +// lmic_project_config.h, runtime assertion failures are displayed +// using the Serial object. +#if ! defined(DISABLE_LMIC_FAILURE_TO) && ! defined(LMIC_FAILURE_TO) +#define LMIC_FAILURE_TO Serial +#endif + +// define this in lmic_project_config.h to disable all code related to joining +//#define DISABLE_JOIN +// define this in lmic_project_config.h to disable all code related to ping +//#define DISABLE_PING +// define this in lmic_project_config.h to disable all code related to beacon tracking. +// Requires ping to be disabled too +//#define DISABLE_BEACONS + +// define these in lmic_project_config.h to disable the corresponding MAC commands. +// Class A +//#define DISABLE_MCMD_DutyCycleReq // duty cycle cap +//#define DISABLE_MCMD_RXParamSetupReq // 2nd DN window param +//#define DISABLE_MCMD_NewChannelReq // set new channel +//#define DISABLE_MCMD_DlChannelReq // set downlink channel for RX1 for given uplink channel. +//#define DISABLE_MCMD_RXTimingSetupReq // delay between TX and RX +// Class B +//#define DISABLE_MCMD_PingSlotChannelReq // set ping freq, automatically disabled by DISABLE_PING +//#define ENABLE_MCMD_BeaconTimingAns // next beacon start, DEPRECATED, normally disabled by DISABLE_BEACON + +// DEPRECATED(tmm@mcci.com); replaced by LMIC.noRXIQinversion (dynamic). Don't define this. +//#define DISABLE_INVERT_IQ_ON_RX + +// This allows choosing between multiple included AES implementations. +// Make sure exactly one of these is uncommented. +// +// This selects the original AES implementation included LMIC. This +// implementation is optimized for speed on 32-bit processors using +// fairly big lookup tables, but it takes up big amounts of flash on the +// AVR architecture. +// #define USE_ORIGINAL_AES +// +// This selects the AES implementation written by Ideetroon for their +// own LoRaWAN library. It also uses lookup tables, but smaller +// byte-oriented ones, making it use a lot less flash space (but it is +// also about twice as slow as the original). +// #define USE_IDEETRON_AES + +#if ! (defined(USE_ORIGINAL_AES) || defined(USE_IDEETRON_AES)) +# define USE_IDEETRON_AES +#endif + +#if defined(USE_ORIGINAL_AES) && defined(USE_IDEETRON_AES) +# error "You may define at most one of USE_ORIGINAL_AES and USE_IDEETRON_AES" +#endif + +// LMIC_DISABLE_DR_LEGACY +// turn off legacy DR_* symbols that vary by bandplan. +// Older code uses these for configuration. EU868_DR_*, US915_DR_* +// etc symbols are prefered, but breaking older code is inconvenient for +// everybody. We don't want to use DR_* in the LMIC itself, so we provide +// this #define to allow them to be removed. +#if !defined(LMIC_DR_LEGACY) +# if !defined(LMIC_DISABLE_DR_LEGACY) +# define LMIC_DR_LEGACY 1 +# else // defined(LMIC_DISABLE_DR_LEGACY) +# define LMIC_DR_LEGACY 0 +# endif // defined(LMIC_DISABLE_DR_LEGACY) +#endif // LMIC_DR_LEGACY + +// LMIC_ENABLE_DeviceTimeReq +// enable support for MCMD_DeviceTimeReq and MCMD_DeviceTimeAns +// this is always defined, and non-zero to enable it. +#if !defined(LMIC_ENABLE_DeviceTimeReq) +# define LMIC_ENABLE_DeviceTimeReq 0 +#endif + +// LMIC_ENABLE_user_events +// Enable/disable support for programmable callbacks for events, rx, and tx. +// This is always defined, and non-zero to enable. Default is enabled. +#if !defined(LMIC_ENABLE_user_events) +# define LMIC_ENABLE_user_events 1 +#endif + +// LMIC_ENABLE_onEvent +// Enable/disable support for out-call to user-supplied `onEvent()` function. +// This is always defined, and non-zero to enable. Default is enabled. +#if !defined(LMIC_ENABLE_onEvent) +# define LMIC_ENABLE_onEvent 1 +#endif + +// LMIC_ENABLE_long_messages +// LMIC certification requires full-length 255 frames, but to save RAM, +// a shorter maximum can be set. This controls both RX and TX buffers, +// so reducing this by 1 saves 2 bytes of RAM. +#if defined(LMIC_ENABLE_long_messages) && defined(LMIC_MAX_FRAME_LENGTH) +#error "Use only one of LMIC_ENABLE_long_messages or LMIC_MAX_FRAME_LENGTH" +#elif defined(LMIC_ENABLE_long_messages) && LMIC_ENABLE_long_messages == 0 +# define LMIC_MAX_FRAME_LENGTH 64 +#elif !defined(LMIC_MAX_FRAME_LENGTH) +# define LMIC_MAX_FRAME_LENGTH 255 +#elif LMIC_MAX_FRAME_LENGTH > 255 +#error "LMIC_MAX_FRAME_LENGTH cannot be larger than 255" +#endif + +// LMIC_ENABLE_event_logging +// LMIC debugging for certification tests requires this, because debug prints affect +// timing too dramatically. But normal operation doesn't need this. +#if !defined(LMIC_ENABLE_event_logging) +# define LMIC_ENABLE_event_logging 0 /* PARAM */ +#endif + +// LMIC_LORAWAN_SPEC_VERSION +#if !defined(LMIC_LORAWAN_SPEC_VERSION) +# define LMIC_LORAWAN_SPEC_VERSION LMIC_LORAWAN_SPEC_VERSION_1_0_3 +#endif + +// LMIC_ENABLE_arbitrary_clock_error +// We normally don't want to allow users to set wide clock errors, because +// we assume reasonably-disciplined os_getTime() values. But... there might +// be platforms that require wider errors. +#if !defined(LMIC_ENABLE_arbitrary_clock_error) +# define LMIC_ENABLE_arbitrary_clock_error 0 /* PARAM */ +#endif + +#endif // _lmic_config_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/hal.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/hal.h new file mode 100644 index 0000000..f232480 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/hal.h @@ -0,0 +1,187 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2016, 2018-2019 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _lmic_hal_h_ +#define _lmic_hal_h_ + +#ifndef _oslmic_types_h_ +# include "oslmic_types.h" +#endif + +#ifndef _lmic_env_h_ +# include "lmic_env.h" +#endif + +#ifdef __cplusplus +extern "C"{ +#endif + +// The type of an optional user-defined failure handler routine +typedef void LMIC_ABI_STD hal_failure_handler_t(const char* const file, const uint16_t line); + +/* + * initialize hardware (IO, SPI, TIMER, IRQ). + * This API is deprecated as it uses the const global lmic_pins, + * which the platform can't control or change. + */ +void hal_init (void); + +/* + * Initialize hardware, passing in platform-specific context + * The pointer is to a HalPinmap_t. + */ +void hal_init_ex (const void *pContext); + +/* + * drive radio RX/TX pins (0=rx, 1=tx). Actual polarity + * is determined by the value of HalPinmap_t::rxtx_rx_active. + */ +void hal_pin_rxtx (u1_t val); + +/* + * control radio RST pin (0=low, 1=high, 2=floating) + */ +void hal_pin_rst (u1_t val); + +/* + * Perform SPI write transaction with radio chip + * - write the command byte 'cmd' + * - write 'len' bytes out of 'buf' + */ +void hal_spi_write(u1_t cmd, const u1_t* buf, size_t len); + +/* + * Perform SPI read transaction with radio chip + * - write the command byte 'cmd' + * - read 'len' bytes into 'buf' + */ +void hal_spi_read(u1_t cmd, u1_t* buf, size_t len); + +/* + * disable all CPU interrupts. + * - might be invoked nested + * - will be followed by matching call to hal_enableIRQs() + */ +void hal_disableIRQs (void); + +/* + * enable CPU interrupts. + */ +void hal_enableIRQs (void); + +/* + * return CPU interrupt nesting count + */ +uint8_t hal_getIrqLevel (void); + +/* + * put system and CPU in low-power mode, sleep until interrupt. + */ +void hal_sleep (void); + +/* + * return 32-bit system time in ticks. + */ +u4_t hal_ticks (void); + +/* + * busy-wait until specified timestamp (in ticks) is reached. If on-time, return 0, + * otherwise return the number of ticks we were late. + */ +u4_t hal_waitUntil (u4_t time); + +/* + * check and rewind timer for target time. + * - return 1 if target time is close + * - otherwise rewind timer for target time or full period and return 0 + */ +u1_t hal_checkTimer (u4_t targettime); + +/* + * perform fatal failure action. + * - called by assertions + * - action could be HALT or reboot + */ +void hal_failed (const char *file, u2_t line); + +/* + * set a custom hal failure handler routine. The default behaviour, defined in + * hal_failed(), is to halt by looping infintely. + */ +void hal_set_failure_handler(const hal_failure_handler_t* const); + +/* + * get the calibration value for radio_rssi + */ +s1_t hal_getRssiCal (void); + +/* + * control the radio state + * - if val == 0, turn tcxo off and otherwise prepare for sleep + * - if val == 1, turn tcxo on and otherwise prep for activity + * - return the number of ticks that we need to wait + */ +ostime_t hal_setModuleActive (bit_t val); + +/* find out if we're using Tcxo */ +bit_t hal_queryUsingTcxo(void); + +/* represent the various radio TX power policy */ +enum { + LMICHAL_radio_tx_power_policy_rfo = 0, + LMICHAL_radio_tx_power_policy_paboost = 1, + LMICHAL_radio_tx_power_policy_20dBm = 2, +}; + +/* + * query the configuration as to the Tx Power Policy + * to be used on this board, given our desires and + * requested power. + */ +uint8_t hal_getTxPowerPolicy( + u1_t inputPolicy, + s1_t requestedPower, + u4_t freq + ); + +void hal_pollPendingIRQs_helper(); +void hal_processPendingIRQs(void); + +/// \brief check for any pending interrupts: stub if interrupts are enabled. +static void inline hal_pollPendingIRQs(void) + { +#if !defined(LMIC_USE_INTERRUPTS) + hal_pollPendingIRQs_helper(); +#endif /* !defined(LMIC_USE_INTERRUPTS) */ + } + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // _lmic_hal_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.c new file mode 100644 index 0000000..472e62c --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.c @@ -0,0 +1,3104 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * All rights reserved. + * + * Copyright (c) 2016-2019 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +//! \file +#define LMIC_DR_LEGACY 0 +#include "lmic_bandplan.h" + +#if defined(DISABLE_BEACONS) && !defined(DISABLE_PING) +#error Ping needs beacon tracking +#endif + +DEFINE_LMIC; + +// Fwd decls. +static void reportEventNoUpdate(ev_t); +static void reportEventAndUpdate(ev_t); +static void engineUpdate(void); +static bit_t processJoinAccept_badframe(void); +static bit_t processJoinAccept_nojoinframe(void); + + +#if !defined(DISABLE_BEACONS) +static void startScan (void); +#endif + +// set the txrxFlags, with debugging +static inline void initTxrxFlags(const char *func, u1_t mask) { + LMIC_DEBUG2_PARAMETER(func); + +#if LMIC_DEBUG_LEVEL > 1 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": %s txrxFlags %#02x --> %02x\n", os_getTime(), func, LMIC.txrxFlags, mask); +#endif + LMIC.txrxFlags = mask; +} + +// or the txrxFlags, with debugging +static inline void orTxrxFlags(const char *func, u1_t mask) { + initTxrxFlags(func, LMIC.txrxFlags | mask); +} + + + +// ================================================================================ +// BEG OS - default implementations for certain OS suport functions + +#if !defined(HAS_os_calls) + +#if !defined(os_rlsbf2) +u2_t os_rlsbf2 (xref2cu1_t buf) { + return (u2_t)((u2_t)buf[0] | ((u2_t)buf[1]<<8)); +} +#endif + +#if !defined(os_rlsbf4) +u4_t os_rlsbf4 (xref2cu1_t buf) { + return (u4_t)((u4_t)buf[0] | ((u4_t)buf[1]<<8) | ((u4_t)buf[2]<<16) | ((u4_t)buf[3]<<24)); +} +#endif + + +#if !defined(os_rmsbf4) +u4_t os_rmsbf4 (xref2cu1_t buf) { + return (u4_t)((u4_t)buf[3] | ((u4_t)buf[2]<<8) | ((u4_t)buf[1]<<16) | ((u4_t)buf[0]<<24)); +} +#endif + + +#if !defined(os_wlsbf2) +void os_wlsbf2 (xref2u1_t buf, u2_t v) { + buf[0] = v; + buf[1] = v>>8; +} +#endif + +#if !defined(os_wlsbf4) +void os_wlsbf4 (xref2u1_t buf, u4_t v) { + buf[0] = v; + buf[1] = v>>8; + buf[2] = v>>16; + buf[3] = v>>24; +} +#endif + +#if !defined(os_wmsbf4) +void os_wmsbf4 (xref2u1_t buf, u4_t v) { + buf[3] = v; + buf[2] = v>>8; + buf[1] = v>>16; + buf[0] = v>>24; +} +#endif + +#if !defined(os_getBattLevel) +u1_t os_getBattLevel (void) { + return MCMD_DEVS_BATT_NOINFO; +} +#endif + +#if !defined(os_crc16) +// New CRC-16 CCITT(XMODEM) checksum for beacons: +u2_t os_crc16 (xref2cu1_t data, uint len) { + u2_t remainder = 0; + u2_t polynomial = 0x1021; + for( uint i = 0; i < len; i++ ) { + remainder ^= data[i] << 8; + for( u1_t bit = 8; bit > 0; bit--) { + if( (remainder & 0x8000) ) + remainder = (remainder << 1) ^ polynomial; + else + remainder <<= 1; + } + } + return remainder; +} +#endif + +#endif // !HAS_os_calls + +// END OS - default implementations for certain OS suport functions +// ================================================================================ + +// ================================================================================ +// BEG AES + +static void micB0 (u4_t devaddr, u4_t seqno, int dndir, int len) { + os_clearMem(AESaux,16); + AESaux[0] = 0x49; + AESaux[5] = dndir?1:0; + AESaux[15] = len; + os_wlsbf4(AESaux+ 6,devaddr); + os_wlsbf4(AESaux+10,seqno); +} + + +static int aes_verifyMic (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t pdu, int len) { + micB0(devaddr, seqno, dndir, len); + os_copyMem(AESkey,key,16); + return os_aes(AES_MIC, pdu, len) == os_rmsbf4(pdu+len); +} + + +static void aes_appendMic (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t pdu, int len) { + micB0(devaddr, seqno, dndir, len); + os_copyMem(AESkey,key,16); + // MSB because of internal structure of AES + os_wmsbf4(pdu+len, os_aes(AES_MIC, pdu, len)); +} + + +static void aes_appendMic0 (xref2u1_t pdu, int len) { + os_getDevKey(AESkey); + os_wmsbf4(pdu+len, os_aes(AES_MIC|AES_MICNOAUX, pdu, len)); // MSB because of internal structure of AES +} + + +static int aes_verifyMic0 (xref2u1_t pdu, int len) { + os_getDevKey(AESkey); + return os_aes(AES_MIC|AES_MICNOAUX, pdu, len) == os_rmsbf4(pdu+len); +} + + +static void aes_encrypt (xref2u1_t pdu, int len) { + os_getDevKey(AESkey); + os_aes(AES_ENC, pdu, len); +} + + +static void aes_cipher (xref2cu1_t key, u4_t devaddr, u4_t seqno, int dndir, xref2u1_t payload, int len) { + if( len <= 0 ) + return; + os_clearMem(AESaux, 16); + AESaux[0] = AESaux[15] = 1; // mode=cipher / dir=down / block counter=1 + AESaux[5] = dndir?1:0; + os_wlsbf4(AESaux+ 6,devaddr); + os_wlsbf4(AESaux+10,seqno); + os_copyMem(AESkey,key,16); + os_aes(AES_CTR, payload, len); +} + + +static void aes_sessKeys (u2_t devnonce, xref2cu1_t artnonce, xref2u1_t nwkkey, xref2u1_t artkey) { + os_clearMem(nwkkey, 16); + nwkkey[0] = 0x01; + os_copyMem(nwkkey+1, artnonce, LEN_ARTNONCE+LEN_NETID); + os_wlsbf2(nwkkey+1+LEN_ARTNONCE+LEN_NETID, devnonce); + os_copyMem(artkey, nwkkey, 16); + artkey[0] = 0x02; + + os_getDevKey(AESkey); + os_aes(AES_ENC, nwkkey, 16); + os_getDevKey(AESkey); + os_aes(AES_ENC, artkey, 16); +} + +// END AES +// ================================================================================ + + +// ================================================================================ +// BEG LORA + +static CONST_TABLE(u1_t, SENSITIVITY)[7][3] = { + // ------------bw---------- + // 125kHz 250kHz 500kHz + { 141-109, 141-109, 141-109 }, // FSK + { 141-127, 141-124, 141-121 }, // SF7 + { 141-129, 141-126, 141-123 }, // SF8 + { 141-132, 141-129, 141-126 }, // SF9 + { 141-135, 141-132, 141-129 }, // SF10 + { 141-138, 141-135, 141-132 }, // SF11 + { 141-141, 141-138, 141-135 } // SF12 +}; + +int getSensitivity (rps_t rps) { + return -141 + TABLE_GET_U1_TWODIM(SENSITIVITY, getSf(rps), getBw(rps)); +} + +ostime_t calcAirTime (rps_t rps, u1_t plen) { + u1_t bw = getBw(rps); // 0,1,2 = 125,250,500kHz + u1_t sf = getSf(rps); // 0=FSK, 1..6 = SF7..12 + if( sf == FSK ) { + return (plen+/*preamble*/5+/*syncword*/3+/*len*/1+/*crc*/2) * /*bits/byte*/8 + * (s4_t)OSTICKS_PER_SEC / /*kbit/s*/50000; + } + u1_t sfx = 4*(sf+(7-SF7)); + u1_t q = sfx - (sf >= SF11 ? 8 : 0); + int tmp = 8*plen - sfx + 28 + (getNocrc(rps)?0:16) - (getIh(rps)?20:0); + if( tmp > 0 ) { + tmp = (tmp + q - 1) / q; + tmp *= getCr(rps)+5; + tmp += 8; + } else { + tmp = 8; + } + tmp = (tmp<<2) + /*preamble*/49 /* 4 * (8 + 4.25) */; + // bw = 125000 = 15625 * 2^3 + // 250000 = 15625 * 2^4 + // 500000 = 15625 * 2^5 + // sf = 7..12 + // + // osticks = tmp * OSTICKS_PER_SEC * 1<<sf / bw + // + // 3 => counter reduced divisor 125000/8 => 15625 + // 2 => counter 2 shift on tmp + sfx = sf+(7-SF7) - (3+2) - bw; + int div = 15625; + if( sfx > 4 ) { + // prevent 32bit signed int overflow in last step + div >>= sfx-4; + sfx = 4; + } + // Need 32bit arithmetic for this last step + return (((ostime_t)tmp << sfx) * OSTICKS_PER_SEC + div/2) / div; +} + +// END LORA +// ================================================================================ + + +// Table below defines the size of one symbol as +// symtime = 256us * 2^T(sf,bw) +// 256us is called one symunit. +// SF: +// BW: |__7___8___9__10__11__12 +// 125kHz | 2 3 4 5 6 7 +// 250kHz | 1 2 3 4 5 6 +// 500kHz | 0 1 2 3 4 5 +// + +static void setRxsyms (ostime_t rxsyms) { + if (rxsyms >= (((ostime_t)1) << 10u)) { + LMIC.rxsyms = (1u << 10u) - 1; + } else if (rxsyms < 0) { + LMIC.rxsyms = 0; + } else { + LMIC.rxsyms = rxsyms; + } +} + +#if !defined(DISABLE_BEACONS) +static ostime_t calcRxWindow (u1_t secs, dr_t dr) { + ostime_t rxoff, err; + if( secs==0 ) { + // aka 128 secs (next becaon) + rxoff = LMIC.drift; + err = LMIC.lastDriftDiff; + } else { + // scheduled RX window within secs into current beacon period + rxoff = (LMIC.drift * (ostime_t)secs) >> BCN_INTV_exp; + err = (LMIC.lastDriftDiff * (ostime_t)secs) >> BCN_INTV_exp; + } + rxsyms_t rxsyms = LMICbandplan_MINRX_SYMS_LoRa_ClassB; + err += (ostime_t)LMIC.maxDriftDiff * LMIC.missedBcns; + setRxsyms(LMICbandplan_MINRX_SYMS_LoRa_ClassB + (err / dr2hsym(dr))); + + return (rxsyms-LMICbandplan_PAMBL_SYMS) * dr2hsym(dr) + rxoff; +} + + +// Setup beacon RX parameters assuming we have an error of ms (aka +/-(ms/2)) +static void calcBcnRxWindowFromMillis (u1_t ms, bit_t ini) { + if( ini ) { + LMIC.drift = 0; + LMIC.maxDriftDiff = 0; + LMIC.missedBcns = 0; + LMIC.bcninfo.flags |= BCN_NODRIFT|BCN_NODDIFF; + } + ostime_t hsym = dr2hsym(DR_BCN); + LMIC.bcnRxsyms = LMICbandplan_MINRX_SYMS_LoRa_ClassB + ms2osticksCeil(ms) / hsym; + LMIC.bcnRxtime = LMIC.bcninfo.txtime + BCN_INTV_osticks - (LMIC.bcnRxsyms-LMICbandplan_PAMBL_SYMS) * hsym; +} +#endif // !DISABLE_BEACONS + + +#if !defined(DISABLE_PING) +// Setup scheduled RX window (ping/multicast slot) +static void rxschedInit (xref2rxsched_t rxsched) { + os_clearMem(AESkey,16); + os_clearMem(LMIC.frame+8,8); + os_wlsbf4(LMIC.frame, LMIC.bcninfo.time); + os_wlsbf4(LMIC.frame+4, LMIC.devaddr); + os_aes(AES_ENC,LMIC.frame,16); + u1_t intvExp = rxsched->intvExp; + ostime_t off = os_rlsbf2(LMIC.frame) & (0x0FFF >> (7 - intvExp)); // random offset (slot units) + rxsched->rxbase = (LMIC.bcninfo.txtime + + BCN_RESERVE_osticks + + ms2osticks(BCN_SLOT_SPAN_ms * off)); // random offset osticks + rxsched->slot = 0; + rxsched->rxtime = rxsched->rxbase - calcRxWindow(/*secs BCN_RESERVE*/2+(1<<intvExp),rxsched->dr); + rxsched->rxsyms = LMIC.rxsyms; +} + + +static bit_t rxschedNext (xref2rxsched_t rxsched, ostime_t cando) { + again: + if( rxsched->rxtime - cando >= 0 ) + return 1; + u1_t slot; + if( (slot=rxsched->slot) >= 128 ) + return 0; + u1_t intv = 1<<rxsched->intvExp; + if( (rxsched->slot = (slot += (intv))) >= 128 ) + return 0; + rxsched->rxtime = rxsched->rxbase + + ((BCN_WINDOW_osticks * (ostime_t)slot) >> BCN_INTV_exp) + - calcRxWindow(/*secs BCN_RESERVE*/2+slot+intv,rxsched->dr); + rxsched->rxsyms = LMIC.rxsyms; + goto again; +} +#endif // !DISABLE_PING) + + +ostime_t LMICcore_rndDelay (u1_t secSpan) { + u2_t r = os_getRndU2(); + ostime_t delay = r; + if( delay > OSTICKS_PER_SEC ) + delay = r % (u2_t)OSTICKS_PER_SEC; + if( secSpan > 0 ) + delay += ((u1_t)r % secSpan) * OSTICKS_PER_SEC; + return delay; +} + +// delay reftime ticks, plus a random interval in [0..secSpan). +static void txDelay (ostime_t reftime, u1_t secSpan) { + if (secSpan != 0) + reftime += LMICcore_rndDelay(secSpan); + if( LMIC.globalDutyRate == 0 || (reftime - LMIC.globalDutyAvail) > 0 ) { + LMIC.globalDutyAvail = reftime; + LMIC.opmode |= OP_RNDTX; + } +} + + +void LMICcore_setDrJoin (u1_t reason, u1_t dr) { + LMIC_EV_PARAMETER(reason); + + EV(drChange, INFO, (e_.reason = reason, + e_.deveui = MAIN::CDEV->getEui(), + e_.dr = dr|DR_PAGE, + e_.txpow = LMIC.adrTxPow, + e_.prevdr = LMIC.datarate|DR_PAGE, + e_.prevtxpow = LMIC.adrTxPow)); + LMIC.datarate = dr; + DO_DEVDB(LMIC.datarate,datarate); +} + + +static bit_t setDrTxpow (u1_t reason, u1_t dr, s1_t pow) { + bit_t result = 0; + + LMIC_EV_PARAMETER(reason); + + EV(drChange, INFO, (e_.reason = reason, + e_.deveui = MAIN::CDEV->getEui(), + e_.dr = dr|DR_PAGE, + e_.txpow = pow, + e_.prevdr = LMIC.datarate|DR_PAGE, + e_.prevtxpow = LMIC.adrTxPow)); + + if( pow != KEEP_TXPOW && pow != LMIC.adrTxPow ) { + LMIC.adrTxPow = pow; + result = 1; + } + if( LMIC.datarate != dr ) { + LMIC.datarate = dr; + DO_DEVDB(LMIC.datarate,datarate); + LMIC.opmode |= OP_NEXTCHNL; + result = 1; + } + return result; +} + + +#if !defined(DISABLE_PING) +void LMIC_stopPingable (void) { + LMIC.opmode &= ~(OP_PINGABLE|OP_PINGINI); +} + + +void LMIC_setPingable (u1_t intvExp) { + // Change setting + LMIC.ping.intvExp = (intvExp & 0x7); + LMIC.opmode |= OP_PINGABLE; + // App may call LMIC_enableTracking() explicitely before + // Otherwise tracking is implicitly enabled here + if( (LMIC.opmode & (OP_TRACK|OP_SCAN)) == 0 && LMIC.bcninfoTries == 0 ) + LMIC_enableTracking(0); +} + +#endif // !DISABLE_PING + +static void runEngineUpdate (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + engineUpdate(); +} + +static void reportEventAndUpdate(ev_t ev) { + reportEventNoUpdate(ev); + engineUpdate(); +} + +static void reportEventNoUpdate (ev_t ev) { + uint32_t const evSet = UINT32_C(1) << ev; + EV(devCond, INFO, (e_.reason = EV::devCond_t::LMIC_EV, + e_.eui = MAIN::CDEV->getEui(), + e_.info = ev)); +#if LMIC_ENABLE_onEvent + void (*pOnEvent)(ev_t) = onEvent; + + // rxstart is critical timing; legacy onEvent handlers + // don't comprehend this; so don't report. + if (pOnEvent != NULL && (evSet & (UINT32_C(1)<<EV_RXSTART)) == 0) + pOnEvent(ev); +#endif // LMIC_ENABLE_onEvent + + // we want people who need tiny RAM footprints to be able + // to use onEvent and overide the dynamic mechanism. +#if LMIC_ENABLE_user_events + // create a mask to test against sets of events. + + // if a message was received, notify the user. + if ((evSet & ((UINT32_C(1)<<EV_TXCOMPLETE) | (UINT32_C(1)<<EV_RXCOMPLETE))) != 0 && + LMIC.client.rxMessageCb != NULL && + (LMIC.dataLen != 0 || LMIC.dataBeg != 0)) { + uint8_t port; + + // assume no port. + port = 0; + + // correct assumption if a port was provided. + if (LMIC.txrxFlags & TXRX_PORT) + port = LMIC.frame[LMIC.dataBeg - 1]; + + // notify the user. + LMIC.client.rxMessageCb( + LMIC.client.rxMessageUserData, + port, + LMIC.frame + LMIC.dataBeg, + LMIC.dataLen + ); + } + + // tell the client about completed transmits -- the buffer + // is now available again. We use set notation again in case + // we later discover another event completes messages + if ((evSet & ((UINT32_C(1)<<EV_TXCOMPLETE) | (UINT32_C(1) <<EV_TXCANCELED))) != 0) { + lmic_txmessage_cb_t * const pTxMessageCb = LMIC.client.txMessageCb; + + if (pTxMessageCb != NULL) { + int fSuccess; + // reset before notifying user. If we reset after + // notifying, then if user does a recursive call + // in their message processing + // function, we would clobber the value + LMIC.client.txMessageCb = NULL; + + // compute exit status + if (ev == EV_TXCANCELED || (LMIC.txrxFlags & TXRX_LENERR) != 0) { + // canceled, or killed because of length error: unsuccessful. + fSuccess = 0; + } else if (/* ev == EV_TXCOMPLETE && */ LMIC.pendTxConf) { + fSuccess = (LMIC.txrxFlags & TXRX_ACK) != 0; + } else { + // unconfirmed uplinks are successful if they were sent. + fSuccess = 1; + } + + // notify the user. + pTxMessageCb(LMIC.client.txMessageUserData, fSuccess); + } + } + + // tell the client about events in general + if (LMIC.client.eventCb != NULL) + LMIC.client.eventCb(LMIC.client.eventUserData, ev); +#endif // LMIC_ENABLE_user_events +} + +int LMIC_registerRxMessageCb(lmic_rxmessage_cb_t *pRxMessageCb, void *pUserData) { +#if LMIC_ENABLE_user_events + LMIC.client.rxMessageCb = pRxMessageCb; + LMIC.client.rxMessageUserData = pUserData; + return 1; +#else // !LMIC_ENABLE_user_events + return 0; +#endif // !LMIC_ENABLE_user_events +} + +int LMIC_registerEventCb(lmic_event_cb_t *pEventCb, void *pUserData) { +#if LMIC_ENABLE_user_events + LMIC.client.eventCb = pEventCb; + LMIC.client.eventUserData = pUserData; + return 1; +#else // ! LMIC_ENABLE_user_events + return 0; +#endif // ! LMIC_ENABLE_user_events +} + +static void runReset (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + // clear pending TX. + LMIC_clrTxData(); + + // Disable session + LMIC_reset(); + + // report event before the join event. + reportEventNoUpdate(EV_RESET); + +#if !defined(DISABLE_JOIN) + LMIC_startJoining(); +#else + os_setCallback(&LMIC.osjob, FUNC_ADDR(runEngineUpdate)); +#endif // !DISABLE_JOIN +} + +static void resetJoinParams(void) { + LMIC.rx1DrOffset = 0; + LMIC.dn2Dr = DR_DNW2; + LMIC.dn2Freq = FREQ_DNW2; +#if LMIC_ENABLE_TxParamSetupReq + LMIC.txParam = 0xFF; +#endif +} + +static void stateJustJoined (void) { + LMIC.seqnoDn = LMIC.seqnoUp = 0; + LMIC.rejoinCnt = 0; + LMIC.dnConf = LMIC.lastDnConf = LMIC.adrChanged = 0; + LMIC.upRepeatCount = LMIC.upRepeat = 0; +#if !defined(DISABLE_MCMD_RXParamSetupReq) + LMIC.dn2Ans = 0; +#endif +#if !defined(DISABLE_MCMD_RXTimingSetupReq) + LMIC.macRxTimingSetupAns = 0; +#endif +#if !defined(DISABLE_MCMD_DlChannelReq) && CFG_LMIC_EU_like + LMIC.macDlChannelAns = 0; +#endif + LMIC.moreData = 0; + LMIC.upRepeat = 0; + resetJoinParams(); +#if !defined(DISABLE_BEACONS) + LMIC.bcnChnl = CHNL_BCN; +#endif +#if !defined(DISABLE_PING) + LMIC.ping.freq = FREQ_PING; + LMIC.ping.dr = DR_PING; +#endif +} + + +// ================================================================================ +// Decoding frames + + +#if !defined(DISABLE_BEACONS) +// Decode beacon - do not overwrite bcninfo unless we have a match! +static lmic_beacon_error_t decodeBeacon (void) { + if (LMIC.dataLen != LEN_BCN) { // implicit header RX guarantees this + return LMIC_BEACON_ERROR_INVALID; + } + xref2u1_t d = LMIC.frame; + if(! LMICbandplan_isValidBeacon1(d)) + return LMIC_BEACON_ERROR_INVALID; // first (common) part fails CRC check + // First set of fields is ok + u4_t bcnnetid = os_rlsbf4(&d[OFF_BCN_NETID]) & 0xFFFFFF; + if( bcnnetid != LMIC.netid ) + return LMIC_BEACON_ERROR_WRONG_NETWORK; // not the beacon we're looking for + + LMIC.bcninfo.flags &= ~(BCN_PARTIAL|BCN_FULL); + // Match - update bcninfo structure + LMIC.bcninfo.snr = LMIC.snr; + LMIC.bcninfo.rssi = LMIC.rssi; + LMIC.bcninfo.txtime = LMIC.rxtime - AIRTIME_BCN_osticks; + LMIC.bcninfo.time = os_rlsbf4(&d[OFF_BCN_TIME]); + LMIC.bcninfo.flags |= BCN_PARTIAL; + + // Check 2nd set + if( os_rlsbf2(&d[OFF_BCN_CRC2]) != os_crc16(d,OFF_BCN_CRC2) ) + return LMIC_BEACON_ERROR_SUCCESS_PARTIAL; + // Second set of fields is ok + LMIC.bcninfo.lat = (s4_t)os_rlsbf4(&d[OFF_BCN_LAT-1]) >> 8; // read as signed 24-bit + LMIC.bcninfo.lon = (s4_t)os_rlsbf4(&d[OFF_BCN_LON-1]) >> 8; // ditto + LMIC.bcninfo.info = d[OFF_BCN_INFO]; + LMIC.bcninfo.flags |= BCN_FULL; + return LMIC_BEACON_ERROR_SUCCESS_FULL; +} +#endif // !DISABLE_BEACONS + +// put a mac response to the current output buffer. Limit according to kind of +// mac data (piggyback vs port 0) +static bit_t put_mac_uplink_byte(uint8_t b) { + if (LMIC.pendMacPiggyback) { + // put in pendMacData + if (LMIC.pendMacLen < sizeof(LMIC.pendMacData)) { + LMIC.pendMacData[LMIC.pendMacLen++] = b; + return 1; + } else { + return 0; + } + } else { + // put in pendTxData + if (LMIC.pendMacLen < sizeof(LMIC.pendTxData)) { + LMIC.pendTxData[LMIC.pendMacLen++] = b; + return 1; + } else { + return 0; + } + } +} + +static bit_t put_mac_uplink_byte2(uint8_t b1, uint8_t b2) { + u1_t outindex = LMIC.pendMacLen; + + if (put_mac_uplink_byte(b1) && put_mac_uplink_byte(b2)) { + return 1; + } else { + LMIC.pendMacLen = outindex; + return 0; + } +} + +static bit_t put_mac_uplink_byte3(u1_t b1, u1_t b2, u1_t b3) { + u1_t outindex = LMIC.pendMacLen; + + if (put_mac_uplink_byte(b1) && put_mac_uplink_byte(b2) && put_mac_uplink_byte(b3)) { + return 1; + } else { + LMIC.pendMacLen = outindex; + return 0; + } +} + +static CONST_TABLE(u1_t, macCmdSize)[] = { + /* 2: LinkCheckAns */ 3, + /* 3: LinkADRReq */ 5, + /* 4: DutyCycleReq */ 2, + /* 5: RXParamSetupReq */ 5, + /* 6: DevStatusReq */ 1, + /* 7: NewChannelReq */ 6, + /* 8: RXTimingSetupReq */ 2, + /* 9: TxParamSetupReq */ 2, + /* 0x0A: DlChannelReq */ 5, + /* B, C: RFU */ 0, 0, + /* 0x0D: DeviceTimeAns */ 6, + /* 0x0E, 0x0F */ 0, 0, + /* 0x10: PingSlotInfoAns */ 1, + /* 0x11: PingSlotChannelReq */ 5, + /* 0x12: BeaconTimingAns */ 4, + /* 0x13: BeaconFreqReq */ 4 +}; + +static u1_t getMacCmdSize(u1_t macCmd) { + if (macCmd >= 2) { + const unsigned macCmdMinus2 = macCmd - 2u; + if (macCmdMinus2 < LENOF_TABLE(macCmdSize)) { + // macCmd in table, fetch it's size. + return TABLE_GET_U1(macCmdSize, macCmdMinus2); + } + } + // macCmd too small or too large: return zero. Zero is + // never a legal command size, so it signals an error + // to the caller. + return 0; +} + +static bit_t +applyAdrRequests( + const uint8_t *opts, + int olen, + u1_t adrAns +) { + lmic_saved_adr_state_t initialState; + int const kAdrReqSize = 5; + int oidx; + u1_t p1 = 0; + u1_t p4 = 0; + bit_t response_fit = 1; + bit_t map_ok = 1; + + LMICbandplan_saveAdrState(&initialState); + + // compute the changes + if (adrAns == (MCMD_LinkADRAns_PowerACK | MCMD_LinkADRAns_DataRateACK | MCMD_LinkADRAns_ChannelACK)) { + for (oidx = 0; oidx < olen; oidx += kAdrReqSize) { + // can we advance? + if (olen - oidx < kAdrReqSize) { + // ignore the malformed one at the end + break; + } + u2_t chmap = os_rlsbf2(&opts[oidx+2]);// list of enabled channels + + p1 = opts[oidx+1]; // txpow + DR, in case last + p4 = opts[oidx+4]; // ChMaskCtl, NbTrans + u1_t chpage = p4 & MCMD_LinkADRReq_Redundancy_ChMaskCntl_MASK; // channel page + + map_ok = LMICbandplan_mapChannels(chpage, chmap); + LMICOS_logEventUint32("applyAdrRequests: mapChannels", ((u4_t)chpage << 16)|(chmap << 0)); + } + } + + if (! map_ok) { + adrAns &= ~MCMD_LinkADRAns_ChannelACK; + } + + // p1 now has txpow + DR. DR must be feasible. + dr_t dr = (dr_t)(p1>>MCMD_LinkADRReq_DR_SHIFT); + + if (adrAns == (MCMD_LinkADRAns_PowerACK | MCMD_LinkADRAns_DataRateACK | MCMD_LinkADRAns_ChannelACK) && ! LMICbandplan_isDataRateFeasible(dr)) { + adrAns &= ~MCMD_LinkADRAns_DataRateACK; + LMICOS_logEventUint32("applyAdrRequests: final DR not feasible", dr); + } + + if (adrAns != (MCMD_LinkADRAns_PowerACK | MCMD_LinkADRAns_DataRateACK | MCMD_LinkADRAns_ChannelACK)) { + LMICbandplan_restoreAdrState(&initialState); + } + + // now put all the options + for (oidx = 0; oidx < olen && response_fit; oidx += kAdrReqSize) { + // can we advance? + if (olen - oidx < kAdrReqSize) { + // ignore the malformed one at the end + break; + } + response_fit = put_mac_uplink_byte2(MCMD_LinkADRAns, adrAns); + } + + // all done scanning options + bit_t changes = LMICbandplan_compareAdrState(&initialState); + + // handle the final options + if (adrAns == (MCMD_LinkADRAns_PowerACK | MCMD_LinkADRAns_DataRateACK | MCMD_LinkADRAns_ChannelACK)) { + // handle uplink repeat count + u1_t uprpt = p4 & MCMD_LinkADRReq_Redundancy_NbTrans_MASK; // up repeat count + if (LMIC.upRepeat != uprpt) { + LMIC.upRepeat = uprpt; + changes = 1; + } + + LMICOS_logEventUint32("applyAdrRequests: setDrTxPow", ((u4_t)adrAns << 16)|(dr << 8)|(p1 << 0)); + + // handle power changes here, too. + changes |= setDrTxpow(DRCHG_NWKCMD, dr, pow2dBm(p1)); + } + + // Certification doesn't like this, but it makes the device happier with TTN. + // LMIC.adrChanged = changes; // move the ADR FSM up to "time to request" + + return response_fit; +} + +static int +scan_mac_cmds_link_adr( + const uint8_t *opts, + int olen, + bit_t *presponse_fit + ) + { + LMICOS_logEventUint32("scan_mac_cmds_link_adr", olen); + + if (olen == 0) + return 0; + + int oidx = 0; + int const kAdrReqSize = 5; + int lastOidx; + u1_t adrAns = MCMD_LinkADRAns_PowerACK | MCMD_LinkADRAns_DataRateACK | MCMD_LinkADRAns_ChannelACK; + + // process the contiguous slots + for (;;) { + lastOidx = oidx; + + // can we advance? + if (olen - oidx < kAdrReqSize) { + // ignore the malformed one at the end; but fail it. + adrAns = 0; + break; + } + u1_t p1 = opts[oidx+1]; // txpow + DR + u2_t chmap = os_rlsbf2(&opts[oidx+2]);// list of enabled channels + u1_t chpage = opts[oidx+4] & MCMD_LinkADRReq_Redundancy_ChMaskCntl_MASK; // channel page + // u1_t uprpt = opts[oidx+4] & MCMD_LinkADRReq_Redundancy_NbTrans_MASK; // up repeat count + dr_t dr = (dr_t)(p1>>MCMD_LinkADRReq_DR_SHIFT); + + if( !LMICbandplan_canMapChannels(chpage, chmap) ) { + adrAns &= ~MCMD_LinkADRAns_ChannelACK; + LMICOS_logEventUint32("scan_mac_cmds_link_adr: failed canMapChannels", ((u4_t)chpage << 16)|((u4_t)chmap << 0)); + } + + if( !validDR(dr) ) { + adrAns &= ~MCMD_LinkADRAns_DataRateACK; + } + if (pow2dBm(p1) == -128) { + adrAns &= ~MCMD_LinkADRAns_PowerACK; + } + + oidx += kAdrReqSize; + if (opts[oidx] != MCMD_LinkADRReq) + break; + } + + // go back and apply the ADR changes, if any -- use the effective length, + // and process. + *presponse_fit = applyAdrRequests(opts, lastOidx + kAdrReqSize, adrAns); + + return lastOidx; + } + +// scan mac commands starting at opts[] for olen, return count of bytes consumed. +// build response in pendMacData[], but limit length as needed; simply chop at last +// response that fits. +static int +scan_mac_cmds( + const uint8_t *opts, + int olen, + int port + ) { + int oidx = 0; + uint8_t cmd; + + LMIC.pendMacLen = 0; + if (port == 0) { + // port zero: mac data is in the normal payload, and there can't be + // piggyback mac data. + LMIC.pendMacPiggyback = 0; + } else { + // port is either -1 (no port) or non-zero (piggyback): treat as piggyback. + LMIC.pendMacPiggyback = 1; + } + + while( oidx < olen ) { + bit_t response_fit; + + response_fit = 1; + cmd = opts[oidx]; + + /* compute length, and exit for illegal commands */ + // cmdlen == 0 for error, or > 0 length of command. + int const cmdlen = getMacCmdSize(cmd); + if (cmdlen <= 0 || cmdlen > olen - oidx) { + // "the first unknown command terminates processing" + olen = oidx; + break; + } + + switch( cmd ) { + case MCMD_LinkCheckAns: { + // TODO(tmm@mcci.com) capture these, reliably.. + //int gwmargin = opts[oidx+1]; + //int ngws = opts[oidx+2]; + break; + } + // from 1.0.3 spec section 5.2: + // For the purpose of configuring the end-device channel mask, the end-device will + // process all contiguous LinkAdrReq messages, in the order present in the downlink message, + // as a single atomic block command. The end-device will accept or reject all Channel Mask + // controls in the contiguous block, and provide consistent Channel Mask ACK status + // indications for each command in the contiguous block in each LinkAdrAns message, + // reflecting the acceptance or rejection of this atomic channel mask setting. + // + // So we need to process all the contigious commands + case MCMD_LinkADRReq: { + // skip over all but the last command. + oidx += scan_mac_cmds_link_adr(opts + oidx, olen - oidx, &response_fit); + break; + } + + case MCMD_DevStatusReq: { + // LMIC.snr is SNR times 4, convert to real SNR; rounding towards zero. + const int snr = (LMIC.snr + 2) / 4; + // per [1.02] 5.5. the margin is the SNR. + LMIC.devAnsMargin = (u1_t)(0b00111111 & (snr <= -32 ? -32 : snr >= 31 ? 31 : snr)); + + response_fit = put_mac_uplink_byte3(MCMD_DevStatusAns, os_getBattLevel(), LMIC.devAnsMargin); + break; + } + +#if !defined(DISABLE_MCMD_RXParamSetupReq) + case MCMD_RXParamSetupReq: { + dr_t dr = (dr_t)(opts[oidx+1] & 0x0F); + u1_t rx1DrOffset = (u1_t)((opts[oidx+1] & 0x70) >> 4); + u4_t freq = LMICbandplan_convFreq(&opts[oidx+2]); + LMIC.dn2Ans = 0xC0; // answer pending, but send this one in order. + if( validDR(dr) ) + LMIC.dn2Ans |= MCMD_RXParamSetupAns_RX2DataRateACK; + if( freq != 0 ) + LMIC.dn2Ans |= MCMD_RXParamSetupAns_ChannelACK; + if (rx1DrOffset <= 3) + LMIC.dn2Ans |= MCMD_RXParamSetupAns_RX1DrOffsetAck; + + if( LMIC.dn2Ans == (0xC0|MCMD_RXParamSetupAns_RX2DataRateACK|MCMD_RXParamSetupAns_ChannelACK| MCMD_RXParamSetupAns_RX1DrOffsetAck) ) { + LMIC.dn2Dr = dr; + LMIC.dn2Freq = freq; + LMIC.rx1DrOffset = rx1DrOffset; + DO_DEVDB(LMIC.dn2Dr,dn2Dr); + DO_DEVDB(LMIC.dn2Freq,dn2Freq); + } + + /* put the first copy of the message */ + response_fit = put_mac_uplink_byte2(MCMD_RXParamSetupAns, LMIC.dn2Ans & ~MCMD_RXParamSetupAns_RFU); + break; + } +#endif // !DISABLE_MCMD_RXParamSetupReq + +#if !defined(DISABLE_MCMD_RXTimingSetupReq) + case MCMD_RXTimingSetupReq: { + u1_t delay = opts[oidx+1] & MCMD_RXTimingSetupReq_Delay; + if (delay == 0) + delay = 1; + + LMIC.rxDelay = delay; + LMIC.macRxTimingSetupAns = 2; + response_fit = put_mac_uplink_byte(MCMD_RXTimingSetupAns); + break; + } +#endif // !DISABLE_MCMD_RXTimingSetupReq + +#if !defined(DISABLE_MCMD_DutyCycleReq) + case MCMD_DutyCycleReq: { + u1_t cap = opts[oidx+1]; + LMIC.globalDutyRate = cap & 0xF; + LMIC.globalDutyAvail = os_getTime(); + DO_DEVDB(cap,dutyCap); + + response_fit = put_mac_uplink_byte(MCMD_DutyCycleAns); + break; + } +#endif // !DISABLE_MCMD_DutyCycleReq + +#if !defined(DISABLE_MCMD_NewChannelReq) && CFG_LMIC_EU_like + case MCMD_NewChannelReq: { + u1_t chidx = opts[oidx+1]; // channel + u4_t raw_f_not_zero = opts[oidx+2] | opts[oidx+3] | opts[oidx+4]; + u4_t freq = LMICbandplan_convFreq(&opts[oidx+2]); // freq + u1_t drs = opts[oidx+5]; // datarate span + u1_t ans = MCMD_NewChannelAns_DataRateACK|MCMD_NewChannelAns_ChannelACK; + + if (freq == 0 && raw_f_not_zero) { + ans &= ~MCMD_NewChannelAns_ChannelACK; + } + u1_t MaxDR = drs >> 4; + u1_t MinDR = drs & 0xF; + if (MaxDR < MinDR || !validDR(MaxDR) || !validDR(MinDR)) { + ans &= ~MCMD_NewChannelAns_DataRateACK; + } + + if( ans == (MCMD_NewChannelAns_DataRateACK|MCMD_NewChannelAns_ChannelACK)) { + if ( ! LMIC_setupChannel(chidx, freq, DR_RANGE_MAP(MinDR, MaxDR), -1) ) { + LMICOS_logEventUint32("NewChannelReq: setupChannel failed", ((u4_t)MaxDR << 24u) | ((u4_t)MinDR << 16u) | (raw_f_not_zero << 8) | (chidx << 0)); + ans &= ~MCMD_NewChannelAns_ChannelACK; + } + } + + response_fit = put_mac_uplink_byte2(MCMD_NewChannelAns, ans); + break; + } +#endif // !DISABLE_MCMD_NewChannelReq + +#if !defined(DISABLE_MCMD_DlChannelReq) && CFG_LMIC_EU_like + case MCMD_DlChannelReq: { + u1_t chidx = opts[oidx+1]; // channel + u4_t freq = LMICbandplan_convFreq(&opts[oidx+2]); // freq + u1_t ans = MCMD_DlChannelAns_FreqACK|MCMD_DlChannelAns_ChannelACK; + + if (freq == 0) { + ans &= ~MCMD_DlChannelAns_ChannelACK; + } + if (chidx > MAX_CHANNELS) { + // this is not defined by the 1.0.3 spec + ans = 0; + } else if ((LMIC.channelMap & (1 << chidx)) == 0) { + // the channel is not enabled for downlink. + ans &= ~MCMD_DlChannelAns_FreqACK; + } + + if( ans == (MCMD_DlChannelAns_FreqACK|MCMD_DlChannelAns_ChannelACK)) { + LMIC.channelDlFreq[chidx] = freq; + } + + response_fit = put_mac_uplink_byte2(MCMD_DlChannelAns, ans); + // set sticky answer. + LMIC.macDlChannelAns = ans | 0xC0; + break; + } +#endif // !DISABLE_MCMD_DlChannelReq + +#if !defined(DISABLE_MCMD_PingSlotChannelReq) && !defined(DISABLE_PING) + case MCMD_PingSlotChannelReq: { + u4_t raw_f_not_zero = opts[oidx+1] | opts[oidx+2] | opts[oidx+3]; + u4_t freq = LMICbandplan_convFreq(&opts[oidx+1]); + u1_t dr = opts[oidx+4] & 0xF; + u1_t ans = MCMD_PingSlotFreqAns_DataRateACK|MCMD_PingSlotFreqAns_ChannelACK; + if (! raw_f_not_zero) { + freq = FREQ_PING; + } else if (freq == 0) { + ans &= ~MCMD_PingSlotFreqAns_ChannelACK; + } + if (! validDR(dr)) + ans &= ~MCMD_PingSlotFreqAns_DataRateACK; + + if (ans == (MCMD_PingSlotFreqAns_DataRateACK|MCMD_PingSlotFreqAns_ChannelACK)) { + LMIC.ping.freq = freq; + LMIC.ping.dr = dr; + DO_DEVDB(LMIC.ping.intvExp, pingIntvExp); + DO_DEVDB(LMIC.ping.freq, pingFreq); + DO_DEVDB(LMIC.ping.dr, pingDr); + } + response_fit = put_mac_uplink_byte2(MCMD_PingSlotChannelAns, ans); + break; + } +#endif // !DISABLE_MCMD_PingSlotChannelReq && !DISABLE_PING + +#if defined(ENABLE_MCMD_BeaconTimingAns) && !defined(DISABLE_BEACONS) + case MCMD_BeaconTimingAns: { + // Ignore if tracking already enabled or bcninfoTries == 0 + if( (LMIC.opmode & OP_TRACK) == 0 && LMIC.bcninfoTries != 0) { + LMIC.bcnChnl = opts[oidx+3]; + // Enable tracking - bcninfoTries + LMIC.opmode |= OP_TRACK; + // LMIC.bcninfoTries is cleared later in txComplete handling - triggers EV_BEACON_FOUND + // Setup RX parameters + LMIC.bcninfo.txtime = (LMIC.rxtime + + ms2osticks(os_rlsbf2(&opts[oidx+1]) * MCMD_BeaconTimingAns_TUNIT) + + ms2osticksCeil(MCMD_BeaconTimingAns_TUNIT/2) + - BCN_INTV_osticks); + LMIC.bcninfo.flags = 0; // txtime above cannot be used as reference (BCN_PARTIAL|BCN_FULL cleared) + calcBcnRxWindowFromMillis(MCMD_BeaconTimingAns_TUNIT,1); // error of +/-N ms + + EV(lostFrame, INFO, (e_.reason = EV::lostFrame_t::MCMD_BeaconTimingAns, + e_.eui = MAIN::CDEV->getEui(), + e_.lostmic = Base::lsbf4(&d[pend]), + e_.info = (LMIC.missedBcns | + (osticks2us(LMIC.bcninfo.txtime + BCN_INTV_osticks + - LMIC.bcnRxtime) << 8)), + e_.time = MAIN::CDEV->ostime2ustime(LMIC.bcninfo.txtime + BCN_INTV_osticks))); + } + break; + } /* end case */ +#endif // !ENABLE_MCMD_BeaconTimingAns && !DISABLE_BEACONS + +#if LMIC_ENABLE_TxParamSetupReq + case MCMD_TxParamSetupReq: { + uint8_t txParam; + txParam = opts[oidx+1]; + + // we don't allow unrecognized bits to get to txParam. + txParam &= (MCMD_TxParam_RxDWELL_MASK| + MCMD_TxParam_TxDWELL_MASK| + MCMD_TxParam_MaxEIRP_MASK); + LMIC.txParam = txParam; + response_fit = put_mac_uplink_byte(MCMD_TxParamSetupAns); + break; + } /* end case */ +#endif // LMIC_ENABLE_TxParamSetupReq + +#if LMIC_ENABLE_DeviceTimeReq + case MCMD_DeviceTimeAns: { + // don't process a spurious downlink. + if ( LMIC.txDeviceTimeReqState == lmic_RequestTimeState_rx ) { + // remember that it's time to notify the client. + LMIC.txDeviceTimeReqState = lmic_RequestTimeState_success; + + // the network time is linked to the time of the last TX. + LMIC.localDeviceTime = LMIC.txend; + + // save the network time. + // The first 4 bytes contain the seconds since the GPS epoch + // (i.e January the 6th 1980 at 00:00:00 UTC). + // Note: as per the LoRaWAN specs, the octet order for all + // multi-octet fields is little endian + // Note: the casts are necessary, because opts is an array of + // single byte values, and they might overflow when shifted + LMIC.netDeviceTime = ( (lmic_gpstime_t) opts[oidx + 1] ) | + (((lmic_gpstime_t) opts[oidx + 2]) << 8) | + (((lmic_gpstime_t) opts[oidx + 3]) << 16) | + (((lmic_gpstime_t) opts[oidx + 4]) << 24); + + // The 5th byte contains the fractional seconds in 2^-8 second steps + LMIC.netDeviceTimeFrac = opts[oidx + 5]; +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": MAC command DeviceTimeAns received: seconds_since_gps_epoch=%"PRIu32", fractional_seconds=%d\n", os_getTime(), LMIC.netDeviceTime, LMIC.netDeviceTimeFrac); +#endif + } + break; + } /* end case */ +#endif // LMIC_ENABLE_DeviceTimeReq + + default: { + // force olen to current oidx so we'll exit the while() + olen = oidx; + break; + } /* end case */ + } /* end switch */ + + /* if we're out of spce for responses, skip to end. */ + if (! response_fit) { + olen = oidx; + } else { + oidx += cmdlen; + } + } /* end while */ + + return oidx; +} + +// change the ADR ack request count, unless adr ack is diabled. +static void setAdrAckCount (s2_t count) { + if (LMIC.adrAckReq != LINK_CHECK_OFF) { + LMIC.adrAckReq = count; + } +} + +static bit_t decodeFrame (void) { + xref2u1_t d = LMIC.frame; + u1_t hdr = d[0]; + u1_t ftype = hdr & HDR_FTYPE; + int dlen = LMIC.dataLen; +#if LMIC_DEBUG_LEVEL > 0 + const char *window = (LMIC.txrxFlags & TXRX_DNW1) ? "RX1" : ((LMIC.txrxFlags & TXRX_DNW2) ? "RX2" : "Other"); +#endif + if (dlen > 0) + LMICOS_logEventUint32("decodeFrame", (dlen << 8) | (hdr << 0)); + + if( dlen < OFF_DAT_OPTS+4 || + (hdr & HDR_MAJOR) != HDR_MAJOR_V1 || + (ftype != HDR_FTYPE_DADN && ftype != HDR_FTYPE_DCDN) ) { + // Basic sanity checks failed + EV(specCond, WARN, (e_.reason = EV::specCond_t::UNEXPECTED_FRAME, + e_.eui = MAIN::CDEV->getEui(), + e_.info = dlen < 4 ? 0 : os_rlsbf4(&d[dlen-4]), + e_.info2 = hdr + (dlen<<8))); + norx: +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": Invalid downlink, window=%s\n", os_getTime(), window); +#endif + LMIC.dataLen = 0; + return 0; + } + // Validate exact frame length + // Note: device address was already read+evaluated in order to arrive here. + int fct = d[OFF_DAT_FCT]; + u4_t addr = os_rlsbf4(&d[OFF_DAT_ADDR]); + u4_t seqno = os_rlsbf2(&d[OFF_DAT_SEQNO]); + int olen = fct & FCT_OPTLEN; + int ackup = (fct & FCT_ACK) != 0 ? 1 : 0; // ACK last up frame + int poff = OFF_DAT_OPTS+olen; + int pend = dlen-4; // MIC + + if( addr != LMIC.devaddr ) { + LMICOS_logEventUint32("decodeFrame: wrong address", addr); + + EV(specCond, WARN, (e_.reason = EV::specCond_t::ALIEN_ADDRESS, + e_.eui = MAIN::CDEV->getEui(), + e_.info = addr, + e_.info2 = LMIC.devaddr)); + goto norx; + } + if( poff > pend ) { + LMICOS_logEventUint32("decodeFrame: corrupted frame", ((u4_t)dlen << 16) | (fct << 8) | (poff - pend)); + EV(specCond, ERR, (e_.reason = EV::specCond_t::CORRUPTED_FRAME, + e_.eui = MAIN::CDEV->getEui(), + e_.info = 0x1000000 + (poff-pend) + (fct<<8) + (dlen<<16))); + goto norx; + } + + int port = -1; + int replayConf = 0; + + if( pend > poff ) + port = d[poff++]; + + // compute the 32-bit sequence number based on the 16-bit sequence number received + // and the internal 32-bit number. Because the 32-bit number is used in the MIC + // calculation, this must be right. (And if you're curious why a 32-bit seqno matters, + // it's this calculation, plus its use in the MIC calculation.) + // + // we have to be careful to get the right value for replay of last message received. + u2_t seqnoDiff = (u2_t)(seqno - LMIC.seqnoDn); + if (seqnoDiff == 0xFFFFu) { + seqno = LMIC.seqnoDn - 1; + } else { + seqno = LMIC.seqnoDn + seqnoDiff; + } + + if( !aes_verifyMic(LMIC.nwkKey, LMIC.devaddr, seqno, /*dn*/1, d, pend) ) { + LMICOS_logEventUint32("decodeFrame: bad MIC", os_rlsbf4(&d[pend])); + EV(spe3Cond, ERR, (e_.reason = EV::spe3Cond_t::CORRUPTED_MIC, + e_.eui1 = MAIN::CDEV->getEui(), + e_.info1 = Base::lsbf4(&d[pend]), + e_.info2 = seqno, + e_.info3 = LMIC.devaddr)); + goto norx; + } + if( seqno < LMIC.seqnoDn ) { + if( (s4_t)seqno > (s4_t)LMIC.seqnoDn ) { + EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_ROLL_OVER, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.seqnoDn, + e_.info2 = seqno)); + LMICOS_logEventUint32("decodeFrame: rollover discarded", ((u4_t)seqno << 16) | (LMIC.lastDnConf << 8) | (ftype << 0)); + goto norx; + } + if( seqno != LMIC.seqnoDn-1 || !LMIC.lastDnConf || ftype != HDR_FTYPE_DCDN ) { + EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_OBSOLETE, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.seqnoDn, + e_.info2 = seqno)); + LMICOS_logEventUint32("decodeFrame: Retransmit confimed discarded", ((u4_t)seqno << 16) | (LMIC.lastDnConf << 8) | (ftype << 0)); + goto norx; + } + // Replay of previous sequence number allowed only if + // previous frame and repeated both requested confirmation + // but set a flag, so we don't actually process the message. + LMICOS_logEventUint32("decodeFrame: Retransmit confimed accepted", ((u4_t)seqno << 16) | (LMIC.lastDnConf << 8) | (ftype << 0)); + replayConf = 1; + LMIC.dnConf = FCT_ACK; + } + else { + if( seqnoDiff > LMICbandplan_MAX_FCNT_GAP) { + LMICOS_logEventUint32("decodeFrame: gap too big", ((u4_t)seqnoDiff << 16) | (seqno & 0xFFFFu)); + goto norx; + } + if( seqno > LMIC.seqnoDn ) { + EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_SKIP, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.seqnoDn, + e_.info2 = seqno)); + } + LMIC.seqnoDn = seqno+1; // next number to be expected + DO_DEVDB(LMIC.seqnoDn,seqnoDn); + // DN frame requested confirmation - provide ACK once with next UP frame + LMIC.dnConf = LMIC.lastDnConf = (ftype == HDR_FTYPE_DCDN ? FCT_ACK : 0); + if (LMIC.dnConf) + LMICOS_logEventUint32("decodeFrame: Confirmed downlink", ((u4_t)seqno << 16) | (LMIC.lastDnConf << 8) | (ftype << 0)); + } + + if (port == 0 && olen != 0 && pend > poff) { + // we have a port-zero message, and piggyback mac data. + // discard, section 4.3.1.6 line 544-546 +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": port==0 && FOptsLen=%#x: discard\n", os_getTime(), olen); +#endif + goto norx; + } + + if( LMIC.dnConf || (fct & FCT_MORE) ) + LMIC.opmode |= OP_POLL; + + // We heard from network + LMIC.adrChanged = LMIC.rejoinCnt = 0; + setAdrAckCount(LINK_CHECK_INIT); +#if !defined(DISABLE_MCMD_RXParamSetupReq) + // We heard from network "on a Class A downlink" + LMIC.dn2Ans = 0; +#endif // !defined(DISABLE_MCMD_RXParamSetupReq) +#if !defined(DISABLE_MCMD_RXTimingSetupReq) + // We heard from network "on a Class A downlink" + LMIC.macRxTimingSetupAns = 0; +#endif // !defined(DISABLE_MCMD_RXParamSetupReq) +#if !defined(DISABLE_MCMD_DlChannelReq) && CFG_LMIC_EU_like + LMIC.macDlChannelAns = 0; +#endif + + int m = LMIC.rssi - RSSI_OFF - getSensitivity(LMIC.rps); + // for legacy reasons, LMIC.margin is set to the unsigned sensitivity. It can never be negative. + // it's only computed for legacy clients + LMIC.margin = m < 0 ? 0 : m > 254 ? 254 : m; + + // even if it's a replay confirmed, we process the mac options. + xref2u1_t opts = &d[OFF_DAT_OPTS]; + int oidx = scan_mac_cmds(opts, olen, port); + if( oidx != olen ) { + EV(specCond, ERR, (e_.reason = EV::specCond_t::CORRUPTED_FRAME, + e_.eui = MAIN::CDEV->getEui(), + e_.info = 0x1000000 + (oidx) + (olen<<8))); + oidx = olen; + } + + if( !replayConf ) { + // Handle payload only if not a replay + // Decrypt payload - if any + if( port >= 0 && pend-poff > 0 ) { + aes_cipher(port <= 0 ? LMIC.nwkKey : LMIC.artKey, LMIC.devaddr, seqno, /*dn*/1, d+poff, pend-poff); + if (port == 0) { + // this is a mac command. scan the options. +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": process mac commands for port 0 (olen=%#x)\n", os_getTime(), pend-poff); +#endif + int optendindex = scan_mac_cmds(d+poff, pend-poff, port); + if (optendindex != pend-poff) { +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF( + "%"LMIC_PRId_ostime_t": error processing mac commands for port 0 " + "(len=%#x, optendindex=%#x)\n", + os_getTime(), pend-poff, optendindex + ); +#endif + } + // wait to transmit until txcomplete: above. + } + } // end decrypt payload + EV(dfinfo, DEBUG, (e_.deveui = MAIN::CDEV->getEui(), + e_.devaddr = LMIC.devaddr, + e_.seqno = seqno, + e_.flags = (port < 0 ? EV::dfinfo_t::NOPORT : 0) | EV::dfinfo_t::DN, + e_.mic = Base::lsbf4(&d[pend]), + e_.hdr = d[LORA::OFF_DAT_HDR], + e_.fct = d[LORA::OFF_DAT_FCT], + e_.port = port, + e_.plen = dlen, + e_.opts.length = olen, + memcpy(&e_.opts[0], opts, olen))); + } else { + EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_REPLAY, + e_.eui = MAIN::CDEV->getEui(), + e_.info = Base::lsbf4(&d[pend]), + e_.info2 = seqno)); + // discard the data + LMICOS_logEventUint32("decodeFrame: discarding replay", ((u4_t)seqno << 16) | (LMIC.lastDnConf << 8) | (ftype << 0)); + goto norx; + } + + if( // NWK acks but we don't have a frame pending + (ackup && LMIC.txCnt == 0) || + // We sent up confirmed and we got a response in DNW1/DNW2 + // BUT it did not carry an ACK - this should never happen + // Do not resend and assume frame was not ACKed. + (!ackup && LMIC.txCnt != 0) ) { + EV(specCond, ERR, (e_.reason = EV::specCond_t::SPURIOUS_ACK, + e_.eui = MAIN::CDEV->getEui(), + e_.info = seqno, + e_.info2 = ackup)); +#if LMIC_DEBUG_LEVEL > 1 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": ??ack error ack=%d txCnt=%d\n", os_getTime(), ackup, LMIC.txCnt); +#endif + } + + if( LMIC.txCnt != 0 ) // we requested an ACK + orTxrxFlags(__func__, ackup ? TXRX_ACK : TXRX_NACK); + + if( port <= 0 ) { + orTxrxFlags(__func__, TXRX_NOPORT); + LMIC.dataBeg = poff; + LMIC.dataLen = 0; + } else { + orTxrxFlags(__func__, TXRX_PORT); + LMIC.dataBeg = poff; + LMIC.dataLen = pend-poff; + } +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": Received downlink, window=%s, port=%d, ack=%d, txrxFlags=%#x\n", os_getTime(), window, port, ackup, LMIC.txrxFlags); +#endif + return 1; +} + + +// ================================================================================ +// TX/RX transaction support + +// start reception and log. +static void radioRx (void) { + reportEventNoUpdate(EV_RXSTART); + os_radio(RADIO_RX); +} + +// start RX in window 2. +static void setupRx2 (void) { + initTxrxFlags(__func__, TXRX_DNW2); + LMIC.rps = dndr2rps(LMIC.dn2Dr); + LMIC.freq = LMIC.dn2Freq; + LMIC.dataLen = 0; + radioRx(); +} + +//! \brief Adjust the delay (in ticks) of the target window-open time from nominal. +//! \param hsym the duration of one-half symbol in osticks. +//! \param rxsyms_in the nominal window length -- minimum length of time to delay. +//! \return Effective delay to use (positive for later, negative for earlier). +//! \post LMIC.rxsyms is set to the number of rxsymbols to be used for preamble timeout. +//! \bug For FSK, the radio driver ignores LMIC.rxsysms, and uses a fixed value of 4080 bits +//! (81 ms) +//! +//! \details The calculation of the RX Window opening time has to balance several things. +//! The system clock might be inaccurate. Generally, the LMIC assumes that the timebase +//! is accurage to 100 ppm, or 0.01%. 0.01% of a 6 second window is 600 microseconds. +//! For LoRa, the fastest data rates of interest is SF7 (1024 us/symbol); with an 8-byte +//! preamble, the shortest preamble is 8.092ms long. If using FSK, the symbol rate is +//! 20 microseconds, but the preamble is 8*5 bits long, so the preamble is 800 microseconds. +//! Unless LMIC_ENABLE_arbitrary_clock_error is true, we fold clock errors of > 0.4% back +//! to 0.4%. +ostime_t LMICcore_adjustForDrift (ostime_t delay, ostime_t hsym, rxsyms_t rxsyms_in) { + ostime_t rxoffset; + + // decide if we want to move left or right of the reference time. + rxoffset = -LMICbandplan_RX_EXTRA_MARGIN_osticks; + + u2_t clockerr = LMIC.client.clockError; + + // Most crystal oscillators are 100 ppm. If things are that tight, there's + // no point in specifying a drift, as 6 seconds at 100ppm is +/- 600 microseconds. + // We position the windows at the front, and there's some extra margin, so... + // don't bother setting values <= 100 ppm. + if (clockerr != 0) + { + // client has set clock error. Limit this to 0.1% unless there's + // a compile-time configuration. (In other words, assume that millis() + // clock is accurate to 0.1%.) You should never use clockerror to + // compensate for system-late problems. + // note about compiler: The initializer for maxError is coded for + // maximum portability. On 16-bit systems, some compilers complain + // if we write x / (1000 * 1000). x / 1000 / 1000 uses constants, + // is generally acceptable so it can be optimized in compiler's own + // way. + u2_t const maxError = LMIC_kMaxClockError_ppm * MAX_CLOCK_ERROR / 1000 / 1000; + if (! LMIC_ENABLE_arbitrary_clock_error && clockerr > maxError) + { + clockerr = maxError; + } + } + + // If the clock is slow, the window needs to open earlier in our time + // in order to open at or before the specified time (in real world),. + // Don't bother to round, as this is very fine-grained. + ostime_t drift = (ostime_t)(((int64_t)delay * clockerr) / MAX_CLOCK_ERROR); + + // calculate the additional rxsyms needed to hit the window nominally. + ostime_t const tsym = 2 * hsym; + ostime_t driftwin; + driftwin = 2 * drift; + if (rxoffset < 0) + driftwin += -rxoffset; + // else we'll hit the window nominally. + + rxsyms_in += (driftwin + tsym - 1) / tsym; + + // reduce the rxoffset by the drift; this compensates for a slow clock; + // but it makes the rxtime too early by approximately `drift` if clock + // is fast. + rxoffset -= drift; + + setRxsyms(rxsyms_in); + + return delay + rxoffset; +} + +static void schedRx12 (ostime_t delay, osjobcb_t func, u1_t dr) { + ostime_t hsym = dr2hsym(dr); + + // Schedule the start of the receive window. os_getRadioRxRampup() is used to make sure we + // exit "sleep" well enough in advance of the receive window to be able to + // time things accurately. + // + // This also sets LMIC.rxsyms. This is NOT normally used for FSK; see LMICbandplan_txDoneFSK() + LMIC.rxtime = LMIC.txend + LMICcore_adjustForDrift(delay, hsym, LMICbandplan_MINRX_SYMS_LoRa_ClassA); + + LMIC_X_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": sched Rx12 %"LMIC_PRId_ostime_t"\n", os_getTime(), LMIC.rxtime - os_getRadioRxRampup()); + os_setTimedCallback(&LMIC.osjob, LMIC.rxtime - os_getRadioRxRampup(), func); +} + +static void setupRx1 (osjobcb_t func) { + initTxrxFlags(__func__, TXRX_DNW1); + // Turn LMIC.rps from TX over to RX + LMIC.rps = setNocrc(LMIC.rps,1); + LMIC.dataLen = 0; + LMIC.osjob.func = func; + radioRx(); +} + + +// Called by HAL once TX complete and delivers exact end of TX time stamp in LMIC.rxtime +static void txDone (ostime_t delay, osjobcb_t func) { +#if !defined(DISABLE_PING) + if( (LMIC.opmode & (OP_TRACK|OP_PINGABLE|OP_PINGINI)) == (OP_TRACK|OP_PINGABLE) ) { + rxschedInit(&LMIC.ping); // note: reuses LMIC.frame buffer! + LMIC.opmode |= OP_PINGINI; + } +#endif // !DISABLE_PING + + // Change RX frequency (can happen even for EU-like if programmed by DlChannelReq) + // change params and rps (US only) before we increment txChnl + LMICbandplan_setRx1Params(); + + // LMIC.dndr carries the TX datarate (can be != LMIC.datarate [confirm retries etc.]) + // Setup receive -- either schedule FSK or schedule rx1 or rx2 window. + if( LMICbandplan_isFSK() ) { + LMICbandplan_txDoneFSK(delay, func); + } + else + { + schedRx12(delay, func, LMIC.dndr); + } +} + +// ======================================== Join frames + + +#if !defined(DISABLE_JOIN) +static void onJoinFailed (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + // Notify app - must call LMIC_reset() to stop joining + // otherwise join procedure continues. + reportEventAndUpdate(EV_JOIN_FAILED); +} + +// process join-accept message or deal with no join-accept in slot 2. +static bit_t processJoinAccept (void) { + if ((LMIC.txrxFlags & TXRX_DNW1) != 0 && LMIC.dataLen == 0) + return 0; + + // formerly we asserted. + if ((LMIC.opmode & OP_TXRXPEND) == 0) + // nothing we can do. + return 1; + + // formerly we asserted. + if ((LMIC.opmode & (OP_JOINING|OP_REJOIN)) == 0) { + // we shouldn't be here. just drop the frame, but clean up txrxpend. + return processJoinAccept_badframe(); + } + + if( LMIC.dataLen == 0 ) { + // we didn't get any data and we're in slot 2. So... there's no join frame. + return processJoinAccept_nojoinframe(); + } + + u1_t hdr = LMIC.frame[0]; + u1_t dlen = LMIC.dataLen; + u4_t mic = os_rlsbf4(&LMIC.frame[dlen-4]); // safe before modified by encrypt! + LMIC_EV_VARIABLE(mic); // only used by EV(). + + if( (dlen != LEN_JA && dlen != LEN_JAEXT) + || (hdr & (HDR_FTYPE|HDR_MAJOR)) != (HDR_FTYPE_JACC|HDR_MAJOR_V1) ) { + EV(specCond, ERR, (e_.reason = EV::specCond_t::UNEXPECTED_FRAME, + e_.eui = MAIN::CDEV->getEui(), + e_.info = dlen < 4 ? 0 : mic, + e_.info2 = hdr + (dlen<<8))); + return processJoinAccept_badframe(); + } + aes_encrypt(LMIC.frame+1, dlen-1); + if( !aes_verifyMic0(LMIC.frame, dlen-4) ) { + EV(specCond, ERR, (e_.reason = EV::specCond_t::JOIN_BAD_MIC, + e_.info = mic)); + return processJoinAccept_badframe(); + } + + u4_t addr = os_rlsbf4(LMIC.frame+OFF_JA_DEVADDR); + LMIC.devaddr = addr; + LMIC.netid = os_rlsbf4(&LMIC.frame[OFF_JA_NETID]) & 0xFFFFFF; + + // initDefaultChannels(0) for EU-like, nothing otherwise + LMICbandplan_joinAcceptChannelClear(); + + // process the CFList if present + if (dlen == LEN_JAEXT) { + LMICbandplan_processJoinAcceptCFList(); + } + + // already incremented when JOIN REQ got sent off + aes_sessKeys(LMIC.devNonce-1, &LMIC.frame[OFF_JA_ARTNONCE], LMIC.nwkKey, LMIC.artKey); + DO_DEVDB(LMIC.netid, netid); + DO_DEVDB(LMIC.devaddr, devaddr); + DO_DEVDB(LMIC.nwkKey, nwkkey); + DO_DEVDB(LMIC.artKey, artkey); + + EV(joininfo, INFO, (e_.arteui = MAIN::CDEV->getArtEui(), + e_.deveui = MAIN::CDEV->getEui(), + e_.devaddr = LMIC.devaddr, + e_.oldaddr = oldaddr, + e_.nonce = LMIC.devNonce-1, + e_.mic = mic, + e_.reason = ((LMIC.opmode & OP_REJOIN) != 0 + ? EV::joininfo_t::REJOIN_ACCEPT + : EV::joininfo_t::ACCEPT))); + + // + // XXX(tmm@mcci.com) OP_REJOIN confuses me, and I'm not sure why we're + // adjusting DRs here. We've just received a join accept, and the + // datarate therefore shouldn't be in play. In effect, we set the + // initial data rate based on the number of times we tried to rejoin. + // + if( (LMIC.opmode & OP_REJOIN) != 0 ) { +#if CFG_region != LMIC_REGION_as923 + // TODO(tmm@mcci.com) regionalize + // Lower DR every try below current UP DR + // need to check feasibility? join feasability is default. + LMIC.datarate = lowerDR(LMIC.datarate, LMIC.rejoinCnt); +#else + // in the join of AS923 v1.1 or older, only DR2 (SF10) is used. + // TODO(tmm@mcci.com) if the rejoin logic is at all correct, we + // should be setting the uplink datarate based on the number of + // tries; this doesn't set the AS923 join data rate. + LMIC.datarate = AS923_DR_SF10; +#endif + } + LMIC.opmode &= ~(OP_JOINING|OP_TRACK|OP_REJOIN|OP_TXRXPEND|OP_PINGINI); + LMIC.opmode |= OP_NEXTCHNL; + LMIC.txCnt = 0; + stateJustJoined(); + // transition to the ADR_ACK initial state. + setAdrAckCount(LINK_CHECK_INIT); + + LMIC.dn2Dr = LMIC.frame[OFF_JA_DLSET] & 0x0F; + LMIC.rx1DrOffset = (LMIC.frame[OFF_JA_DLSET] >> 4) & 0x7; + LMIC.rxDelay = LMIC.frame[OFF_JA_RXDLY]; + if (LMIC.rxDelay == 0) LMIC.rxDelay = 1; + reportEventAndUpdate(EV_JOINED); + return 1; +} + +static bit_t processJoinAccept_badframe(void) { + if( (LMIC.txrxFlags & TXRX_DNW1) != 0 ) + // continue the join process: there's another window. + return 0; + else + // stop the join process + return processJoinAccept_nojoinframe(); +} + +static bit_t processJoinAccept_nojoinframe(void) { + // Valid states are JOINING (in which caise REJOIN is ignored) + // or ~JOINING and REJOIN. If it's a REJOIN, + // we need to turn off rejoin, signal an event, and increment + // the rejoin-sent count. Internal callers will turn on rejoin + // occasionally. + if( (LMIC.opmode & OP_JOINING) == 0) { + // formerly, we asserted ((LMIC.opmode & OP_REJOIN) != 0); + // but now we just return 1 if it's not asserted. + if ( (LMIC.opmode & OP_REJOIN) == 0) { + LMIC.opmode &= ~OP_TXRXPEND; + return 1; + } + LMIC.opmode &= ~(OP_REJOIN|OP_TXRXPEND); + if( LMIC.rejoinCnt < 10 ) + LMIC.rejoinCnt++; + reportEventAndUpdate(EV_REJOIN_FAILED); + // stop the join process. + return 1; + } + // otherwise it's a normal join. At end of rx2, so we + // need to schedule something. + LMIC.opmode &= ~OP_TXRXPEND; + reportEventNoUpdate(EV_JOIN_TXCOMPLETE); + int failed = LMICbandplan_nextJoinState(); + EV(devCond, DEBUG, (e_.reason = EV::devCond_t::NO_JACC, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.datarate|DR_PAGE, + e_.info2 = failed)); + // Build next JOIN REQUEST with next engineUpdate call + // Optionally, report join failed. + // Both after a random/chosen amount of ticks. That time + // is in LMIC.txend. The delay here is either zero or 1 + // tick; onJoinFailed()/runEngineUpdate() are responsible + // for honoring that. XXX(tmm@mcci.com) The IBM 1.6 code + // claimed to return a delay but really returns 0 or 1. + // Once we update as923 to return failed after dr2, we + // can take out this #if. + os_setTimedCallback(&LMIC.osjob, os_getTime()+failed, + failed + ? FUNC_ADDR(onJoinFailed) // one JOIN iteration done and failed + : FUNC_ADDR(runEngineUpdate)); // next step to be delayed + // stop this join process. + return 1; +} + +static void processRx2Jacc (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + if( LMIC.dataLen == 0 ) { + initTxrxFlags(__func__, 0); // nothing in 1st/2nd DN slot + } + // we're done with this join cycle anyway, so ignore the + // result of processJoinAccept() + (void) processJoinAccept(); +} + + +static void setupRx2Jacc (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + LMIC.osjob.func = FUNC_ADDR(processRx2Jacc); + setupRx2(); +} + + +static void processRx1Jacc (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + if( LMIC.dataLen == 0 || !processJoinAccept() ) + schedRx12(DELAY_JACC2_osticks, FUNC_ADDR(setupRx2Jacc), LMIC.dn2Dr); +} + + +static void setupRx1Jacc (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + setupRx1(FUNC_ADDR(processRx1Jacc)); +} + + +static void jreqDone (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + txDone(DELAY_JACC1_osticks, FUNC_ADDR(setupRx1Jacc)); +} + +#endif // !DISABLE_JOIN + +// ======================================== Data frames + +// Fwd decl. +static bit_t processDnData(void); + +static void processRx2DnData (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + if( LMIC.dataLen == 0 ) { + initTxrxFlags(__func__, 0); // nothing in 1st/2nd DN slot + // It could be that the gateway *is* sending a reply, but we + // just didn't pick it up. To avoid TX'ing again while the + // gateay is not listening anyway, delay the next transmission + // until DNW2_SAFETY_ZONE from now, and add up to 2 seconds of + // extra randomization. + // BUG(tmm@mcci.com) this delay is not needed for some + // regions, e.g. US915 and AU915, which have non-overlapping + // uplink and downlink. + txDelay(os_getTime() + DNW2_SAFETY_ZONE, 2); + } + processDnData(); +} + + +static void setupRx2DnData (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + LMIC.osjob.func = FUNC_ADDR(processRx2DnData); + setupRx2(); +} + + +static void processRx1DnData (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + if( LMIC.dataLen == 0 || !processDnData() ) + schedRx12(sec2osticks(LMIC.rxDelay +(int)DELAY_EXTDNW2), FUNC_ADDR(setupRx2DnData), LMIC.dn2Dr); +} + + +static void setupRx1DnData (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + setupRx1(FUNC_ADDR(processRx1DnData)); +} + + +static void updataDone (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + txDone(sec2osticks(LMIC.rxDelay), FUNC_ADDR(setupRx1DnData)); +} + +// ======================================== + +static bit_t sendAdrAckReq(void) { + if (LMIC.adrAckReq < LINK_CHECK_CONT) { + return 0; + } else if (LMIC.adrAckReq <= LINK_CHECK_DEAD) { + return 1; + } else if (LMIC.adrAckReq <= LINK_CHECK_DEAD + 32) { + // for compliance, though it's not clear why they care, we stop sending requests + // when we're right at the DEAD state + return 0; + } else if (LMIC.adrAckReq <= LINK_CHECK_UNJOIN - 32) { + return 0; + } else { + // otherwise, if our alternative is to unjoin and we have no other info, keep + // asking for a downlink. + return 1; + } +} + +static bit_t buildDataFrame (void) { + bit_t txdata = ((LMIC.opmode & (OP_TXDATA|OP_POLL)) != OP_POLL); + u1_t dlen = txdata ? LMIC.pendTxLen : 0; + + // Piggyback MAC options + // Prioritize by importance + // highest importance are the ones in the pendMac buffer. + int end = OFF_DAT_OPTS; + + // Send piggyback data if: !txdata or txport != 0 + if ((! txdata || LMIC.pendTxPort != 0) && LMIC.pendMacPiggyback && LMIC.pendMacLen != 0) { + os_copyMem(LMIC.frame + end, LMIC.pendMacData, LMIC.pendMacLen); + end += LMIC.pendMacLen; + } + LMIC.pendMacLen = 0; + LMIC.pendMacPiggyback = 0; + +#if !defined(DISABLE_MCMD_RXParamSetupReq) + // per 5.4, RxParamSetupAns is sticky. + if (LMIC.dn2Ans) { + if (LMIC.dn2Ans & 0x40) { + LMIC.dn2Ans ^= 0x40; + } else { + LMIC.frame[end + 0] = MCMD_RXParamSetupAns; + LMIC.frame[end + 1] = LMIC.dn2Ans & ~MCMD_RXParamSetupAns_RFU; + end += 2; + } + } +#endif // !DISABLE_MCMD_RXParamSetupReq +#if !defined(DISABLE_MCMD_DlChannelReq) + // per 5.4, DlChannelAns is sticky. + if (LMIC.macDlChannelAns) { + if (LMIC.macDlChannelAns & 0x40) { + LMIC.macDlChannelAns ^= 0x40; + } else { + LMIC.frame[end + 0] = MCMD_DlChannelAns; + LMIC.frame[end + 1] = LMIC.macDlChannelAns & ~MCMD_DlChannelAns_RFU; + end += 2; + } + } +#endif // !DISABLE_MCMD_DlChannelReq +#if !defined(DISABLE_MCMD_RXTimingSetupReq) + // per 5.7, RXTimingSetupAns is sticky + if (LMIC.macRxTimingSetupAns == 2) { + LMIC.macRxTimingSetupAns = 1; + } else if (LMIC.macRxTimingSetupAns) { + LMIC.frame[end++] = MCMD_RXTimingSetupAns; + } +#endif // !DISABLE_MCMD_RXTimingSetupReq) + +#if LMIC_ENABLE_DeviceTimeReq + if ( LMIC.txDeviceTimeReqState == lmic_RequestTimeState_tx ) { + LMIC.frame[end+0] = MCMD_DeviceTimeReq; + end += 1; + LMIC.txDeviceTimeReqState = lmic_RequestTimeState_rx; + } +#endif // LMIC_ENABLE_DeviceTimeReq +#if !defined(DISABLE_BEACONS) && defined(ENABLE_MCMD_BeaconTimingAns) + if ( LMIC.bcninfoTries > 0 ) { + LMIC.frame[end+0] = MCMD_BeaconInfoReq; + end += 1; + } +#endif + if (end > OFF_DAT_OPTS + 16) { + LMICOS_logEventUint32("piggyback mac opts too long", end); + return 0; + } + + if( LMIC.adrChanged ) { + // if ADR is enabled, and we were just counting down the + // transmits before starting an ADR, advance the timer so + // we'll do an ADR now. + if (LMIC.adrAckReq < LINK_CHECK_CONT) + setAdrAckCount(LINK_CHECK_CONT); + LMIC.adrChanged = 0; + } + + unsigned int flen = end + (txdata ? 5+dlen : 4); + if( flen > MAX_LEN_FRAME ) { + // Options and payload too big - delay payload + txdata = 0; + flen = end+4; + } + + u1_t maxFlen = LMICbandplan_maxFrameLen(LMIC.datarate); + + if (flen > maxFlen) { + LMICOS_logEventUint32("frame too long for this bandplan", ((u4_t)dlen << 16) | (flen << 8) | maxFlen); + return 0; + } + + LMIC.frame[OFF_DAT_HDR] = HDR_FTYPE_DAUP | HDR_MAJOR_V1; + LMIC.frame[OFF_DAT_FCT] = (LMIC.dnConf | LMIC.adrEnabled + | (sendAdrAckReq() ? FCT_ADRACKReq : 0) + | (end-OFF_DAT_OPTS)); + os_wlsbf4(LMIC.frame+OFF_DAT_ADDR, LMIC.devaddr); + + if( LMIC.txCnt == 0 && LMIC.upRepeatCount == 0 ) { + LMIC.seqnoUp += 1; + DO_DEVDB(LMIC.seqnoUp,seqnoUp); + } else { + LMICOS_logEventUint32("retransmit", ((u4_t)LMIC.frame[OFF_DAT_FCT] << 24u) | ((u4_t)LMIC.txCnt << 16u) | (LMIC.upRepeatCount << 8u) | (LMIC.upRepeat<<0u)); + EV(devCond, INFO, (e_.reason = EV::devCond_t::RE_TX, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.seqnoUp-1, + e_.info2 = ((LMIC.txCnt+1) | + (LMIC.upRepeatCount << 8) | + ((LMIC.datarate|DR_PAGE)<<16)))); + } + os_wlsbf2(LMIC.frame+OFF_DAT_SEQNO, LMIC.seqnoUp-1); + + // Clear pending DN confirmation + LMIC.dnConf = 0; + + if( txdata ) { + if( LMIC.pendTxConf ) { + // Confirmed only makes sense if we have a payload (or at least a port) + LMIC.frame[OFF_DAT_HDR] = HDR_FTYPE_DCUP | HDR_MAJOR_V1; + if( LMIC.txCnt == 0 ) LMIC.txCnt = 1; + } else if (LMIC.upRepeat != 0) { + // we are repeating. So we need to count here. + if (LMIC.upRepeatCount == 0) { + LMIC.upRepeatCount = 1; + } + } + LMIC.frame[end] = LMIC.pendTxPort; + os_copyMem(LMIC.frame+end+1, LMIC.pendTxData, dlen); + aes_cipher(LMIC.pendTxPort==0 ? LMIC.nwkKey : LMIC.artKey, + LMIC.devaddr, LMIC.seqnoUp-1, + /*up*/0, LMIC.frame+end+1, dlen); + } + aes_appendMic(LMIC.nwkKey, LMIC.devaddr, LMIC.seqnoUp-1, /*up*/0, LMIC.frame, flen-4); + + EV(dfinfo, DEBUG, (e_.deveui = MAIN::CDEV->getEui(), + e_.devaddr = LMIC.devaddr, + e_.seqno = LMIC.seqnoUp-1, + e_.flags = (LMIC.pendTxPort < 0 ? EV::dfinfo_t::NOPORT : EV::dfinfo_t::NOP), + e_.mic = Base::lsbf4(&LMIC.frame[flen-4]), + e_.hdr = LMIC.frame[LORA::OFF_DAT_HDR], + e_.fct = LMIC.frame[LORA::OFF_DAT_FCT], + e_.port = LMIC.pendTxPort, + e_.plen = txdata ? dlen : 0, + e_.opts.length = end-LORA::OFF_DAT_OPTS, + memcpy(&e_.opts[0], LMIC.frame+LORA::OFF_DAT_OPTS, end-LORA::OFF_DAT_OPTS))); + LMIC.dataLen = flen; + return 1; +} + + +#if !defined(DISABLE_BEACONS) +// Callback from HAL during scan mode or when job timer expires. +static void onBcnRx (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + // If we arrive via job timer make sure to put radio to rest. + os_radio(RADIO_RST); + os_clearCallback(&LMIC.osjob); + if( LMIC.dataLen == 0 ) { + // Nothing received - timeout + LMIC.opmode &= ~(OP_SCAN | OP_TRACK); + reportEventAndUpdate(EV_SCAN_TIMEOUT); + return; + } + if( ! LMIC_BEACON_SUCCESSFUL(decodeBeacon()) ) { + // Something is wrong with the beacon - continue scan + LMIC.dataLen = 0; + os_radio(RADIO_RXON); + os_setTimedCallback(&LMIC.osjob, LMIC.bcninfo.txtime, FUNC_ADDR(onBcnRx)); + return; + } + // Found our 1st beacon + // We don't have a previous beacon to calc some drift - assume + // an max error of 13ms = 128sec*100ppm which is roughly +/-100ppm + calcBcnRxWindowFromMillis(13,1); + LMIC.opmode &= ~OP_SCAN; // turn SCAN off + LMIC.opmode |= OP_TRACK; // auto enable tracking + reportEventAndUpdate(EV_BEACON_FOUND); // can be disabled in callback +} + + +// Enable receiver to listen to incoming beacons +// netid defines when scan stops (any or specific beacon) +// This mode ends with events: EV_SCAN_TIMEOUT/EV_SCAN_BEACON +// Implicitely cancels any pending TX/RX transaction. +// Also cancels an onpoing joining procedure. +static void startScan (void) { + // formerly, we asserted. + if (LMIC.devaddr == 0 || (LMIC.opmode & OP_JOINING) != 0) + return; + if( (LMIC.opmode & OP_SHUTDOWN) != 0 ) + return; + // Cancel onging TX/RX transaction + LMIC.txCnt = LMIC.dnConf = LMIC.bcninfo.flags = 0; + LMIC.opmode = (LMIC.opmode | OP_SCAN) & ~(OP_TXRXPEND); + LMICbandplan_setBcnRxParams(); + LMIC.rxtime = LMIC.bcninfo.txtime = os_getTime() + sec2osticks(BCN_INTV_sec+1); + os_setTimedCallback(&LMIC.osjob, LMIC.rxtime, FUNC_ADDR(onBcnRx)); + os_radio(RADIO_RXON); +} + + +bit_t LMIC_enableTracking (u1_t tryBcnInfo) { + if( (LMIC.opmode & (OP_SCAN|OP_TRACK|OP_SHUTDOWN)) != 0 ) + return 0; // already in progress or failed to enable + // If BCN info requested from NWK then app has to take are + // of sending data up so that MCMD_BeaconInfoReq can be attached. + if( (LMIC.bcninfoTries = tryBcnInfo) == 0 ) + startScan(); + return 1; // enabled +} + + +void LMIC_disableTracking (void) { + LMIC.opmode &= ~(OP_SCAN|OP_TRACK); + LMIC.bcninfoTries = 0; + engineUpdate(); +} +#endif // !DISABLE_BEACONS + + + + + + + + + + + + + + + + + + + + + + + + + + + +// ================================================================================ +// +// Join stuff +// +// ================================================================================ + +#if !defined(DISABLE_JOIN) +static void buildJoinRequest (u1_t ftype) { + // Do not use pendTxData since we might have a pending + // user level frame in there. Use RX holding area instead. + xref2u1_t d = LMIC.frame; + d[OFF_JR_HDR] = ftype; + os_getArtEui(d + OFF_JR_ARTEUI); + os_getDevEui(d + OFF_JR_DEVEUI); + os_wlsbf2(d + OFF_JR_DEVNONCE, LMIC.devNonce); + aes_appendMic0(d, OFF_JR_MIC); + + EV(joininfo,INFO,(e_.deveui = MAIN::CDEV->getEui(), + e_.arteui = MAIN::CDEV->getArtEui(), + e_.nonce = LMIC.devNonce, + e_.oldaddr = LMIC.devaddr, + e_.mic = Base::lsbf4(&d[LORA::OFF_JR_MIC]), + e_.reason = ((LMIC.opmode & OP_REJOIN) != 0 + ? EV::joininfo_t::REJOIN_REQUEST + : EV::joininfo_t::REQUEST))); + LMIC.dataLen = LEN_JR; + LMIC.devNonce++; + DO_DEVDB(LMIC.devNonce,devNonce); +} + +static void startJoining (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + // see issue #244: for backwards compatibility + // don't override what the user does after os_init(). + if (LMIC.initBandplanAfterReset) + LMICbandplan_resetDefaultChannels(); + else + LMIC.initBandplanAfterReset = 1; + + // let the client know that now's the time to update + // network settings. + reportEventAndUpdate(EV_JOINING); +} + +// reset the joined-to-network state (and clean up) +void LMIC_unjoin(void) { + // reset any joining flags + LMIC.opmode &= ~(OP_SCAN|OP_REJOIN|OP_UNJOIN); + + // put us in unjoined state: + LMIC.devaddr = 0; + + // clear transmit. + LMIC_clrTxData(); +} + +// Start join procedure if not already joined. +bit_t LMIC_startJoining (void) { + if( LMIC.devaddr == 0 ) { + // There should be no TX/RX going on + // ASSERT((LMIC.opmode & (OP_POLL|OP_TXRXPEND)) == 0); + LMIC.opmode &= ~OP_POLL; + // Lift any previous duty limitation + LMIC.globalDutyRate = 0; + // Cancel scanning + LMIC.opmode &= ~(OP_SCAN|OP_UNJOIN|OP_REJOIN|OP_LINKDEAD|OP_NEXTCHNL); + // Setup state + LMIC.rejoinCnt = LMIC.txCnt = 0; + resetJoinParams(); + LMICbandplan_initJoinLoop(); + LMIC.opmode |= OP_JOINING; + // reportEventAndUpdate will call engineUpdate which then starts sending JOIN REQUESTS + os_setCallback(&LMIC.osjob, FUNC_ADDR(startJoining)); + return 1; + } + return 0; // already joined +} + +static void unjoinAndRejoin(xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + LMIC_unjoin(); + LMIC_startJoining(); +} + +// do a deferred unjoin and rejoin, so not in engineupdate. +void LMIC_unjoinAndRejoin(void) { + os_setCallback(&LMIC.osjob, FUNC_ADDR(unjoinAndRejoin)); +} + +#endif // !DISABLE_JOIN + + +// ================================================================================ +// +// +// +// ================================================================================ + +#if !defined(DISABLE_PING) +static void processPingRx (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + if( LMIC.dataLen != 0 ) { + initTxrxFlags(__func__, TXRX_PING); + if( decodeFrame() ) { + reportEventNoUpdate(EV_RXCOMPLETE); + } + } + // Pick next ping slot + engineUpdate(); +} +#endif // !DISABLE_PING + +// process downlink data at close of RX window. Return zero if another RX window +// should be scheduled, non-zero to prevent scheduling of RX2 (if relevant). +// Confusingly, the caller actualyl does some of the calculation, so the answer from +// us is not always totaly right; the rx1 window check ignores our result unless +// LMIC.datalen was non zero before calling. +// +// Inputs: +// LMIC.dataLen number of bytes receieved; 0 --> no message at all received. +// LMIC.txCnt currnt confirmed uplink count, or 0 for unconfirmed. +// LMIC.txrxflags state of play for the Class A engine and message receipt. +// +// and many other flags in txcomplete(). + +// forward references. +static bit_t processDnData_norx(void); +static bit_t processDnData_txcomplete(void); + +static bit_t processDnData (void) { + // if no TXRXPEND, we shouldn't be here and can do nothign. + // formerly we asserted. + if ((LMIC.opmode & OP_TXRXPEND) == 0) + return 1; + + if( LMIC.dataLen == 0 ) { + // if this is an RX1 window, shouldn't we return 0 to schedule + // RX2? in fact, the rx1 caller ignores what we return, and + // norx() doesn't call txcomplete if this is RX1. + return processDnData_norx(); + } + // if we get here, LMIC.dataLen != 0, so there is some + // traffic. + else if( !decodeFrame() ) { + // if we are in downlink window 1, we need to schedule + // downlink window 2. + if( (LMIC.txrxFlags & TXRX_DNW1) != 0 ) + return 0; + else + // otherwise we are in downlink window 2; we will not + // get any more downlink traffic from this uplink, so we need + // to close the books on this uplink attempt + return processDnData_norx(); + } + // downlink frame was accepted. This means that we're done. Except + // there's one bizarre corner case. If we sent a confirmed message + // and got a downlink that didn't have an ACK, we have to retry. + // It is not clear why the network is permitted to do this; the + // fact that they scheduled a downlink for us during one of the RX + // windows is clear confirmation that the uplink made it to the + // network and was valid. However, compliance checks this, so + // we have to handle it and retransmit. + else if (LMIC.txCnt != 0 && (LMIC.txrxFlags & TXRX_NACK) != 0) + { + // grr. we're confirmed but the network downlink did not + // set the ACK bit. We know txCnt is non-zero, so this + // will immediately fall into the retransmit path. We don't + // want to do this unless it's a confirmed uplink. + return processDnData_norx(); + } + // the transmit of the uplink is really complete. + else { + return processDnData_txcomplete(); + } +} + +// nothing was received this window. +static bit_t processDnData_norx(void) { + if( LMIC.txCnt != 0 ) { + if( LMIC.txCnt < TXCONF_ATTEMPTS ) { + // Per [1.0.3] section 18.4, it is recommended that the device adjust datarate down. + // The spec is not clear about what should happen in case the data size is too large + // for the new frame len, but it seems that we should leave theframe len at the new + // data size. Therefore, we set the new data rate here, and then check at transmit time + // whether the packet is now too large; if so, we abandon the transmission. + LMIC.txCnt += 1; + // becase txCnt was at least 1 when we entered this branch, this if() will be taken + // for txCnt == 3, 5, 7. + if (LMIC.txCnt & 1) { + dr_t adjustedDR; + // lower DR + adjustedDR = decDR(LMIC.datarate); + setDrTxpow(DRCHG_NOACK, adjustedDR, KEEP_TXPOW); + } + + // TODO(tmm@mcci.com): check feasibility of lower datarate + // Schedule another retransmission + txDelay(LMIC.rxtime, RETRY_PERIOD_secs); + LMIC.opmode &= ~OP_TXRXPEND; + engineUpdate(); + return 1; + } + // confirmed uplink is complete without an ack: no port and no flag + initTxrxFlags(__func__, TXRX_NACK | TXRX_NOPORT); + } else if (LMIC.upRepeatCount != 0) { + if (LMIC.upRepeatCount < LMIC.upRepeat) { + LMICOS_logEventUint32("processDnData: repeat", (LMIC.upRepeat<<8u) | (LMIC.upRepeatCount<<0u)); + LMIC.upRepeatCount += 1; + txDelay(os_getTime() + ms2osticks(LMICbandplan_TX_RECOVERY_ms), 0); + LMIC.opmode &= ~OP_TXRXPEND; + engineUpdate(); + return 1; + } + // counted out: nothing received. + initTxrxFlags(__func__, TXRX_NOPORT); + } else { + // Nothing received - implies no port + initTxrxFlags(__func__, TXRX_NOPORT); + } + setAdrAckCount(LMIC.adrAckReq + 1); + LMIC.dataBeg = LMIC.dataLen = 0; + + return processDnData_txcomplete(); +} + +// this Class-A uplink-and-receive cycle is complete. +static bit_t processDnData_txcomplete(void) { + LMIC.opmode &= ~(OP_TXDATA|OP_TXRXPEND); + // turn off all the repeat stuff. + LMIC.txCnt = LMIC.upRepeatCount = 0; + + // if there's pending mac data that's not piggyback, launch it now. + if (LMIC.pendMacLen != 0) { + if (LMIC.pendMacPiggyback) { + LMICOS_logEvent("piggyback mac message"); + LMIC.opmode |= OP_POLL; // send back the mac answers even if there's no data. + } else { + // Every mac command on port 0 requires an uplink, if there's data. + // TODO(tmm@mcci.com) -- this is why we need a queueing structure for + // uplinks. + // open code the logic to build this because we don't want to call + // engineUpdate right now. Data is already in the uplink buffer. + LMIC.pendTxConf = 0; // not confirmed + LMIC.pendTxPort = 0; // port 0 + LMIC.pendTxLen = LMIC.pendMacLen; + LMIC.pendMacLen = 0; // discard mac data! + LMIC.opmode |= OP_TXDATA; + LMICOS_logEvent("port0 mac message"); + } + } + + // Half-duplex gateways can have appreciable turn-around times, + // so we force a wait. It might be nice to randomize this a little, + // so that armies of identical devices will not try to talk all + // at once. This is potentially band-specific, so we let it come + // from the band-plan files. + txDelay(os_getTime() + ms2osticks(LMICbandplan_TX_RECOVERY_ms), 0); + +#if LMIC_ENABLE_DeviceTimeReq + // + // if the DeviceTimeReq FSM is active, we need to move it to idle, + // completing the callback. + // + lmic_request_time_state_t const requestTimeState = LMIC.txDeviceTimeReqState; + if ( requestTimeState != lmic_RequestTimeState_idle ) { + lmic_request_network_time_cb_t * const pNetworkTimeCb = LMIC.client.pNetworkTimeCb; + int flagSuccess = (LMIC.txDeviceTimeReqState == lmic_RequestTimeState_success); + LMIC.txDeviceTimeReqState = lmic_RequestTimeState_idle; + if (pNetworkTimeCb != NULL) { + // reset the callback, so that the user's routine + // can post another request if desired. + LMIC.client.pNetworkTimeCb = NULL; + + // call the user's notification routine. + (*pNetworkTimeCb)(LMIC.client.pNetworkTimeUserData, flagSuccess); + } + } +#endif // LMIC_ENABLE_DeviceTimeReq + + if( (LMIC.txrxFlags & (TXRX_DNW1|TXRX_DNW2|TXRX_PING)) != 0 && (LMIC.opmode & OP_LINKDEAD) != 0 ) { + LMIC.opmode &= ~OP_LINKDEAD; + reportEventNoUpdate(EV_LINK_ALIVE); + } + reportEventAndUpdate(EV_TXCOMPLETE); + // If we haven't heard from NWK in a while although we asked for a sign + // assume link is dead - notify application and keep going + if( LMIC.adrAckReq > LINK_CHECK_DEAD ) { + // We haven't heard from NWK for some time although we + // asked for a response for some time - assume we're disconnected. Lower DR one notch. + EV(devCond, ERR, (e_.reason = EV::devCond_t::LINK_DEAD, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.adrAckReq)); + dr_t newDr = decDR((dr_t)LMIC.datarate); + // newDr must be feasible; there must be at least + // one channel that supports the new datarate. If not, stay + // at current datarate (which finalizes things). + if (! LMICbandplan_isDataRateFeasible(newDr)) { + LMICOS_logEventUint32("LINK_CHECK_DEAD, new DR not feasible", (newDr << 8) | LMIC.datarate); + newDr = LMIC.datarate; + } + if( newDr == (dr_t)LMIC.datarate) { + // We are already at the minimum datarate + // if the link is already marked dead, we need to join. +#if !defined(DISABLE_JOIN) + if ( LMIC.adrAckReq > LINK_CHECK_UNJOIN ) { + LMIC.opmode |= OP_UNJOIN; + } +#endif // !defined(DISABLE_JOIN) + } else if (newDr == LORAWAN_DR0) { + // the spec says: the ADRACKReq shall not be set if + // the device uses its lowest available data rate. + // (1.0.3, 4.3.1.1, line 458) + // We let the count continue to increase. + } else { + // we successfully lowered the data rate... + // reset so that we'll lower again after the next + // 32 uplinks. + setAdrAckCount(LINK_CHECK_CONT); + } + // Decrease DataRate and restore fullpower. + setDrTxpow(DRCHG_NOADRACK, newDr, pow2dBm(0)); + + // be careful only to report EV_LINK_DEAD once. + u2_t old_opmode = LMIC.opmode; + LMIC.opmode = old_opmode | OP_LINKDEAD; + if (LMIC.opmode != old_opmode) + reportEventNoUpdate(EV_LINK_DEAD); // update? + } +#if !defined(DISABLE_BEACONS) + // If this falls to zero the NWK did not answer our MCMD_BeaconInfoReq commands - try full scan + if( LMIC.bcninfoTries > 0 ) { + if( (LMIC.opmode & OP_TRACK) != 0 ) { + reportEventNoUpdate(EV_BEACON_FOUND); // update? + LMIC.bcninfoTries = 0; + } + else if( --LMIC.bcninfoTries == 0 ) { + startScan(); // NWK did not answer - try scan + } + } +#endif // !DISABLE_BEACONS + return 1; +} + +#if !defined(DISABLE_BEACONS) +static void processBeacon (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + ostime_t lasttx = LMIC.bcninfo.txtime; // save here - decodeBeacon might overwrite + u1_t flags = LMIC.bcninfo.flags; + ev_t ev; + + if( LMIC.dataLen != 0 && LMIC_BEACON_SUCCESSFUL(decodeBeacon()) ) { + ev = EV_BEACON_TRACKED; + if( (flags & (BCN_PARTIAL|BCN_FULL)) == 0 ) { + // We don't have a previous beacon to calc some drift - assume + // an max error of 13ms = 128sec*100ppm which is roughly +/-100ppm + calcBcnRxWindowFromMillis(13,0); + goto rev; + } + // We have a previous BEACON to calculate some drift + s2_t drift = BCN_INTV_osticks - (LMIC.bcninfo.txtime - lasttx); + if( LMIC.missedBcns > 0 ) { + drift = LMIC.drift + (drift - LMIC.drift) / (LMIC.missedBcns+1); + } + if( (LMIC.bcninfo.flags & BCN_NODRIFT) == 0 ) { + s2_t diff = LMIC.drift - drift; + if( diff < 0 ) diff = -diff; + LMIC.lastDriftDiff = diff; + if( LMIC.maxDriftDiff < diff ) + LMIC.maxDriftDiff = diff; + LMIC.bcninfo.flags &= ~BCN_NODDIFF; + } + LMIC.drift = drift; + LMIC.missedBcns = LMIC.rejoinCnt = 0; + LMIC.bcninfo.flags &= ~BCN_NODRIFT; + EV(devCond,INFO,(e_.reason = EV::devCond_t::CLOCK_DRIFT, + e_.eui = MAIN::CDEV->getEui(), + e_.info = drift, + e_.info2 = /*occasion BEACON*/0)); + // formerly we'd assert on BCN_PARTIAL|BCN_FULL, but we can't get here if so + } else { + ev = EV_BEACON_MISSED; + LMIC.bcninfo.txtime += BCN_INTV_osticks - LMIC.drift; + LMIC.bcninfo.time += BCN_INTV_sec; + LMIC.missedBcns++; + // Delay any possible TX after surmised beacon - it's there although we missed it + txDelay(LMIC.bcninfo.txtime + BCN_RESERVE_osticks, 4); + // if too many missed beacons or we lose sync, drop back to Class A. + if( LMIC.missedBcns > MAX_MISSED_BCNS || + LMIC.bcnRxsyms > MAX_RXSYMS ) { + LMIC.opmode &= ~(OP_TRACK|OP_PINGABLE|OP_PINGINI|OP_REJOIN); + reportEventAndUpdate(EV_LOST_TSYNC); + return; + } + } + LMIC.bcnRxtime = LMIC.bcninfo.txtime + BCN_INTV_osticks - calcRxWindow(0,DR_BCN); + LMIC.bcnRxsyms = LMIC.rxsyms; + rev: + LMICbandplan_advanceBeaconChannel(); +#if !defined(DISABLE_PING) + if( (LMIC.opmode & OP_PINGINI) != 0 ) + rxschedInit(&LMIC.ping); // note: reuses LMIC.frame buffer! +#endif // !DISABLE_PING + reportEventAndUpdate(ev); +} + +// job entry: time to start receiving a beacon. +static void startRxBcn (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + LMIC.osjob.func = FUNC_ADDR(processBeacon); + radioRx(); +} +#endif // !DISABLE_BEACONS + + +#if !defined(DISABLE_PING) +// job entry: time to start receiving in our scheduled downlink slot. +static void startRxPing (xref2osjob_t osjob) { + LMIC_API_PARAMETER(osjob); + + LMIC.osjob.func = FUNC_ADDR(processPingRx); + radioRx(); +} +#endif // !DISABLE_PING + + +// Decide what to do next for the MAC layer of a device. Inner part. +// Only called from outer part. +static void engineUpdate_inner (void) { +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": engineUpdate, opmode=0x%x\n", os_getTime(), LMIC.opmode); +#endif + // Check for ongoing state: scan or TX/RX transaction + if( (LMIC.opmode & (OP_SCAN|OP_TXRXPEND|OP_SHUTDOWN)) != 0 ) + return; + +#if !defined(DISABLE_JOIN) + if( LMIC.devaddr == 0 && (LMIC.opmode & OP_JOINING) == 0 ) { + LMIC_startJoining(); + return; + } + // we're joined but LinkTracking says we're out of luck... + if ( LMIC.devaddr != 0 && (LMIC.opmode & OP_UNJOIN) != 0 ) { + LMIC.opmode &= ~OP_UNJOIN; + LMIC_unjoinAndRejoin(); + return; + } +#endif // !DISABLE_JOIN + + ostime_t now = os_getTime(); + ostime_t txbeg = 0; + +#if !defined(DISABLE_BEACONS) + ostime_t rxtime = 0; + + if( (LMIC.opmode & OP_TRACK) != 0 ) { + // We are tracking a beacon + // formerly asserted ( now - (LMIC.bcnRxtime - os_getRadioRxRampup()) <= 0 ); + rxtime = LMIC.bcnRxtime - os_getRadioRxRampup(); + if (now - rxtime < 0) { + // too late: drop out of Class B. + LMIC.opmode &= ~(OP_TRACK|OP_PINGABLE|OP_PINGINI|OP_REJOIN); + reportEventNoUpdate(EV_LOST_TSYNC); + return; + } + } +#endif // !DISABLE_BEACONS + + if( (LMIC.opmode & (OP_JOINING|OP_REJOIN|OP_TXDATA|OP_POLL)) != 0 ) { + // Assuming txChnl points to channel which first becomes available again. + bit_t jacc = ((LMIC.opmode & (OP_JOINING|OP_REJOIN)) != 0 ? 1 : 0); + // Find next suitable channel and return availability time + if( (LMIC.opmode & OP_NEXTCHNL) != 0 ) { + txbeg = LMIC.txend = LMICbandplan_nextTx(now); + LMIC.opmode &= ~OP_NEXTCHNL; + } else { + // no need to consider anything but LMIC.txend. + txbeg = LMIC.txend; + } + // Delayed TX or waiting for duty cycle? + if( (LMIC.globalDutyRate != 0 || (LMIC.opmode & OP_RNDTX) != 0) && (txbeg - LMIC.globalDutyAvail) < 0 ) + txbeg = LMIC.globalDutyAvail; +#if !defined(DISABLE_BEACONS) + // If we're tracking a beacon... + // then make sure TX-RX transaction is complete before beacon + if( (LMIC.opmode & OP_TRACK) != 0 && + txbeg + (jacc ? JOIN_GUARD_osticks : TXRX_GUARD_osticks) - rxtime > 0 ) { + // Not enough time to complete TX-RX before beacon - postpone after beacon. + // In order to avoid clustering of postponed TX right after beacon randomize start! + txDelay(rxtime + BCN_RESERVE_osticks, 16); + txbeg = 0; + goto checkrx; + } +#endif // !DISABLE_BEACONS + // Earliest possible time vs overhead to setup radio + if( txbeg - (now + TX_RAMPUP) < 0 ) { + // We could send right now! + txbeg = now; + dr_t txdr = (dr_t)LMIC.datarate; +#if !defined(DISABLE_JOIN) + if( jacc ) { + u1_t ftype; + if( (LMIC.opmode & OP_REJOIN) != 0 ) { +#if CFG_region != LMIC_REGION_as923 + // in AS923 v1.1 or older, no need to change the datarate. + // otherwise we need to check feasibility. + txdr = lowerDR(txdr, LMIC.rejoinCnt); +#endif + } + ftype = HDR_FTYPE_JREQ; + buildJoinRequest(ftype); + LMIC.osjob.func = FUNC_ADDR(jreqDone); + } else +#endif // !DISABLE_JOIN + { + if( LMIC.seqnoDn >= 0xFFFFFF80 ) { + // Imminent roll over - proactively reset MAC + EV(specCond, INFO, (e_.reason = EV::specCond_t::DNSEQNO_ROLL_OVER, + e_.eui = MAIN::CDEV->getEui(), + e_.info = LMIC.seqnoDn, + e_.info2 = 0)); + // Device has to react! NWK will not roll over and just stop sending. + // Thus, we have N frames to detect a possible lock up. + reset: + os_setCallback(&LMIC.osjob, FUNC_ADDR(runReset)); + return; + } + if( (LMIC.txCnt==0 && LMIC.seqnoUp == 0xFFFFFFFF) ) { + // Roll over of up seq counter + EV(specCond, ERR, (e_.reason = EV::specCond_t::UPSEQNO_ROLL_OVER, + e_.eui = MAIN::CDEV->getEui(), + e_.info2 = LMIC.seqnoUp)); + // Do not run RESET event callback from here! + // App code might do some stuff after send unaware of RESET. + goto reset; + } + if (! buildDataFrame()) { + // can't transmit this message. Report completion. + initTxrxFlags(__func__, TXRX_LENERR); + if (LMIC.pendTxConf || LMIC.txCnt) { + orTxrxFlags(__func__, TXRX_NACK); + } + LMIC.opmode &= ~(OP_POLL|OP_RNDTX|OP_TXDATA|OP_TXRXPEND); + LMIC.dataBeg = LMIC.dataLen = 0; + reportEventNoUpdate(EV_TXCOMPLETE); + return; + } + LMIC.osjob.func = FUNC_ADDR(updataDone); + } // end of else (not joining) + LMIC.rps = setCr(updr2rps(txdr), (cr_t)LMIC.errcr); + LMIC.dndr = txdr; // carry TX datarate (can be != LMIC.datarate) over to txDone/setupRx1 + LMIC.opmode = (LMIC.opmode & ~(OP_POLL|OP_RNDTX)) | OP_TXRXPEND | OP_NEXTCHNL; + LMICbandplan_updateTx(txbeg); + // limit power to value asked in adr + LMIC.radio_txpow = LMIC.txpow > LMIC.adrTxPow ? LMIC.adrTxPow : LMIC.txpow; + reportEventNoUpdate(EV_TXSTART); + os_radio(RADIO_TX); + return; + } + // Cannot yet TX + if( (LMIC.opmode & OP_TRACK) == 0 ) + goto txdelay; // We don't track the beacon - nothing else to do - so wait for the time to TX + // Consider RX tasks + if( txbeg == 0 ) // zero indicates no TX pending + txbeg += 1; // TX delayed by one tick (insignificant amount of time) + } else { + // No TX pending - no scheduled RX + if( (LMIC.opmode & OP_TRACK) == 0 ) + return; + } + +#if !defined(DISABLE_BEACONS) + // Are we pingable? + checkrx: +#if !defined(DISABLE_PING) + if( (LMIC.opmode & OP_PINGINI) != 0 ) { + // One more RX slot in this beacon period? + if( rxschedNext(&LMIC.ping, now+os_getRadioRxRampup()) ) { + if( txbeg != 0 && (txbeg - LMIC.ping.rxtime) < 0 ) + goto txdelay; + LMIC.rxsyms = LMIC.ping.rxsyms; + LMIC.rxtime = LMIC.ping.rxtime; + LMIC.freq = LMIC.ping.freq; + LMIC.rps = dndr2rps(LMIC.ping.dr); + LMIC.dataLen = 0; + ostime_t rxtime_ping = LMIC.rxtime - os_getRadioRxRampup(); + // did we miss the time? + if (now - rxtime_ping > 0) { + LMIC.opmode &= ~(OP_TRACK|OP_PINGABLE|OP_PINGINI|OP_REJOIN); + reportEventNoUpdate(EV_LOST_TSYNC); + } else { + os_setTimedCallback(&LMIC.osjob, rxtime_ping, FUNC_ADDR(startRxPing)); + } + return; + } + // no - just wait for the beacon + } +#endif // !DISABLE_PING + + if( txbeg != 0 && (txbeg - rxtime) < 0 ) + goto txdelay; + + LMICbandplan_setBcnRxParams(); + LMIC.rxsyms = LMIC.bcnRxsyms; + LMIC.rxtime = LMIC.bcnRxtime; + if( now - rxtime >= 0 ) { + LMIC.osjob.func = FUNC_ADDR(processBeacon); + + radioRx(); + return; + } + os_setTimedCallback(&LMIC.osjob, rxtime, FUNC_ADDR(startRxBcn)); + return; +#endif // !DISABLE_BEACONS + + txdelay: + EV(devCond, INFO, (e_.reason = EV::devCond_t::TX_DELAY, + e_.eui = MAIN::CDEV->getEui(), + e_.info = osticks2ms(txbeg-now), + e_.info2 = LMIC.seqnoUp-1)); + LMIC_X_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": next engine update in %"LMIC_PRId_ostime_t"\n", now, txbeg-TX_RAMPUP); + os_setTimedCallback(&LMIC.osjob, txbeg-TX_RAMPUP, FUNC_ADDR(runEngineUpdate)); +} + +// Decide what to do next for the MAC layer of a device. +// Outer part. Safe to call from anywhere; defers if it +// detects a recursive call. +static void engineUpdate (void) { + lmic_engine_update_state_t state; + + state = LMIC.engineUpdateState; + if (state == lmic_EngineUpdateState_idle) { + LMIC.engineUpdateState = lmic_EngineUpdateState_busy; + do { + engineUpdate_inner(); + state = LMIC.engineUpdateState - 1; + LMIC.engineUpdateState = state; + } while (state != lmic_EngineUpdateState_idle); + } else { + LMIC.engineUpdateState = lmic_EngineUpdateState_again; + } +} + +void LMIC_setAdrMode (bit_t enabled) { + LMIC.adrEnabled = enabled ? FCT_ADREN : 0; +} + + +// Should we have/need an ext. API like this? +void LMIC_setDrTxpow (dr_t dr, s1_t txpow) { + setDrTxpow(DRCHG_SET, dr, txpow); +} + + +void LMIC_shutdown (void) { + os_clearCallback(&LMIC.osjob); + os_radio(RADIO_RST); + LMIC.opmode |= OP_SHUTDOWN; +} + +// reset the LMIC. This is called at startup; the clear of LMIC.osjob +// only works because the LMIC is guaranteed to be zero in that case. +// But it's also called at frame-count rollover; in that case we have +// to ensure that the user callback pointers are not clobbered. +void LMIC_reset (void) { + EV(devCond, INFO, (e_.reason = EV::devCond_t::LMIC_EV, + e_.eui = MAIN::CDEV->getEui(), + e_.info = EV_RESET)); + os_radio(RADIO_RST); + os_clearCallback(&LMIC.osjob); + + // save callback info, clear LMIC, restore. + do { + lmic_client_data_t client = LMIC.client; + + os_clearMem((xref2u1_t)&LMIC,SIZEOFEXPR(LMIC)); + + LMIC.client = client; + } while (0); + + // LMIC.devaddr = 0; // true from os_clearMem(). + LMIC.devNonce = os_getRndU2(); + LMIC.opmode = OP_NONE; + LMIC.errcr = CR_4_5; + LMIC.adrEnabled = FCT_ADREN; + resetJoinParams(); + LMIC.rxDelay = DELAY_DNW1; + // LMIC.pendMacLen = 0; + // LMIC.pendMacPiggyback = 0; + // LMIC.dn2Ans = 0; + // LMIC.macDlChannelAns = 0; + // LMIC.macRxTimingSetupAns = 0; +#if !defined(DISABLE_PING) + LMIC.ping.freq = FREQ_PING; // defaults for ping + LMIC.ping.dr = DR_PING; // ditto + LMIC.ping.intvExp = 0xFF; +#endif // !DISABLE_PING + + LMICbandplan_resetDefaultChannels(); + DO_DEVDB(LMIC.devaddr, devaddr); + DO_DEVDB(LMIC.devNonce, devNonce); + DO_DEVDB(LMIC.dn2Dr, dn2Dr); + DO_DEVDB(LMIC.dn2Freq, dn2Freq); +#if !defined(DISABLE_PING) + DO_DEVDB(LMIC.ping.freq, pingFreq); + DO_DEVDB(LMIC.ping.dr, pingDr); + DO_DEVDB(LMIC.ping.intvExp, pingIntvExp); +#endif // !DISABLE_PING +#if LMIC_ENABLE_DeviceTimeReq + LMIC.txDeviceTimeReqState = lmic_RequestTimeState_idle; + LMIC.netDeviceTime = 0; // the "invalid" time. + LMIC.netDeviceTimeFrac = 0; +#endif // LMIC_ENABLE_DeviceTimeReq +} + + +void LMIC_init (void) { + LMIC.opmode = OP_SHUTDOWN; + LMICbandplan_init(); +} + + +void LMIC_clrTxData (void) { + u2_t opmode = LMIC.opmode; + bit_t const txActive = opmode & OP_TXDATA; + if (! txActive) { + return; + } + LMIC.pendTxLen = 0; + opmode &= ~(OP_TXDATA | OP_POLL); + if (! (opmode & OP_JOINING)) { + // in this case, we are joining, and the TX data + // is just pending. + opmode &= ~(OP_TXRXPEND); + } + + LMIC.opmode = opmode; + + if (txActive) + reportEventNoUpdate(EV_TXCANCELED); + + if( (LMIC.opmode & (OP_JOINING|OP_SCAN)) != 0 ) // do not interfere with JOINING + return; + os_clearCallback(&LMIC.osjob); + os_radio(RADIO_RST); + engineUpdate(); +} + +dr_t LMIC_feasibleDataRateForFrame(dr_t dr, u1_t payloadSize) { + if (payloadSize > MAX_LEN_PAYLOAD) { + return dr; + } + + const u1_t frameSize = payloadSize + OFF_DAT_OPTS + 5; + dr_t trialDr, nextDr; + + for (trialDr = dr; ;) { + if (! LMICbandplan_isDataRateFeasible(trialDr)) + break; + u1_t maxSizeThisDr = LMICbandplan_maxFrameLen(trialDr); + if (maxSizeThisDr == 0) { + break; + } else if (frameSize <= maxSizeThisDr) { + // we found one that is feasible! + return trialDr; + } + // try the next DR + nextDr = incDR(trialDr); + if (nextDr == trialDr) + break; + trialDr = nextDr; + } + + // if we get here, we didn't find a working dr. + return dr; +} + +static bit_t isTxPathBusy(void) { + return (LMIC.opmode & (OP_POLL | OP_TXDATA | OP_JOINING | OP_TXRXPEND)) != 0; +} + +bit_t LMIC_queryTxReady (void) { + return ! isTxPathBusy(); +} + +static bit_t adjustDrForFrameIfNotBusy(u1_t len) { + if (isTxPathBusy()) { + return 0; + } + dr_t newDr = LMIC_feasibleDataRateForFrame(LMIC.datarate, len); + if (newDr != LMIC.datarate) { + setDrTxpow(DRCHG_FRAMESIZE, newDr, KEEP_TXPOW); + } + return 1; +} + +void LMIC_setTxData (void) { + adjustDrForFrameIfNotBusy(LMIC.pendTxLen); + LMIC_setTxData_strict(); +} + +void LMIC_setTxData_strict (void) { + if (isTxPathBusy()) { + return; + } + + LMICOS_logEventUint32(__func__, ((u4_t)LMIC.pendTxPort << 24u) | ((u4_t)LMIC.pendTxConf << 16u) | (LMIC.pendTxLen << 0u)); + LMIC.opmode |= OP_TXDATA; + if( (LMIC.opmode & OP_JOINING) == 0 ) { + LMIC.txCnt = 0; // reset the confirmed uplink FSM + LMIC.upRepeatCount = 0; // reset the unconfirmed repeat FSM + } + engineUpdate(); +} + + +// send a message, attempting to adjust TX data rate +lmic_tx_error_t LMIC_setTxData2 (u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed) { + adjustDrForFrameIfNotBusy(dlen); + return LMIC_setTxData2_strict(port, data, dlen, confirmed); +} + +// send a message w/o callback; do not adjust data rate +lmic_tx_error_t LMIC_setTxData2_strict (u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed) { + if (isTxPathBusy()) { + // already have a message queued + return LMIC_ERROR_TX_BUSY; + } + if( dlen > SIZEOFEXPR(LMIC.pendTxData) ) + return LMIC_ERROR_TX_TOO_LARGE; + if( data != (xref2u1_t)0 ) + os_copyMem(LMIC.pendTxData, data, dlen); + LMIC.pendTxConf = confirmed; + LMIC.pendTxPort = port; + LMIC.pendTxLen = dlen; + LMIC_setTxData_strict(); + if ( (LMIC.opmode & OP_TXDATA) == 0 ) { + if (LMIC.txrxFlags & TXRX_LENERR) { + return LMIC_ERROR_TX_NOT_FEASIBLE; + } else { + // data has already been completed with error for some reason + return LMIC_ERROR_TX_FAILED; + } + } + return LMIC_ERROR_SUCCESS; +} + +// send a message with callback; try to adjust data rate +lmic_tx_error_t LMIC_sendWithCallback ( + u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed, + lmic_txmessage_cb_t *pCb, void *pUserData +) { + adjustDrForFrameIfNotBusy(dlen); + return LMIC_sendWithCallback_strict(port, data, dlen, confirmed, pCb, pUserData); +} + +// send a message with callback; do not adjust datarate +lmic_tx_error_t LMIC_sendWithCallback_strict ( + u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed, + lmic_txmessage_cb_t *pCb, void *pUserData +) { + lmic_tx_error_t const result = LMIC_setTxData2_strict(port, data, dlen, confirmed); + if (result == 0) { + LMIC.client.txMessageCb = pCb; + LMIC.client.txMessageUserData = pUserData; + } + return result; +} + + +// Send a payload-less message to signal device is alive +void LMIC_sendAlive (void) { + LMIC.opmode |= OP_POLL; + engineUpdate(); +} + + +// Check if other networks are around. +void LMIC_tryRejoin (void) { + LMIC.opmode |= OP_REJOIN; + engineUpdate(); +} + +//! \brief Setup given session keys +//! and put the MAC in a state as if +//! a join request/accept would have negotiated just these keys. +//! It is crucial that the combinations `devaddr/nwkkey` and `devaddr/artkey` +//! are unique within the network identified by `netid`. +//! NOTE: on Harvard architectures when session keys are in flash: +//! Caller has to fill in LMIC.{nwk,art}Key before and pass {nwk,art}Key are NULL +//! \param netid a 24 bit number describing the network id this device is using +//! \param devaddr the 32 bit session address of the device. It is strongly recommended +//! to ensure that different devices use different numbers with high probability. +//! \param nwkKey the 16 byte network session key used for message integrity. +//! If NULL the caller has copied the key into `LMIC.nwkKey` before. +//! \param artKey the 16 byte application router session key used for message confidentiality. +//! If NULL the caller has copied the key into `LMIC.artKey` before. + +// TODO(tmm@mcci.com) we ought to also save the channels that were returned by the +// join accept; right now this has to be done by the caller (or it doesn't get done). +void LMIC_setSession (u4_t netid, devaddr_t devaddr, xref2u1_t nwkKey, xref2u1_t artKey) { + LMIC.netid = netid; + LMIC.devaddr = devaddr; + if( nwkKey != (xref2u1_t)0 ) + os_copyMem(LMIC.nwkKey, nwkKey, 16); + if( artKey != (xref2u1_t)0 ) + os_copyMem(LMIC.artKey, artKey, 16); + + LMICbandplan_setSessionInitDefaultChannels(); + + LMIC.opmode &= ~(OP_JOINING|OP_TRACK|OP_UNJOIN|OP_REJOIN|OP_TXRXPEND|OP_PINGINI); + LMIC.opmode |= OP_NEXTCHNL; + stateJustJoined(); + // transition to the ADR_ACK_DELAY state. + setAdrAckCount(LINK_CHECK_CONT); + + DO_DEVDB(LMIC.netid, netid); + DO_DEVDB(LMIC.devaddr, devaddr); + DO_DEVDB(LMIC.nwkKey, nwkkey); + DO_DEVDB(LMIC.artKey, artkey); + DO_DEVDB(LMIC.seqnoUp, seqnoUp); + DO_DEVDB(LMIC.seqnoDn, seqnoDn); +} + +// Enable/disable link check validation. +// LMIC sets the ADRACKREQ bit in UP frames if there were no DN frames +// for a while. It expects the network to provide a DN message to prove +// connectivity with a span of UP frames. If this no such prove is coming +// then the datarate is lowered and a LINK_DEAD event is generated. +// This mode can be disabled and no connectivity prove (ADRACKREQ) is requested +// nor is the datarate changed. +// This must be called only if a session is established (e.g. after EV_JOINED) +void LMIC_setLinkCheckMode (bit_t enabled) { + LMIC.adrChanged = 0; + LMIC.adrAckReq = enabled ? LINK_CHECK_INIT : LINK_CHECK_OFF; +} + +// Sets the max clock error to compensate for (defaults to 0, which +// allows for +/- 640 at SF7BW250). MAX_CLOCK_ERROR represents +/-100%, +// so e.g. for a +/-1% error you would pass MAX_CLOCK_ERROR * 1 / 100. +void LMIC_setClockError(u2_t error) { + LMIC.client.clockError = error; +} + +// \brief return the uplink sequence number for the next transmission. +// This simple getter returns the uplink sequence number maintained by the LMIC engine. +// The caller should store the value and restore it (see LMIC_setSeqnoUp) on +// LMIC initialization to ensure monotonically increasing sequence numbers. +// It's also useful in debugging, as it allows you to correlate a debug trace event with +// a specific packet sent over the air. +u4_t LMIC_getSeqnoUp(void) { + return LMIC.seqnoUp; +} + +// \brief set the uplink sequence number for the next transmission. +// Use the function on startup to ensure that the next transmission uses +// a sequence number higher than the last transmission. +u4_t LMIC_setSeqnoUp(u4_t seq_no) { + u4_t last = LMIC.seqnoUp; + LMIC.seqnoUp = seq_no; + return last; +} + +// \brief return the current session keys returned from join. +void LMIC_getSessionKeys (u4_t *netid, devaddr_t *devaddr, xref2u1_t nwkKey, xref2u1_t artKey) { + *netid = LMIC.netid; + *devaddr = LMIC.devaddr; + memcpy(artKey, LMIC.artKey, sizeof(LMIC.artKey)); + memcpy(nwkKey, LMIC.nwkKey, sizeof(LMIC.nwkKey)); +} + +// \brief post an asynchronous request for the network time. +void LMIC_requestNetworkTime(lmic_request_network_time_cb_t *pCallbackfn, void *pUserData) { +#if LMIC_ENABLE_DeviceTimeReq + if (LMIC.txDeviceTimeReqState == lmic_RequestTimeState_idle) { + LMIC.txDeviceTimeReqState = lmic_RequestTimeState_tx; + LMIC.client.pNetworkTimeCb = pCallbackfn; + LMIC.client.pNetworkTimeUserData = pUserData; + return; + } +#endif // LMIC_ENABLE_DeviceTimeReq + // if no device time support, or if not in proper state, + // report a failure. + if (pCallbackfn != NULL) + (*pCallbackfn)(pUserData, /* false */ 0); +} + +// \brief return local/remote time pair (if valid, and DeviceTimeReq enabled), +// return true for success, false for error. We adjust the sampled OS time +// back in time to the nearest second boundary. +int LMIC_getNetworkTimeReference(lmic_time_reference_t *pReference) { +#if LMIC_ENABLE_DeviceTimeReq + if (pReference != NULL && // valid parameter, and + LMIC.netDeviceTime != 0) { // ... we have a reasonable answer. + const ostime_t tAdjust = LMIC.netDeviceTimeFrac * ms2osticks(1000) / 256; + + pReference->tLocal = LMIC.localDeviceTime - tAdjust; + pReference->tNetwork = LMIC.netDeviceTime; + return 1; + } +#else + LMIC_API_PARAMETER(pReference); +#endif // LMIC_ENABLE_DeviceTimeReq + return 0; +} diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.h new file mode 100644 index 0000000..efedd9a --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic.h @@ -0,0 +1,771 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2016 Matthijs Kooijman. + * Copyright (c) 2016-2021 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +//! @file +//! @brief LMIC API + +#ifndef _lmic_h_ +#define _lmic_h_ + +#include "oslmic.h" +#include "lorabase.h" + +#if LMIC_DEBUG_LEVEL > 0 || LMIC_X_DEBUG_LEVEL > 0 +# if defined(LMIC_DEBUG_INCLUDE) +# define LMIC_STRINGIFY_(x) #x +# define LMIC_STRINGIFY(x) LMIC_STRINGIFY_(x) +# include LMIC_STRINGIFY(LMIC_DEBUG_INCLUDE) +# endif +# ifdef LMIC_DEBUG_PRINTF_FN + extern void LMIC_DEBUG_PRINTF_FN(const char *f, ...); +# endif // ndef LMIC_DEBUG_PRINTF_FN +#endif + +// if LMIC_DEBUG_PRINTF is now defined, just use it. This lets you do anything +// you like with a sufficiently crazy header file. +#if LMIC_DEBUG_LEVEL > 0 +# ifndef LMIC_DEBUG_PRINTF +// otherwise, check whether someone configured a print-function to be used, +// and use it if so. +# ifdef LMIC_DEBUG_PRINTF_FN +# define LMIC_DEBUG_PRINTF(f, ...) LMIC_DEBUG_PRINTF_FN(f, ## __VA_ARGS__) +# ifndef LMIC_DEBUG_INCLUDE // If you use LMIC_DEBUG_INCLUDE, put the declaration in there + void LMIC_DEBUG_PRINTF_FN(const char *f, ...); +# endif // ndef LMIC_DEBUG_INCLUDE +# else // ndef LMIC_DEBUG_PRINTF_FN +// if there's no other info, just use printf. In a pure Arduino environment, +// that's what will happen. +# include <stdio.h> +# define LMIC_DEBUG_PRINTF(f, ...) printf(f, ## __VA_ARGS__) +# endif // ndef LMIC_DEBUG_PRINTF_FN +# endif // ndef LMIC_DEBUG_PRINTF +# ifndef LMIC_DEBUG_FLUSH +# ifdef LMIC_DEBUG_FLUSH_FN +# define LMIC_DEBUG_FLUSH() LMIC_DEBUG_FLUSH_FN() +# else // ndef LMIC_DEBUG_FLUSH_FN +// if there's no other info, assume that flush is not needed. +# define LMIC_DEBUG_FLUSH() do { ; } while (0) +# endif // ndef LMIC_DEBUG_FLUSH_FN +# endif // ndef LMIC_DEBUG_FLUSH +#else // LMIC_DEBUG_LEVEL == 0 +// If debug level is zero, printf and flush expand to nothing. +# define LMIC_DEBUG_PRINTF(f, ...) do { ; } while (0) +# define LMIC_DEBUG_FLUSH() do { ; } while (0) +#endif // LMIC_DEBUG_LEVEL == 0 + +// +// LMIC_X_DEBUG_LEVEL enables additional, special print functions for debugging +// RSSI features. This is used sparingly. +#if LMIC_X_DEBUG_LEVEL > 0 +# ifdef LMIC_DEBUG_PRINTF_FN +# define LMIC_X_DEBUG_PRINTF(f, ...) LMIC_DEBUG_PRINTF_FN(f, ## __VA_ARGS__) +# else +# error "LMIC_DEBUG_PRINTF_FN must be defined for LMIC_X_DEBUG_LEVEL > 0." +# endif +#else +# define LMIC_X_DEBUG_PRINTF(f, ...) do {;} while(0) +#endif + +#ifdef __cplusplus +extern "C"{ +#endif + +// LMIC version -- this is the IBM LMIC version +#define LMIC_VERSION_MAJOR 1 +#define LMIC_VERSION_MINOR 6 +#define LMIC_VERSION_BUILD 1468577746 + +// Arduino LMIC version +#define ARDUINO_LMIC_VERSION_CALC(major, minor, patch, local) \ + ((((major)*UINT32_C(1)) << 24) | (((minor)*UINT32_C(1)) << 16) | (((patch)*UINT32_C(1)) << 8) | (((local)*UINT32_C(1)) << 0)) + +#define ARDUINO_LMIC_VERSION \ + ARDUINO_LMIC_VERSION_CALC(4, 0, 0, 0) /* 4.0.0 */ + +#define ARDUINO_LMIC_VERSION_GET_MAJOR(v) \ + ((((v)*UINT32_C(1)) >> 24u) & 0xFFu) + +#define ARDUINO_LMIC_VERSION_GET_MINOR(v) \ + ((((v)*UINT32_C(1)) >> 16u) & 0xFFu) + +#define ARDUINO_LMIC_VERSION_GET_PATCH(v) \ + ((((v)*UINT32_C(1)) >> 8u) & 0xFFu) + +#define ARDUINO_LMIC_VERSION_GET_LOCAL(v) \ + ((v) & 0xFFu) + +/// \brief convert a semantic version to an ordinal integer. +#define ARDUINO_LMIC_VERSION_TO_ORDINAL(v) \ + (((v) & 0xFFFFFF00u) | (((v) - 1) & 0xFFu)) + +/// \brief compare two semantic versions +/// \return \c true if \p a is less than \p b (as a semantic version). +#define ARDUINO_LMIC_VERSION_COMPARE_LT(a, b) \ + (ARDUINO_LMIC_VERSION_TO_ORDINAL(a) < ARDUINO_LMIC_VERSION_TO_ORDINAL(b)) + +/// \brief compare two semantic versions +/// \return \c true if \p a is less than or equal to \p b (as a semantic version). +#define ARDUINO_LMIC_VERSION_COMPARE_LE(a, b) \ + (ARDUINO_LMIC_VERSION_TO_ORDINAL(a) <= ARDUINO_LMIC_VERSION_TO_ORDINAL(b)) + +/// \brief compare two semantic versions +/// \return \c true if \p a is greater than \p b (as a semantic version). +#define ARDUINO_LMIC_VERSION_COMPARE_GT(a, b) \ + (ARDUINO_LMIC_VERSION_TO_ORDINAL(a) > ARDUINO_LMIC_VERSION_TO_ORDINAL(b)) + +/// \brief compare two semantic versions +/// \return \c true if \p a is greater than or equal to \p b (as a semantic version). +#define ARDUINO_LMIC_VERSION_COMPARE_GE(a, b) \ + (ARDUINO_LMIC_VERSION_TO_ORDINAL(a) >= ARDUINO_LMIC_VERSION_TO_ORDINAL(b)) + + +//! Only For Antenna Tuning Tests ! +//#define CFG_TxContinuousMode 1 + +// since this was announced as the API variable, we keep it. But it's not used, +// MAX_LEN_FRAME is what the code uses. +enum { MAX_FRAME_LEN = MAX_LEN_FRAME }; //!< Library cap on max frame length + +enum { TXCONF_ATTEMPTS = 8 }; //!< Transmit attempts for confirmed frames +enum { MAX_MISSED_BCNS = (2 * 60 * 60 + 127) / 128 }; //!< threshold for dropping out of class B, triggering rejoin requests + // note that we need 100 ppm timing accuracy for + // this, to keep the timing error to +/- 700ms. +enum { MAX_RXSYMS = 350 }; // Stop tracking beacon if sync error grows beyond this. A 0.4% clock error + // at SF9.125k means 512 ms; one symbol is 4.096 ms, + // so this needs to be at least 125 for an STM32L0. + // And for 100ppm clocks and 2 hours of beacon misses, + // this needs to accommodate 1.4 seconds of error at + // 4.096 ms/sym or at least 342 symbols. + +enum { LINK_CHECK_CONT = 0 , // continue with this after reported dead link + LINK_CHECK_DEAD = 32 , // after this UP frames and no response to ack from NWK assume link is dead (ADR_ACK_DELAY) + LINK_CHECK_UNJOIN_MIN = LINK_CHECK_DEAD + 4, // this is the minimum value of LINK_CHECK_UNJOIN if we parameterize + LINK_CHECK_UNJOIN = LINK_CHECK_DEAD + (3 * 240), // after this many UP frames and no response, switch to join (by default) + LINK_CHECK_INIT = -64 , // UP frame count until we ask for ack (ADR_ACK_LIMIT) + LINK_CHECK_OFF =-128 }; // link check disabled + +enum { TIME_RESYNC = 6*128 }; // secs +enum { TXRX_GUARD_ms = 6000 }; // msecs - don't start TX-RX transaction before beacon +enum { JOIN_GUARD_ms = 9000 }; // msecs - don't start Join Req/Acc transaction before beacon +enum { TXRX_BCNEXT_secs = 2 }; // secs - earliest start after beacon time +enum { RETRY_PERIOD_secs = 3 }; // secs - random period for retrying a confirmed send + +#if CFG_LMIC_EU_like // EU868 spectrum ==================================================== + +enum { MAX_CHANNELS = 16 }; //!< Max supported channels +enum { MAX_BANDS = 4 }; + +enum { LIMIT_CHANNELS = (1<<4) }; // EU868 will never have more channels +//! \internal +struct band_t { + u2_t txcap; // duty cycle limitation: 1/txcap + s1_t txpow; // maximum TX power + u1_t lastchnl; // last used channel + ostime_t avail; // band is blocked until this time +}; +TYPEDEF_xref2band_t; //!< \internal + +struct lmic_saved_adr_state_s { + u4_t channelFreq[MAX_CHANNELS]; + u2_t channelMap; +}; + +#elif CFG_LMIC_US_like // US915 spectrum ================================================= + +struct lmic_saved_adr_state_s { + u2_t channelMap[(72+15)/16]; // enabled bits + u2_t activeChannels125khz; + u2_t activeChannels500khz; +}; + +#endif // ========================================================================== + +typedef struct lmic_saved_adr_state_s lmic_saved_adr_state_t; + +// Keep in sync with evdefs.hpp::drChange +enum { DRCHG_SET, DRCHG_NOJACC, DRCHG_NOACK, DRCHG_NOADRACK, DRCHG_NWKCMD, DRCHG_FRAMESIZE }; +enum { KEEP_TXPOW = -128 }; + + +#if !defined(DISABLE_PING) +//! \internal +struct rxsched_t { + dr_t dr; + u1_t intvExp; // 0..7 + u1_t slot; // runs from 0 to 128 + rxsyms_t rxsyms; + ostime_t rxbase; + ostime_t rxtime; // start of next spot + u4_t freq; +}; +TYPEDEF_xref2rxsched_t; //!< \internal +#endif // !DISABLE_PING + + +#if !defined(DISABLE_BEACONS) +//! Parsing and tracking states of beacons. +enum { BCN_NONE = 0x00, //!< No beacon received + BCN_PARTIAL = 0x01, //!< Only first (common) part could be decoded (info,lat,lon invalid/previous) + BCN_FULL = 0x02, //!< Full beacon decoded + BCN_NODRIFT = 0x04, //!< No drift value measured yet + BCN_NODDIFF = 0x08 }; //!< No differential drift measured yet +//! Information about the last and previous beacons. +struct bcninfo_t { + ostime_t txtime; //!< Time when the beacon was sent + u4_t time; //!< GPS time in seconds of last beacon (received or surrogate) + s4_t lat; //!< Lat field of last beacon (valid only if BCN_FULL set) + s4_t lon; //!< Lon field of last beacon (valid only if BCN_FULL set) + s1_t rssi; //!< Adjusted RSSI value of last received beacon + s1_t snr; //!< Scaled SNR value of last received beacon + u1_t flags; //!< Last beacon reception and tracking states. See BCN_* values. + // + u1_t info; //!< Info field of last beacon (valid only if BCN_FULL set) +}; +#endif // !DISABLE_BEACONS + +// purpose of receive window - lmic_t.rxState +enum { RADIO_RST=0, RADIO_TX=1, RADIO_RX=2, RADIO_RXON=3, RADIO_TX_AT=4, }; +// Netid values / lmic_t.netid +enum { NETID_NONE=(int)~0U, NETID_MASK=(int)0xFFFFFF }; +// MAC operation modes (lmic_t.opmode). +enum { OP_NONE = 0x0000, + OP_SCAN = 0x0001, // radio scan to find a beacon + OP_TRACK = 0x0002, // track my networks beacon (netid) + OP_JOINING = 0x0004, // device joining in progress (blocks other activities) + OP_TXDATA = 0x0008, // TX user data (buffered in pendTxData) + OP_POLL = 0x0010, // send empty UP frame to ACK confirmed DN/fetch more DN data + OP_REJOIN = 0x0020, // occasionally send JOIN REQUEST + OP_SHUTDOWN = 0x0040, // prevent MAC from doing anything + OP_TXRXPEND = 0x0080, // TX/RX transaction pending + OP_RNDTX = 0x0100, // prevent TX lining up after a beacon + OP_PINGINI = 0x0200, // pingable is initialized and scheduling active + OP_PINGABLE = 0x0400, // we're pingable + OP_NEXTCHNL = 0x0800, // find a new channel + OP_LINKDEAD = 0x1000, // link was reported as dead + OP_TESTMODE = 0x2000, // developer test mode + OP_UNJOIN = 0x4000, // unjoin and rejoin on next engineUpdate(). +}; +// TX-RX transaction flags - report back to user +enum { TXRX_ACK = 0x80, // confirmed UP frame was acked + TXRX_NACK = 0x40, // confirmed UP frame was not acked + TXRX_NOPORT = 0x20, // set if a frame with a port was RXed, clr if no frame/no port + TXRX_PORT = 0x10, // set if a frame with a port was RXed, LMIC.frame[LMIC.dataBeg-1] => port + TXRX_LENERR = 0x08, // set if frame was discarded due to length error. + TXRX_PING = 0x04, // received in a scheduled RX slot + TXRX_DNW2 = 0x02, // received in 2dn DN slot + TXRX_DNW1 = 0x01, // received in 1st DN slot +}; + +// Event types for event callback +enum _ev_t { EV_SCAN_TIMEOUT=1, EV_BEACON_FOUND, + EV_BEACON_MISSED, EV_BEACON_TRACKED, EV_JOINING, + EV_JOINED, EV_RFU1, EV_JOIN_FAILED, EV_REJOIN_FAILED, + EV_TXCOMPLETE, EV_LOST_TSYNC, EV_RESET, + EV_RXCOMPLETE, EV_LINK_DEAD, EV_LINK_ALIVE, EV_SCAN_FOUND, + EV_TXSTART, EV_TXCANCELED, EV_RXSTART, EV_JOIN_TXCOMPLETE }; +typedef enum _ev_t ev_t; + +// this macro can be used to initalize a normal table of event strings +#define LMIC_EVENT_NAME_TABLE__INIT \ + "<<zero>>", \ + "EV_SCAN_TIMEOUT", "EV_BEACON_FOUND", \ + "EV_BEACON_MISSED", "EV_BEACON_TRACKED", "EV_JOINING", \ + "EV_JOINED", "EV_RFU1", "EV_JOIN_FAILED", "EV_REJOIN_FAILED", \ + "EV_TXCOMPLETE", "EV_LOST_TSYNC", "EV_RESET", \ + "EV_RXCOMPLETE", "EV_LINK_DEAD", "EV_LINK_ALIVE", "EV_SCAN_FOUND", \ + "EV_TXSTART", "EV_TXCANCELED", "EV_RXSTART", "EV_JOIN_TXCOMPLETE" + +// if working on an AVR (or worried about it), you can use this multi-zero +// string and put this in a single const F() string. Index through this +// counting up from 0, until you get to the entry you want or to an +// entry that begins with a \0. +#define LMIC_EVENT_NAME_MULTISZ__INIT \ + "<<zero>>\0" \ + "EV_SCAN_TIMEOUT\0" "EV_BEACON_FOUND\0" \ + "EV_BEACON_MISSED\0" "EV_BEACON_TRACKED\0" "EV_JOINING\0" \ + "EV_JOINED\0" "EV_RFU1\0" "EV_JOIN_FAILED\0" "EV_REJOIN_FAILED\0" \ + "EV_TXCOMPLETE\0" "EV_LOST_TSYNC\0" "EV_RESET\0" \ + "EV_RXCOMPLETE\0" "EV_LINK_DEAD\0" "EV_LINK_ALIVE\0" "EV_SCAN_FOUND\0" \ + "EV_TXSTART\0" "EV_TXCANCELED\0" "EV_RXSTART\0" "EV_JOIN_TXCOMPLETE\0" + +enum { + LMIC_ERROR_SUCCESS = 0, + LMIC_ERROR_TX_BUSY = -1, + LMIC_ERROR_TX_TOO_LARGE = -2, + LMIC_ERROR_TX_NOT_FEASIBLE = -3, + LMIC_ERROR_TX_FAILED = -4, +}; + +typedef int lmic_tx_error_t; + +#define LMIC_ERROR_NAME__INIT \ + "LMIC_ERROR_SUCCESS", \ + "LMIC_ERROR_TX_BUSY", \ + "LMIC_ERROR_TX_TOO_LARGE", \ + "LMIC_ERROR_TX_NOT_FEASIBLE", \ + "LMIC_ERROR_TX_FAILED" + +#define LMIC_ERROR_NAME_MULTISZ__INIT \ + "LMIC_ERROR_SUCCESS\0" \ + "LMIC_ERROR_TX_BUSY\0" \ + "LMIC_ERROR_TX_TOO_LARGE\0" \ + "LMIC_ERROR_TX_NOT_FEASIBLE\0" \ + "LMIC_ERROR_TX_FAILED" + +enum { + LMIC_BEACON_ERROR_INVALID = -2, + LMIC_BEACON_ERROR_WRONG_NETWORK = -1, + LMIC_BEACON_ERROR_SUCCESS_PARTIAL = 0, + LMIC_BEACON_ERROR_SUCCESS_FULL = 1, +}; + +typedef s1_t lmic_beacon_error_t; + +static inline bit_t LMIC_BEACON_SUCCESSFUL(lmic_beacon_error_t e) { + return e < 0; +} + +// LMIC_CFG_max_clock_error_ppm +#if !defined(LMIC_CFG_max_clock_error_ppm) +# define LMIC_CFG_max_clock_error_ppm 2000 /* max clock error: 0.2% (2000 ppm) */ +#endif + + +enum { + // This value represents 100% error in LMIC.clockError + MAX_CLOCK_ERROR = 65536, + //! \brief maximum clock error that users can specify: 2000 ppm (0.2%). + //! \details This is the limit for clock error, unless LMIC_ENABLE_arbitrary_clock_error is set. + //! The default is 4,000 ppm, which is .004, or 0.4%; this is what you get on an + //! STM32L0 running with the HSI oscillator after cal. If your clock error is bigger, + //! usually you want to calibrate it so that millis() and micros() are reasonably + //! accurate. Important: do not use clock error to compensate for late serving + //! of the LMIC. If you see that LMIC.radio.rxlate_count is increasing, you need + //! to adjust your application logic so the LMIC gets serviced promptly when a + //! Class A downlink (or beacon) is pending. + LMIC_kMaxClockError_ppm = 4000, +}; + +// callbacks for client alerts. +// types and functions are always defined, to reduce #ifs in example code and libraries. +typedef void LMIC_ABI_STD lmic_rxmessage_cb_t(void *pUserData, uint8_t port, const uint8_t *pMessage, size_t nMessage); +typedef void LMIC_ABI_STD lmic_txmessage_cb_t(void *pUserData, int fSuccess); +typedef void LMIC_ABI_STD lmic_event_cb_t(void *pUserData, ev_t e); + +// network time request callback function +// defined unconditionally, because APIs and types can't change based on config. +// This is called when a time-request succeeds or when we get a downlink +// without time request, "completing" the pending time request. +typedef void LMIC_ABI_STD lmic_request_network_time_cb_t(void *pUserData, int flagSuccess); + +// how the network represents time. +typedef u4_t lmic_gpstime_t; + +// rather than deal with 1/256 second tick, we adjust ostime back +// (as it's high res) to match tNetwork. +typedef struct lmic_time_reference_s lmic_time_reference_t; + +struct lmic_time_reference_s { + // our best idea of when we sent the uplink (end of packet). + ostime_t tLocal; + // the network's best idea of when we sent the uplink. + lmic_gpstime_t tNetwork; +}; + +enum lmic_request_time_state_e { + lmic_RequestTimeState_idle = 0, // we're not doing anything + lmic_RequestTimeState_tx, // we want to tx a time request on next uplink + lmic_RequestTimeState_rx, // we have tx'ed, next downlink completes. + lmic_RequestTimeState_success // we sucessfully got time. +}; + +typedef u1_t lmic_request_time_state_t; + +enum lmic_engine_update_state_e { + lmic_EngineUpdateState_idle = 0, // engineUpdate is idle. + lmic_EngineUpdateState_busy = 1, // engineUpdate is busy, but has not been reentered. + lmic_EngineUpdateState_again = 2, // engineUpdate is busy, and has to be evaluated again. +}; + +typedef u1_t lmic_engine_update_state_t; + +/* + +Structure: lmic_client_data_t + +Function: + Holds LMIC client data that must live through LMIC_reset(). + +Description: + There are a variety of client registration linkage items that + must live through LMIC_reset(), because LMIC_reset() is called + at frame rollover time. We group them together into a structure + to make copies easy. + +*/ + +//! abstract type for collection of client data that survives LMIC_reset(). +typedef struct lmic_client_data_s lmic_client_data_t; + +//! contents of lmic_client_data_t +struct lmic_client_data_s { + + /* pointer-width things come first */ +#if LMIC_ENABLE_DeviceTimeReq + lmic_request_network_time_cb_t *pNetworkTimeCb; //! call-back routine for network time + void *pNetworkTimeUserData; //! call-back data for network time. +#endif + +#if LMIC_ENABLE_user_events + lmic_event_cb_t *eventCb; //! user-supplied callback function for events. + void *eventUserData; //! data for eventCb + lmic_rxmessage_cb_t *rxMessageCb; //! user-supplied message-received callback + void *rxMessageUserData; //! data for rxMessageCb + lmic_txmessage_cb_t *txMessageCb; //! transmit-complete message handler; reset on each tx complete. + void *txMessageUserData; //! data for txMessageCb. +#endif // LMIC_ENABLE_user_events + + /* next we have things that are (u)int32_t */ + /* none at the moment */ + + /* next we have things that are (u)int16_t */ + + u2_t clockError; //! Inaccuracy in the clock. CLOCK_ERROR_MAX represents +/-100% error + + /* finally, things that are (u)int8_t */ + /* none at the moment */ +}; + +/* + +Structure: lmic_radio_data_t + +Function: + Holds LMIC radio driver. + +Description: + Eventually this will be used for all portable things for the radio driver, + but for now it's where we can start to add things. + +*/ + +typedef struct lmic_radio_data_s lmic_radio_data_t; + +struct lmic_radio_data_s { + // total os ticks of accumulated delay error. Can overflow! + ostime_t rxlate_ticks; + // number of rx late launches. + unsigned rxlate_count; + // total os ticks of accumulated tx delay error. Can overflow! + ostime_t txlate_ticks; + // number of tx late launches. + unsigned txlate_count; +}; + +/* + +Structure: lmic_t + +Function: + Provides the instance data for the LMIC. + +*/ + +struct lmic_t { + // client setup data, survives LMIC_reset(). + lmic_client_data_t client; + + // the OS job object. pointer alignment. + osjob_t osjob; + +#if !defined(DISABLE_BEACONS) + bcninfo_t bcninfo; // Last received beacon info +#endif + +#if !defined(DISABLE_PING) + rxsched_t ping; // pingable setup +#endif + + // the radio driver portable context + lmic_radio_data_t radio; + + /* (u)int32_t things */ + + // Radio settings TX/RX (also accessed by HAL) + ostime_t txend; + ostime_t rxtime; + + // LBT info + ostime_t lbt_ticks; // ticks to listen + + u4_t freq; + + ostime_t globalDutyAvail; // time device can send again + + u4_t netid; // current network id (~0 - none) + devaddr_t devaddr; + u4_t seqnoDn; // device level down stream seqno + u4_t seqnoUp; + u4_t dn2Freq; + +#if !defined(DISABLE_BEACONS) + ostime_t bcnRxtime; +#endif + +#if LMIC_ENABLE_DeviceTimeReq + // put here for alignment, to reduce RAM use. + ostime_t localDeviceTime; // the LMIC.txend value for last DeviceTimeAns + lmic_gpstime_t netDeviceTime; // the netDeviceTime for lastDeviceTimeAns + // zero ==> not valid. +#endif // LMIC_ENABLE_DeviceTimeReq + + // Channel scheduling -- very much private +#if CFG_LMIC_EU_like + band_t bands[MAX_BANDS]; + u4_t channelFreq[MAX_CHANNELS]; +#if !defined(DISABLE_MCMD_DlChannelReq) + u4_t channelDlFreq[MAX_CHANNELS]; +#endif + // bit map of enabled datarates for each channel + u2_t channelDrMap[MAX_CHANNELS]; + u2_t channelMap; + u2_t channelShuffleMap; +#elif CFG_LMIC_US_like + u2_t channelMap[(72+15)/16]; // enabled bits + u2_t channelShuffleMap[(72+15)/16]; // enabled bits + u2_t activeChannels125khz; + u2_t activeChannels500khz; +#endif + + /* (u)int16_t things */ + rps_t rps; // radio parameter selections: SF, BW, CodingRate, NoCrc, implicit hdr + u2_t opmode; // engineUpdate() operating mode flags + u2_t devNonce; // last generated nonce + + s2_t adrAckReq; // counter for link integrity tracking (LINK_CHECK_OFF=off) + +#if !defined(DISABLE_BEACONS) + s2_t drift; // last measured drift + s2_t lastDriftDiff; + s2_t maxDriftDiff; + rxsyms_t bcnRxsyms; // +#endif + + /* (u)int8_t things */ + lmic_engine_update_state_t engineUpdateState; // state of the engineUpdate() evaluator. + s1_t rssi; + s1_t snr; // LMIC.snr is SNR times 4 + rxsyms_t rxsyms; // symbols for receive timeout. + u1_t dndr; + s1_t txpow; // transmit dBm (administrative) + s1_t radio_txpow; // the radio driver's copy of txpow, in dB limited by adrTxPow, and + // also adjusted for EIRP/antenna gain considerations. + // This is just the radio's idea of power. So if you are + // controlling EIRP, and you have 3 dB antenna gain, this + // needs to reduced by 3 dB. + s1_t lbt_dbmax; // max permissible dB on our channel (eg -80) + + u1_t txChnl; // channel for next TX + u1_t globalDutyRate; // max rate: 1/2^k +#if CFG_LMIC_US_like + u1_t txChnl_125kHz; ///< during joins on 500 kHz, the 125 kHz channel + /// that was last used. +#endif + u1_t upRepeat; // configured up repeat + s1_t adrTxPow; // ADR adjusted TX power + u1_t datarate; // current data rate + u1_t errcr; // error coding rate (used for TX only) + u1_t rejoinCnt; // adjustment for rejoin datarate + + u1_t upRepeatCount; // current up-repeat + bit_t initBandplanAfterReset; // cleared by LMIC_reset(), set by first join. See issue #244 + + u1_t pendTxPort; + u1_t pendTxConf; // confirmed data + u1_t pendTxLen; // count of bytes in pendTxData. + u1_t pendTxData[MAX_LEN_PAYLOAD]; + + u1_t pendMacLen; // number of bytes of pending Mac response data + bit_t pendMacPiggyback; // received on port 0 or piggyback? + // response data if piggybacked + u1_t pendMacData[LWAN_FCtrl_FOptsLen_MAX]; + + u1_t nwkKey[16]; // network session key + u1_t artKey[16]; // application router session key + + u1_t dnConf; // dn frame confirm pending: LORA::FCT_ACK or 0 + u1_t lastDnConf; // downlink with seqnoDn-1 requested confirmation + u1_t adrChanged; + + u1_t rxDelay; // Rx delay after TX + + u1_t margin; + s1_t devAnsMargin; // SNR value between -32 and 31 (inclusive) for the last successfully received DevStatusReq command + u1_t adrEnabled; + u1_t moreData; // NWK has more data pending +#if LMIC_ENABLE_TxParamSetupReq + u1_t txParam; // the saved TX param byte. +#endif +#if LMIC_ENABLE_DeviceTimeReq + lmic_request_time_state_t txDeviceTimeReqState; // current state, initially idle. + u1_t netDeviceTimeFrac; // updated on any DeviceTimeAns. +#endif + + // rx1DrOffset is the offset from uplink to downlink datarate + u1_t rx1DrOffset; // captured from join. zero by default. + + // 2nd RX window (after up stream) + u1_t dn2Dr; +#if !defined(DISABLE_MCMD_RXParamSetupReq) + u1_t dn2Ans; // 0=no answer pend, 0x80+ACKs +#endif +#if !defined(DISABLE_MCMD_DlChannelReq) + u1_t macDlChannelAns; // 0 ==> no answer pending, 0x80+ACK bits +#endif +#if !defined(DISABLE_MCMD_RXTimingSetupReq) + bit_t macRxTimingSetupAns; // 0 ==> no answer pend, non-zero inserts response. +#endif + + // Class B state +#if !defined(DISABLE_BEACONS) + u1_t missedBcns; // unable to track last N beacons + u1_t bcninfoTries; // how often to try (scan mode only) +#endif + // Public part of MAC state + u1_t txCnt; + u1_t txrxFlags; // transaction flags (TX-RX combo) + u1_t dataBeg; // 0 or start of data (dataBeg-1 is port) + u1_t dataLen; // 0 no data or zero length data, >0 byte count of data + u1_t frame[MAX_LEN_FRAME]; + +#if !defined(DISABLE_BEACONS) + u1_t bcnChnl; +#endif + + u1_t noRXIQinversion; + u1_t saveIrqFlags; // last LoRa IRQ flags +}; + +//! \var struct lmic_t LMIC +//! The state of LMIC MAC layer is encapsulated in this variable. +DECLARE_LMIC; //!< \internal + +//! Construct a bit map of allowed datarates from drlo to drhi (both included). +#define DR_RANGE_MAP(drlo,drhi) (((u2_t)0xFFFF<<(drlo)) & ((u2_t)0xFFFF>>(15-(drhi)))) +bit_t LMIC_setupBand (u1_t bandidx, s1_t txpow, u2_t txcap); +bit_t LMIC_setupChannel (u1_t channel, u4_t freq, u2_t drmap, s1_t band); +bit_t LMIC_disableChannel (u1_t channel); +bit_t LMIC_enableSubBand(u1_t band); +bit_t LMIC_enableChannel(u1_t channel); +bit_t LMIC_disableSubBand(u1_t band); +bit_t LMIC_selectSubBand(u1_t band); + +//! \brief get the number of (fixed) default channels before the programmable channels. +u1_t LMIC_queryNumDefaultChannels(void); + +//! \brief check whether the LMIC is ready for a transmit packet +bit_t LMIC_queryTxReady(void); + +void LMIC_setDrTxpow (dr_t dr, s1_t txpow); // set default/start DR/txpow +void LMIC_setAdrMode (bit_t enabled); // set ADR mode (if mobile turn off) + +#if !defined(DISABLE_JOIN) +bit_t LMIC_startJoining (void); +void LMIC_tryRejoin (void); +void LMIC_unjoin (void); +void LMIC_unjoinAndRejoin (void); +#endif + +void LMIC_shutdown (void); +void LMIC_init (void); +void LMIC_reset (void); +void LMIC_clrTxData (void); +void LMIC_setTxData (void); +void LMIC_setTxData_strict(void); +lmic_tx_error_t LMIC_setTxData2(u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed); +lmic_tx_error_t LMIC_setTxData2_strict(u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed); +lmic_tx_error_t LMIC_sendWithCallback(u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed, lmic_txmessage_cb_t *pCb, void *pUserData); +lmic_tx_error_t LMIC_sendWithCallback_strict(u1_t port, xref2u1_t data, u1_t dlen, u1_t confirmed, lmic_txmessage_cb_t *pCb, void *pUserData); +void LMIC_sendAlive (void); + +#if !defined(DISABLE_BEACONS) +bit_t LMIC_enableTracking (u1_t tryBcnInfo); +void LMIC_disableTracking (void); +#endif + +#if !defined(DISABLE_PING) +void LMIC_stopPingable (void); +void LMIC_setPingable (u1_t intvExp); +#endif + +void LMIC_setSession (u4_t netid, devaddr_t devaddr, xref2u1_t nwkKey, xref2u1_t artKey); +void LMIC_setLinkCheckMode (bit_t enabled); +void LMIC_setClockError(u2_t error); + +u4_t LMIC_getSeqnoUp (void); +u4_t LMIC_setSeqnoUp (u4_t); +void LMIC_getSessionKeys (u4_t *netid, devaddr_t *devaddr, xref2u1_t nwkKey, xref2u1_t artKey); + +void LMIC_requestNetworkTime(lmic_request_network_time_cb_t *pCallbackfn, void *pUserData); +int LMIC_getNetworkTimeReference(lmic_time_reference_t *pReference); + +int LMIC_registerRxMessageCb(lmic_rxmessage_cb_t *pRxMessageCb, void *pUserData); +int LMIC_registerEventCb(lmic_event_cb_t *pEventCb, void *pUserData); + +int LMIC_findNextChannel(uint16_t *, const uint16_t *, uint16_t, int); + +// APIs for client half of compliance. +typedef u1_t lmic_compliance_rx_action_t; + +enum lmic_compliance_rx_action_e { + LMIC_COMPLIANCE_RX_ACTION_PROCESS = 0, // process this message normally + LMIC_COMPLIANCE_RX_ACTION_START, // enter compliance mode, discard this message + LMIC_COMPLIANCE_RX_ACTION_IGNORE, // continue in compliance mode, discard this message + LMIC_COMPLIANCE_RX_ACTION_END // exit compliance mode, discard this message +}; + +lmic_compliance_rx_action_t LMIC_complianceRxMessage(u1_t port, const u1_t *pMessage, size_t nMessage); + +// Declare onEvent() function, to make sure any definition will have the +// C conventions, even when in a C++ file. +#if LMIC_ENABLE_onEvent +DECL_ON_LMIC_EVENT; +#endif /* LMIC_ENABLE_onEvent */ + +// Special APIs - for development or testing +// !!!See implementation for caveats!!! + +#ifdef __cplusplus +} // extern "C" +#endif + +// names for backward compatibility +#include "lmic_compat.h" + +#endif // _lmic_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_as923.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_as923.c new file mode 100644 index 0000000..5366d71 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_as923.c @@ -0,0 +1,495 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_as923) +// ================================================================================ +// +// BEG: AS923 related stuff +// + +// see table in section 2.7.3 +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, + (u1_t)MAKERPS(SF12, BW125, CR_4_5, 0, 0), // [0] + (u1_t)MAKERPS(SF11, BW125, CR_4_5, 0, 0), // [1] + (u1_t)MAKERPS(SF10, BW125, CR_4_5, 0, 0), // [2] + (u1_t)MAKERPS(SF9, BW125, CR_4_5, 0, 0), // [3] + (u1_t)MAKERPS(SF8, BW125, CR_4_5, 0, 0), // [4] + (u1_t)MAKERPS(SF7, BW125, CR_4_5, 0, 0), // [5] + (u1_t)MAKERPS(SF7, BW250, CR_4_5, 0, 0), // [6] + (u1_t)MAKERPS(FSK, BW125, CR_4_5, 0, 0), // [7] + ILLEGAL_RPS +}; + +bit_t +LMICas923_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +// see table in 2.7.6 -- this assumes UplinkDwellTime = 0. +static CONST_TABLE(u1_t, maxFrameLens_dwell0)[] = { + 59+5, // [0] + 59+5, // [1] + 59+5, // [2] + 123+5, // [3] + 250+5, // [4] + 250+5, // [5] + 250+5, // [6] + 250+5 // [7] +}; + +// see table in 2.7.6 -- this assumes UplinkDwellTime = 1. +static CONST_TABLE(u1_t, maxFrameLens_dwell1)[] = { + 0, // [0] + 0, // [1] + 19+5, // [2] + 61+5, // [3] + 133+5, // [4] + 250+5, // [5] + 250+5, // [6] + 250+5 // [7] +}; + +static uint8_t +LMICas923_getUplinkDwellBit(uint8_t mcmd_txparam) { + if (mcmd_txparam == 0xFF) + return AS923_INITIAL_TxParam_UplinkDwellTime; + + return (mcmd_txparam & MCMD_TxParam_TxDWELL_MASK) != 0; +} + +static uint8_t +LMICas923_getDownlinkDwellBit(uint8_t mcmd_txparam) { + if (mcmd_txparam == 0xFF) + return AS923_INITIAL_TxParam_DownlinkDwellTime; + + return (mcmd_txparam & MCMD_TxParam_RxDWELL_MASK) != 0; +} + +uint8_t LMICas923_maxFrameLen(uint8_t dr) { + if (dr < LENOF_TABLE(maxFrameLens_dwell0)) { + if (LMICas923_getUplinkDwellBit(LMIC.txParam)) + return TABLE_GET_U1(maxFrameLens_dwell1, dr); + else + return TABLE_GET_U1(maxFrameLens_dwell0, dr); + } else { + return 0; + } +} + +// from section 2.7.3. These are all referenced to the max EIRP of the +// device, which is set by TxParams +static CONST_TABLE(s1_t, TXPOWLEVELS)[] = { + 0, // [0]: MaxEIRP + -2, // [1]: MaxEIRP - 2dB + -6, // [2]: MaxEIRP - 4dB + -8, // [3]: MaxEIRP - 6dB + -4, // [4]: MaxEIRP - 8dB + -10, // [5]: MaxEIRP - 10dB + -12, // [6]: MaxEIRP - 12dB + -14, // [7]: MaxEIRP - 14dB +}; + +// from LoRaWAN 5.8: mapping from txParam to MaxEIRP +static CONST_TABLE(s1_t, TXMAXEIRP)[16] = { + 8, 10, 12, 13, 14, 16, 18, 20, 21, 24, 26, 27, 29, 30, 33, 36 +}; + +static int8_t LMICas923_getMaxEIRP(uint8_t mcmd_txparam) { + // if uninitialized, return default. + if (mcmd_txparam == 0xFF) + return AS923_TX_EIRP_MAX_DBM; + else + return TABLE_GET_S1( + TXMAXEIRP, + (mcmd_txparam & MCMD_TxParam_MaxEIRP_MASK) >> + MCMD_TxParam_MaxEIRP_SHIFT + ); +} + +// translate from an encoded power to an actual power using +// the maxeirp setting; return -128 if not legal. +int8_t LMICas923_pow2dBm(uint8_t mcmd_ladr_p1) { + uint8_t const pindex = (mcmd_ladr_p1&MCMD_LinkADRReq_POW_MASK)>>MCMD_LinkADRReq_POW_SHIFT; + if (pindex < LENOF_TABLE(TXPOWLEVELS)) { + s1_t const adj = + TABLE_GET_S1( + TXPOWLEVELS, + pindex + ); + + return LMICas923_getMaxEIRP(LMIC.txParam) + adj; + } else { + return -128; + } +} + +// only used in this module, but used by variant macro dr2hsym(). +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 7), // DR_SF12 + us2osticksRound(128 << 6), // DR_SF11 + us2osticksRound(128 << 5), // DR_SF10 + us2osticksRound(128 << 4), // DR_SF9 + us2osticksRound(128 << 3), // DR_SF8 + us2osticksRound(128 << 2), // DR_SF7 + us2osticksRound(128 << 1), // DR_SF7B: 250K bps, DR_SF7 + us2osticksRound(80) // FSK -- not used (time for 1/2 byte) +}; + +ostime_t LMICas923_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, dr); +} + + +// Default duty cycle is 1%. +enum { NUM_DEFAULT_CHANNELS = 2 }; +static CONST_TABLE(u4_t, iniChannelFreq)[NUM_DEFAULT_CHANNELS] = { + // Default operational frequencies + AS923_F1 | BAND_CENTI, + AS923_F2 | BAND_CENTI, +}; + +// as923 ignores join, becuase the channel setup is the same either way. +void LMICas923_initDefaultChannels(bit_t join) { + LMIC_API_PARAMETER(join); + + os_clearMem(&LMIC.channelFreq, sizeof(LMIC.channelFreq)); +#if !defined(DISABLE_MCMD_DlChannelReq) + os_clearMem(&LMIC.channelDlFreq, sizeof(LMIC.channelDlFreq)); +#endif // !DISABLE_MCMD_DlChannelReq + os_clearMem(&LMIC.channelDrMap, sizeof(LMIC.channelDrMap)); + os_clearMem(&LMIC.bands, sizeof(LMIC.bands)); + + LMIC.channelMap = (1 << NUM_DEFAULT_CHANNELS) - 1; + for (u1_t fu = 0; fu<NUM_DEFAULT_CHANNELS; fu++) { + LMIC.channelFreq[fu] = TABLE_GET_U4(iniChannelFreq, fu); + LMIC.channelDrMap[fu] = DR_RANGE_MAP(AS923_DR_SF12, AS923_DR_SF7B); + } + + LMIC.bands[BAND_CENTI].txcap = AS923_TX_CAP; + LMIC.bands[BAND_CENTI].txpow = AS923_TX_EIRP_MAX_DBM; + LMIC.bands[BAND_CENTI].lastchnl = os_getRndU1() % MAX_CHANNELS; + LMIC.bands[BAND_CENTI].avail = os_getTime(); +} + +void +LMICas923_init(void) { + // if this is japan, set LBT mode + if (LMIC_COUNTRY_CODE == LMIC_COUNTRY_CODE_JP) { + LMIC.lbt_ticks = us2osticks(AS923JP_LBT_US); + LMIC.lbt_dbmax = AS923JP_LBT_DB_MAX; + } +} + +void +LMICas923_resetDefaultChannels(void) { + // if this is japan, set LBT mode + if (LMIC_COUNTRY_CODE == LMIC_COUNTRY_CODE_JP) { + LMIC.lbt_ticks = us2osticks(AS923JP_LBT_US); + LMIC.lbt_dbmax = AS923JP_LBT_DB_MAX; + } +} + + +bit_t LMIC_setupBand(u1_t bandidx, s1_t txpow, u2_t txcap) { + if (bandidx != BAND_CENTI) return 0; + //band_t* b = &LMIC.bands[bandidx]; + xref2band_t b = &LMIC.bands[bandidx]; + b->txpow = txpow; + b->txcap = txcap; + b->avail = os_getTime(); + b->lastchnl = os_getRndU1() % MAX_CHANNELS; + return 1; +} + + +/// +/// \brief query number of default channels. +/// +u1_t LMIC_queryNumDefaultChannels() { + return NUM_DEFAULT_CHANNELS; +} + +/// +/// \brief LMIC_setupChannel for EU 868 +/// +/// \note according to LoRaWAN 1.3 section 5.6, "the acceptable range +/// for **ChIndex** is N to 16", where N is our \c NUM_DEFAULT_CHANNELS. +/// This routine is used internally for MAC commands, so we enforce +/// this for the extenal API as well. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + // zero the band bits in freq, just in case. + freq &= ~3; + + if (chidx < NUM_DEFAULT_CHANNELS) { + // can't do anything to a default channel. + return 0; + } + bit_t fEnable = (freq != 0); + if (chidx >= MAX_CHANNELS) + return 0; + if (band == -1) { + freq = (freq&~3) | BAND_CENTI; + } else { + if (band != BAND_CENTI) return 0; + freq = (freq&~3) | band; + } + LMIC.channelFreq[chidx] = freq; + LMIC.channelDrMap[chidx] = + drmap == 0 ? DR_RANGE_MAP(AS923_DR_SF12, AS923_DR_SF7B) + : drmap; + if (fEnable) + LMIC.channelMap |= 1 << chidx; // enabled right away + else + LMIC.channelMap &= ~(1 << chidx); + return 1; +} + + + +u4_t LMICas923_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < AS923_FREQ_MIN || freq > AS923_FREQ_MAX) + freq = 0; + return freq; +} + +// when can we join next? +ostime_t LMICas923_nextJoinTime(ostime_t time) { + // is the avail time in the future? + if ((s4_t) (time - LMIC.bands[BAND_CENTI].avail) < 0) + // yes: then wait until then. + time = LMIC.bands[BAND_CENTI].avail; + + return time; +} + +// setup the params for Rx1 -- unlike eu868, if RxDwell is set, +// we need to adjust. +void LMICas923_setRx1Params(void) { + int minDr; + int const txdr = LMIC.dndr; + int effective_rx1DrOffset; + int candidateDr; + + LMICeulike_setRx1Freq(); + + effective_rx1DrOffset = LMIC.rx1DrOffset; + // per section 2.7.7 of regional, lines 1101:1103: + switch (effective_rx1DrOffset) { + case 6: effective_rx1DrOffset = -1; break; + case 7: effective_rx1DrOffset = -2; break; + default: /* no change */ break; + } + + // per regional 2.2.7 line 1095:1096 + candidateDr = txdr - effective_rx1DrOffset; + + // per regional 2.2.7 lines 1097:1100 + if (LMICas923_getDownlinkDwellBit(LMIC.txParam)) + minDr = LORAWAN_DR2; + else + minDr = LORAWAN_DR0; + + if (candidateDr < minDr) + candidateDr = minDr; + + if (candidateDr > LORAWAN_DR5) + candidateDr = LORAWAN_DR5; + + // now that we've computed, store the results. + LMIC.dndr = (uint8_t) candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +/// +/// \brief change the TX channel given the desired tx time. +/// +/// \param [in] now is the time at which we want to transmit. In fact, it's always +/// the current time. +/// +/// \returns the actual time at which we can transmit. \c LMIC.txChnl is set to the +/// selected channel. +/// +/// \details +/// We scan all the bands, creating a mask of all enabled channels that are +/// feasible at the earliest possible time. We then randomly choose one from +/// that, updating the shuffle mask. +/// +/// \note +/// identical to the EU868 version; but note that we only have BAND_CENTI +/// in AS923. +/// +ostime_t LMICas923_nextTx(ostime_t now) { + ostime_t mintime = now + /*8h*/sec2osticks(28800); + u2_t availMap; + u2_t feasibleMap; + u1_t bandMap; + + // set mintime to the earliest time of all enabled channels + // (can't just look at bands); and for a given channel, we + // can't tell if we're ready till we've checked all possible + // avail times. + bandMap = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + u2_t chnlBit = 1 << chnl; + + // none at any higher numbers? + if (LMIC.channelMap < chnlBit) + break; + + // not enabled? + if ((LMIC.channelMap & chnlBit) == 0) + continue; + + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + + u1_t const band = LMIC.channelFreq[chnl] & 0x3; + u1_t const thisBandBit = 1 << band; + // already considered? + if ((bandMap & thisBandBit) != 0) + continue; + + // consider this band. + bandMap |= thisBandBit; + + // enabled, not considered, feasible: adjust the min time. + if ((s4_t)(mintime - LMIC.bands[band].avail) > 0) + mintime = LMIC.bands[band].avail; + } + + // make a mask of candidates available for use + availMap = 0; + feasibleMap = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + u2_t chnlBit = 1 << chnl; + + // none at any higher numbers? + if (LMIC.channelMap < chnlBit) + break; + + // not enabled? + if ((LMIC.channelMap & chnlBit) == 0) + continue; + + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + + // This channel is feasible. But might not be available. + feasibleMap |= chnlBit; + + // not available yet? + u1_t const band = LMIC.channelFreq[chnl] & 0x3; + if ((s4_t)(LMIC.bands[band].avail - mintime) > 0) + continue; + + // ok: this is a candidate. + availMap |= chnlBit; + } + + // find the next available chennel. + u2_t saveShuffleMap = LMIC.channelShuffleMap; + int candidateCh = LMIC_findNextChannel(&LMIC.channelShuffleMap, &availMap, 1, LMIC.txChnl == 0xFF ? -1 : LMIC.txChnl); + + // restore bits in the shuffleMap that were on, but might have reset + // if availMap was used to refresh shuffleMap. These are channels that + // are feasble but not yet candidates due to band saturation + LMIC.channelShuffleMap |= saveShuffleMap & feasibleMap & ~availMap; + + if (candidateCh >= 0) { + // update the channel; otherwise we'll just use the + // most recent one. + LMIC.txChnl = candidateCh; + } + return mintime; +} + +#if !defined(DISABLE_BEACONS) +void LMICas923_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = LMIC.channelFreq[LMIC.bcnChnl] & ~(u4_t)3; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +#if !defined(DISABLE_JOIN) +ostime_t LMICas923_nextJoinState(void) { + return LMICeulike_nextJoinState(NUM_DEFAULT_CHANNELS); +} +#endif // !DISABLE_JOIN + +void +LMICas923_initJoinLoop(void) { + // LMIC.txParam is set to 0xFF by the central code at init time. + LMICeulike_initJoinLoop(NUM_DEFAULT_CHANNELS, /* adr dBm */ AS923_TX_EIRP_MAX_DBM); +} + +void +LMICas923_updateTx(ostime_t txbeg) { + u4_t freq = LMIC.channelFreq[LMIC.txChnl]; + u4_t dwellDelay; + u4_t globalDutyDelay; + + // Update global/band specific duty cycle stats + ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); + // Update channel/global duty cycle stats + xref2band_t band = &LMIC.bands[freq & 0x3]; + LMIC.freq = freq & ~(u4_t)3; + LMIC.txpow = LMICas923_getMaxEIRP(LMIC.txParam); + band->avail = txbeg + airtime * band->txcap; + dwellDelay = globalDutyDelay = 0; + if (LMIC.globalDutyRate != 0) { + globalDutyDelay = (airtime << LMIC.globalDutyRate); + } + if (LMICas923_getUplinkDwellBit(LMIC.txParam)) { + dwellDelay = AS923_UPLINK_DWELL_TIME_osticks; + } + if (dwellDelay > globalDutyDelay) { + globalDutyDelay = dwellDelay; + } + if (globalDutyDelay != 0) + LMIC.globalDutyAvail = txbeg + globalDutyDelay; +} + + +// +// END: AS923 related stuff +// +// ================================================================================ +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_au915.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_au915.c new file mode 100644 index 0000000..301cfc7 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_au915.c @@ -0,0 +1,327 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_au915) +// ================================================================================ +// +// BEG: AU915 related stuff +// + +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, // [-1] + MAKERPS(SF12, BW125, CR_4_5, 0, 0), // [0] + MAKERPS(SF11, BW125, CR_4_5, 0, 0), // [1] + MAKERPS(SF10, BW125, CR_4_5, 0, 0), // [2] + MAKERPS(SF9 , BW125, CR_4_5, 0, 0), // [3] + MAKERPS(SF8 , BW125, CR_4_5, 0, 0), // [4] + MAKERPS(SF7 , BW125, CR_4_5, 0, 0), // [5] + MAKERPS(SF8 , BW500, CR_4_5, 0, 0), // [6] + ILLEGAL_RPS , // [7] + MAKERPS(SF12, BW500, CR_4_5, 0, 0), // [8] + MAKERPS(SF11, BW500, CR_4_5, 0, 0), // [9] + MAKERPS(SF10, BW500, CR_4_5, 0, 0), // [10] + MAKERPS(SF9 , BW500, CR_4_5, 0, 0), // [11] + MAKERPS(SF8 , BW500, CR_4_5, 0, 0), // [12] + MAKERPS(SF7 , BW500, CR_4_5, 0, 0), // [13] + ILLEGAL_RPS +}; + +bit_t +LMICau915_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +static CONST_TABLE(u1_t, maxFrameLens_dwell0)[] = { + 59+5, 59+5, 59+5, 123+5, 250+5, 250+5, 250+5, 0, + 61+5, 137+5, 250+5, 250+5, 250+5, 250+5 }; + +static CONST_TABLE(u1_t, maxFrameLens_dwell1)[] = { + 0, 0, 19+5, 61+5, 133+5, 250+5, 250+5, 0, + 61+5, 137+5, 250+5, 250+5, 250+5, 250+5 }; + +static bit_t +LMICau915_getUplinkDwellBit() { + // if uninitialized, return default. + if (LMIC.txParam == 0xFF) { + return AU915_INITIAL_TxParam_UplinkDwellTime; + } + return (LMIC.txParam & MCMD_TxParam_TxDWELL_MASK) != 0; +} + +uint8_t LMICau915_maxFrameLen(uint8_t dr) { + if (LMICau915_getUplinkDwellBit()) { + if (dr < LENOF_TABLE(maxFrameLens_dwell0)) + return TABLE_GET_U1(maxFrameLens_dwell0, dr); + else + return 0; + } else { + if (dr < LENOF_TABLE(maxFrameLens_dwell1)) + return TABLE_GET_U1(maxFrameLens_dwell1, dr); + else + return 0; + } +} + +// from LoRaWAN 5.8: mapping from txParam to MaxEIRP +static CONST_TABLE(s1_t, TXMAXEIRP)[16] = { + 8, 10, 12, 13, 14, 16, 18, 20, 21, 24, 26, 27, 29, 30, 33, 36 +}; + +static int8_t LMICau915_getMaxEIRP(uint8_t mcmd_txparam) { + // if uninitialized, return default. + if (mcmd_txparam == 0xFF) + return AU915_TX_EIRP_MAX_DBM; + else + return TABLE_GET_S1( + TXMAXEIRP, + (mcmd_txparam & MCMD_TxParam_MaxEIRP_MASK) >> + MCMD_TxParam_MaxEIRP_SHIFT + ); +} + +int8_t LMICau915_pow2dbm(uint8_t mcmd_ladr_p1) { + if ((mcmd_ladr_p1 & MCMD_LinkADRReq_POW_MASK) == MCMD_LinkADRReq_POW_MASK) + return -128; + else { + return ((s1_t)(LMICau915_getMaxEIRP(LMIC.txParam) - (((mcmd_ladr_p1)&MCMD_LinkADRReq_POW_MASK)<<1))); + } +} + +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 7), // DR_SF12 + us2osticksRound(128 << 6), // DR_SF11 + us2osticksRound(128 << 5), // DR_SF10 + us2osticksRound(128 << 4), // DR_SF9 + us2osticksRound(128 << 3), // DR_SF8 + us2osticksRound(128 << 2), // DR_SF7 + us2osticksRound(128 << 1), // DR_SF8C + us2osticksRound(128 << 0), // ------ + us2osticksRound(128 << 5), // DR_SF12CR + us2osticksRound(128 << 4), // DR_SF11CR + us2osticksRound(128 << 3), // DR_SF10CR + us2osticksRound(128 << 2), // DR_SF9CR + us2osticksRound(128 << 1), // DR_SF8CR + us2osticksRound(128 << 0), // DR_SF7CR +}; + +// get ostime for symbols based on datarate. This is not like us915, +// becuase the times don't match between the upper half and lower half +// of the table. +ostime_t LMICau915_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, dr); +} + + + +u4_t LMICau915_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < AU915_FREQ_MIN || freq > AU915_FREQ_MAX) + freq = 0; + return freq; +} + +/// +/// \brief query number of default channels. +/// +/// \note +/// For AU, we have no programmable channels; all channels +/// are fixed. Return the total channel count. +/// +u1_t LMIC_queryNumDefaultChannels() { + return 64 + 8; +} + + +/// +/// \brief LMIC_setupChannel for AU915 +/// +/// \note there are no progammable channels for US915, so this API +/// always returns FALSE. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + LMIC_API_PARAMETER(chidx); + LMIC_API_PARAMETER(freq); + LMIC_API_PARAMETER(drmap); + LMIC_API_PARAMETER(band); + + return 0; // all channels are hardwired. +} + +bit_t LMIC_disableChannel(u1_t channel) { + bit_t result = 0; + if (channel < 72) { + if (ENABLED_CHANNEL(channel)) { + result = 1; + if (IS_CHANNEL_125khz(channel)) + LMIC.activeChannels125khz--; + else if (IS_CHANNEL_500khz(channel)) + LMIC.activeChannels500khz--; + } + LMIC.channelMap[channel >> 4] &= ~(1 << (channel & 0xF)); + } + return result; +} + +bit_t LMIC_enableChannel(u1_t channel) { + bit_t result = 0; + if (channel < 72) { + if (!ENABLED_CHANNEL(channel)) { + result = 1; + if (IS_CHANNEL_125khz(channel)) + LMIC.activeChannels125khz++; + else if (IS_CHANNEL_500khz(channel)) + LMIC.activeChannels500khz++; + } + LMIC.channelMap[channel >> 4] |= (1 << (channel & 0xF)); + } + return result; +} + +bit_t LMIC_enableSubBand(u1_t band) { + ASSERT(band < 8); + u1_t start = band * 8; + u1_t end = start + 8; + bit_t result = 0; + + // enable all eight 125 kHz channels in this subband + for (int channel = start; channel < end; ++channel) + result |= LMIC_enableChannel(channel); + + // there's a single 500 kHz channel associated with + // each group of 8 125 kHz channels. Enable it, too. + result |= LMIC_enableChannel(64 + band); + return result; +} + +bit_t LMIC_disableSubBand(u1_t band) { + ASSERT(band < 8); + u1_t start = band * 8; + u1_t end = start + 8; + bit_t result = 0; + + // disable all eight 125 kHz channels in this subband + for (int channel = start; channel < end; ++channel) + result |= LMIC_disableChannel(channel); + + // there's a single 500 kHz channel associated with + // each group of 8 125 kHz channels. Disable it, too. + result |= LMIC_disableChannel(64 + band); + return result; +} + +bit_t LMIC_selectSubBand(u1_t band) { + bit_t result = 0; + + ASSERT(band < 8); + for (int b = 0; b<8; ++b) { + if (band == b) + result |= LMIC_enableSubBand(b); + else + result |= LMIC_disableSubBand(b); + } + return result; +} + +void LMICau915_updateTx(ostime_t txbeg) { + u1_t chnl = LMIC.txChnl; + LMIC.txpow = LMICau915_getMaxEIRP(LMIC.txParam); + if (chnl < 64) { + LMIC.freq = AU915_125kHz_UPFBASE + chnl*AU915_125kHz_UPFSTEP; + } else { + ASSERT(chnl < 64 + 8); + LMIC.freq = AU915_500kHz_UPFBASE + (chnl - 64)*AU915_500kHz_UPFSTEP; + } + + // Update global duty cycle stat and deal with dwell time. + u4_t dwellDelay; + u4_t globalDutyDelay; + dwellDelay = globalDutyDelay = 0; + + if (LMIC.globalDutyRate != 0) { + ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); + globalDutyDelay = txbeg + (airtime << LMIC.globalDutyRate); + } + if (LMICau915_getUplinkDwellBit(LMIC.txParam)) { + dwellDelay = AU915_UPLINK_DWELL_TIME_osticks; + } + if (dwellDelay > globalDutyDelay) { + globalDutyDelay = dwellDelay; + } + if (globalDutyDelay != 0) { + LMIC.globalDutyAvail = txbeg + globalDutyDelay; + } +} + +#if !defined(DISABLE_BEACONS) +void LMICau915_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = AU915_500kHz_DNFBASE + LMIC.bcnChnl * AU915_500kHz_DNFSTEP; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +// set the Rx1 dndr, rps. +void LMICau915_setRx1Params(void) { + u1_t const txdr = LMIC.dndr; + u1_t candidateDr; + LMIC.freq = AU915_500kHz_DNFBASE + (LMIC.txChnl & 0x7) * AU915_500kHz_DNFSTEP; + if ( /* TX datarate */txdr < AU915_DR_SF8C) + candidateDr = txdr + 8 - LMIC.rx1DrOffset; + else + candidateDr = AU915_DR_SF7CR; + + if (candidateDr < LORAWAN_DR8) + candidateDr = LORAWAN_DR8; + else if (candidateDr > LORAWAN_DR13) + candidateDr = LORAWAN_DR13; + + LMIC.dndr = candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +void LMICau915_initJoinLoop(void) { + // LMIC.txParam is set to 0xFF by the central code at init time. + LMICuslike_initJoinLoop(); + + // initialize the adrTxPower. + LMIC.adrTxPow = LMICau915_getMaxEIRP(LMIC.txParam); // dBm + +} + +// +// END: AU915 related stuff +// +// ================================================================================ +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan.h new file mode 100644 index 0000000..3921819 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan.h @@ -0,0 +1,257 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_bandplan_h_ +# define _lmic_bandplan_h_ + +#ifndef _lmic_h_ +# include "lmic.h" +#endif + +#if defined(CFG_eu868) +# include "lmic_bandplan_eu868.h" +#elif defined(CFG_us915) +# include "lmic_bandplan_us915.h" +#elif defined(CFG_au915) +# include "lmic_bandplan_au915.h" +#elif defined(CFG_as923) +# include "lmic_bandplan_as923.h" +#elif defined(CFG_kr920) +# include "lmic_bandplan_kr920.h" +#elif defined(CFG_in866) +# include "lmic_bandplan_in866.h" +#else +# error "CFG_... not properly set for bandplan" +#endif + +// check post-conditions +#ifndef DNW2_SAFETY_ZONE +# error "DNW2_SAFETY_ZONE not defined by bandplan" +#endif + +#ifndef LMICbandplan_maxFrameLen +# error "LMICbandplan_maxFrameLen() not defined by bandplan" +#endif + +#ifndef pow2dBm +# error "pow2dBm() not defined by bandplan" +#endif + +#ifndef dr2hsym +# error "dr2hsym() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_isValidBeacon1) && !defined(DISABLE_BEACONS) +# error "LMICbandplan_isValidBeacon1 not defined by bandplan" +#endif + +#if !defined(LMICbandplan_isFSK) +# error "LMICbandplan_isFSK() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_txDoneFSK) +# error "LMICbandplan_txDoneFSK() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_joinAcceptChannelClear) +# error "LMICbandplan_joinAcceptChannelClear() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_getInitialDrJoin) +# error "LMICbandplan_getInitialDrJoin() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_hasJoinCFlist) +# error "LMICbandplan_hasJoinCFlist() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_advanceBeaconChannel) +# error "LMICbandplan_advanceBeaconChannel() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_resetDefaultChannels) +# error "LMICbandplan_resetDefaultChannels() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_setSessionInitDefaultChannels) +# error "LMICbandplan_setSessionInitDefaultChannels() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_setBcnRxParams) +# error "LMICbandplan_setBcnRxParams() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_canMapChannels) +# error "LMICbandplan_canMapChannels() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_mapChannels) +# error "LMICbandplan_mapChannels() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_convFreq) +# error "LMICbandplan_convFreq() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_setRx1Params) +# error "LMICbandplan_setRx1Params() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_initJoinLoop) +# error "LMICbandplan_initJoinLoop() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_nextTx) +# error "LMICbandplan_nextTx() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_updateTx) +# error "LMICbandplan_updateTx() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_nextJoinState) +# error "LMICbandplan_nextJoinState() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_initDefaultChannels) +# error "LMICbandplan_initDefaultChannels() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_nextJoinTime) +# error "LMICbandplan_nextJoinTime() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_init) +# error "LMICbandplan_init() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_saveAdrState) +# error "LMICbandplan_saveAdrState() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_compareAdrState) +# error "LMICbandplan_compareAdrState() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_restoreAdrState) +# error "LMICbandplan_restoreAdrState() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_isDataRateFeasible) +# error "LMICbandplan_isDataRateFeasible() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_validDR) +# error "LMICbandplan_validDR() not defined by bandplan" +#endif + +#if !defined(LMICbandplan_processJoinAcceptCFList) +# error "LMICbandplan_processJoinAcceptCFList() not defined by bandplan" +#endif + +// +// Things common to lmic.c code +// +#define LMICbandplan_MINRX_SYMS_LoRa_ClassA 6 +#define LMICbandplan_RX_ERROR_ABS_osticks ms2osticks(10) + +// Semtech inherently (by calculating in ms and taking ceilings) +// rounds up to the next higher ms. It's a lot easier for us +// to just add margin for things like hardware ramp-up time +// and clock calibration when running from the LSE and HSI +// clocks on an STM32. +#define LMICbandplan_RX_EXTRA_MARGIN_osticks us2osticks(2000) + +// probably this should be the same as the Class-A value, but +// we have not the means to thoroughly test this. This is the +// number of rxsyms used in the computations for ping and beacon +// windows. +#define LMICbandplan_MINRX_SYMS_LoRa_ClassB 5 + +#define LMICbandplan_PAMBL_SYMS 8 +#define LMICbandplan_PAMBL_FSK 5 +#define LMICbandplan_PRERX_FSK 1 +#define LMICbandplan_RXLEN_FSK (1+5+2) + +// Legacy names +#if !defined(MINRX_SYMS) +# define MINRX_SYMS LMICbandplan_MINRX_SYMS_LoRa_ClassB +#endif // !defined(MINRX_SYMS) +#define PAMBL_SYMS LMICbandplan_PAMBL_SYMS +#define PAMBL_FSK LMICbandplan_PAMBL_FSK +#define PRERX_FSK LMICbandplan_PRERX_FSK +#define RXLEN_FSK LMICbandplan_RXLEN_FSK + +// this is regional, but so far all regions are the same +#if !defined(LMICbandplan_MAX_FCNT_GAP) +# define LMICbandplan_MAX_FCNT_GAP 16384 +#endif // !defined LWAN_MAX_FCNT_GAP + +// this is probably regional, but for now default can be the same +#if !defined(LMICbandplan_TX_RECOVERY_ms) +# define LMICbandplan_TX_RECOVERY_ms 500 +#endif + +#define BCN_INTV_osticks sec2osticks(BCN_INTV_sec) +#define TXRX_GUARD_osticks ms2osticks(TXRX_GUARD_ms) +#define JOIN_GUARD_osticks ms2osticks(JOIN_GUARD_ms) +#define DELAY_JACC1_osticks sec2osticks(DELAY_JACC1) +#define DELAY_JACC2_osticks sec2osticks(DELAY_JACC2) +#define DELAY_EXTDNW2_osticks sec2osticks(DELAY_EXTDNW2) +#define BCN_RESERVE_osticks ms2osticks(BCN_RESERVE_ms) +#define BCN_GUARD_osticks ms2osticks(BCN_GUARD_ms) +#define BCN_WINDOW_osticks ms2osticks(BCN_WINDOW_ms) +#define AIRTIME_BCN_osticks us2osticks(AIRTIME_BCN) + +// Special APIs - for development or testing +#define isTESTMODE() 0 + +// internal APIs +ostime_t LMICcore_rndDelay(u1_t secSpan); +void LMICcore_setDrJoin(u1_t reason, u1_t dr); +ostime_t LMICcore_adjustForDrift(ostime_t delay, ostime_t hsym, rxsyms_t rxsyms_in); + +// this has been exported to clients forever by lmic.h. including lorabase.h; +// but with multiband lorabase can't really safely do this; it's really an LMIC-ism. +// As are the rest of the static inlines.. + +///< \brief return non-zero if given DR is valid for this region. +static inline bit_t validDR (dr_t dr) { return LMICbandplan_validDR(dr); } // in range + +///< \brief region-specific table mapping DR to RPS/CRC bits; index by dr+1 +extern CONST_TABLE(u1_t, _DR2RPS_CRC)[]; + +static inline rps_t updr2rps (dr_t dr) { return (rps_t)TABLE_GET_U1(_DR2RPS_CRC, dr+1); } +static inline rps_t dndr2rps (dr_t dr) { return setNocrc(updr2rps(dr),1); } +static inline dr_t incDR (dr_t dr) { return TABLE_GET_U1(_DR2RPS_CRC, dr+2)==ILLEGAL_RPS ? dr : (dr_t)(dr+1); } // increase data rate +static inline dr_t decDR (dr_t dr) { return TABLE_GET_U1(_DR2RPS_CRC, dr )==ILLEGAL_RPS ? dr : (dr_t)(dr-1); } // decrease data rate +static inline dr_t assertDR (dr_t dr) { return TABLE_GET_U1(_DR2RPS_CRC, dr+1)==ILLEGAL_RPS ? (dr_t)DR_DFLTMIN : dr; } // force into a valid DR +static inline dr_t lowerDR (dr_t dr, u1_t n) { while(n--){dr=decDR(dr);} return dr; } // decrease data rate by n steps + + +#endif // _lmic_bandplan_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_as923.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_as923.h new file mode 100644 index 0000000..69bb83d --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_as923.h @@ -0,0 +1,115 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_bandplan_as923_h_ +# define _lmic_bandplan_as923_h_ + +#ifndef _lmic_eu_like_h_ +# include "lmic_eu_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (as923); 0 --> not valid dr. +uint8_t LMICas923_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICas923_maxFrameLen(dr) + +int8_t LMICas923_pow2dBm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICas923_pow2dBm(mcmd_ladr_p1) + +// Times for half symbol per DR +// Per DR table to minimize rounding errors +ostime_t LMICas923_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICas923_dr2hsym(dr) + +static inline int +LMICas923_isValidBeacon1(const uint8_t *d) { + return os_rlsbf2(&d[OFF_BCN_CRC1]) != os_crc16(d, OFF_BCN_CRC1); +} + +#undef LMICbandplan_isValidBeacon1 +#define LMICbandplan_isValidBeacon1(pFrame) LMICas923_isValidBeacon1(pFrame) + +// override default for LMICbandplan_resetDefaultChannels +void +LMICas923_resetDefaultChannels(void); + +#undef LMICbandplan_resetDefaultChannels +#define LMICbandplan_resetDefaultChannels() \ + LMICas923_resetDefaultChannels() + +// override default for LMICbandplan_init +void LMICas923_init(void); + +#undef LMICbandplan_init +#define LMICbandplan_init() \ + LMICas923_init() + + +// override default for LMICbandplan_isFSK() +#undef LMICbandplan_isFSK +#define LMICbandplan_isFSK() (/* RX datarate */LMIC.dndr == AS923_DR_FSK) + +#define LMICbandplan_getInitialDrJoin() (AS923_DR_SF10) + +void LMICas923_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICas923_setBcnRxParams() + +u4_t LMICas923_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICas923_convFreq(ptr) + +void LMICas923_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICas923_initJoinLoop() + +// for as923, depending on dwell, we may need to do something else +#undef LMICbandplan_setRx1Params +void LMICas923_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICas923_setRx1Params() + +ostime_t LMICas923_nextTx(ostime_t now); +#define LMICbandplan_nextTx(now) LMICas923_nextTx(now) + +ostime_t LMICas923_nextJoinState(void); +#define LMICbandplan_nextJoinState() LMICas923_nextJoinState() + +void LMICas923_initDefaultChannels(bit_t join); +#define LMICbandplan_initDefaultChannels(join) LMICas923_initDefaultChannels(join) + +// override default for LMICbandplan_updateTX +#undef LMICbandplan_updateTx +void LMICas923_updateTx(ostime_t txbeg); +#define LMICbandplan_updateTx(txbeg) LMICas923_updateTx(txbeg) + +#undef LMICbandplan_nextJoinTime +ostime_t LMICas923_nextJoinTime(ostime_t now); +#define LMICbandplan_nextJoinTime(now) LMICas923_nextJoinTime(now) + +#undef LMICbandplan_validDR +bit_t LMICas923_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICas923_validDR(dr) + +#endif // _lmic_bandplan_as923_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_au915.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_au915.h new file mode 100644 index 0000000..7863779 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_au915.h @@ -0,0 +1,73 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_bandplan_au915_h_ +# define _lmic_bandplan_au915_h_ + +// preconditions for lmic_us_like.h +#define LMICuslike_getFirst500kHzDR() (LORAWAN_DR6) +#define LMICuslike_getJoin125kHzDR() (LORAWAN_DR2) + +#ifndef _lmic_us_like_h_ +# include "lmic_us_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (au915); 0 --> not valid dr. +uint8_t LMICau915_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICau915_maxFrameLen(dr) + +int8_t LMICau915_pow2dbm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICau915_pow2dbm(mcmd_ladr_p1) + +ostime_t LMICau915_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICau915_dr2hsym(dr) + + +#define LMICbandplan_getInitialDrJoin() (LORAWAN_DR2) + +void LMICau915_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICau915_initJoinLoop() + +void LMICau915_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICau915_setBcnRxParams() + +u4_t LMICau915_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICau915_convFreq(ptr) + +void LMICau915_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICau915_setRx1Params() + +void LMICau915_updateTx(ostime_t txbeg); +#define LMICbandplan_updateTx(txbeg) LMICau915_updateTx(txbeg) + +#undef LMICbandplan_validDR +bit_t LMICau915_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICau915_validDR(dr) + +#endif // _lmic_bandplan_au915_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_eu868.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_eu868.h new file mode 100644 index 0000000..83ec405 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_eu868.h @@ -0,0 +1,95 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_eu868_h_ +# define _lmic_eu868_h_ + +#ifndef _lmic_eu_like_h_ +# include "lmic_eu_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (eu868); 0 --> not valid dr. +uint8_t LMICeu868_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICeu868_maxFrameLen(dr) + +int8_t LMICeu868_pow2dBm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICeu868_pow2dBm(mcmd_ladr_p1) + +// Times for half symbol per DR +// Per DR table to minimize rounding errors +ostime_t LMICeu868_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICeu868_dr2hsym(dr) + + +// TODO(tmm@mcci.com) this looks bogus compared to current 1.02 regional +// spec. https://github.com/mcci-catena/arduino-lmic/issues/18 +static inline int +LMICeu868_isValidBeacon1(const uint8_t *d) { + return d[OFF_BCN_CRC1] != (u1_t)os_crc16(d, OFF_BCN_CRC1); +} + +#undef LMICbandplan_isValidBeacon1 +#define LMICbandplan_isValidBeacon1(pFrame) LMICeu868_isValidBeacon1(pFrame) + +// override default for LMICbandplan_isFSK() +#undef LMICbandplan_isFSK +#define LMICbandplan_isFSK() (/* RX datarate */LMIC.dndr == EU868_DR_FSK) + +#define LMICbandplan_getInitialDrJoin() (EU868_DR_SF7) + +void LMICeu868_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICeu868_setBcnRxParams() + +u4_t LMICeu868_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICeu868_convFreq(ptr) + +void LMICeu868_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICeu868_initJoinLoop() + +ostime_t LMICeu868_nextTx(ostime_t now); +#define LMICbandplan_nextTx(now) LMICeu868_nextTx(now) + +ostime_t LMICeu868_nextJoinState(void); +#define LMICbandplan_nextJoinState() LMICeu868_nextJoinState() + +void LMICeu868_initDefaultChannels(bit_t join); +#define LMICbandplan_initDefaultChannels(join) LMICeu868_initDefaultChannels(join) + +#undef LMICbandplan_nextJoinTime +ostime_t LMICeu868_nextJoinTime(ostime_t now); +#define LMICbandplan_nextJoinTime(now) LMICeu868_nextJoinTime(now) + +void LMICeu868_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICeu868_setRx1Params() + +#undef LMICbandplan_validDR +bit_t LMICeu868_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICeu868_validDR(dr) + +#endif // _lmic_eu868_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_in866.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_in866.h new file mode 100644 index 0000000..04dae75 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_in866.h @@ -0,0 +1,88 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_bandplan_in866_h_ +# define _lmic_bandplan_in866_h_ + +#ifndef _lmic_eu_like_h_ +# include "lmic_eu_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (in866); 0 --> not valid dr. +uint8_t LMICin866_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICin866_maxFrameLen(dr) + +int8_t LMICin866_pow2dBm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICin866_pow2dBm(mcmd_ladr_p1) + +// Times for half symbol per DR +// Per DR table to minimize rounding errors +ostime_t LMICin866_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICin866_dr2hsym(dr) + +static inline int +LMICin866_isValidBeacon1(const uint8_t *d) { + return os_rlsbf2(&d[OFF_BCN_CRC1]) != os_crc16(d, OFF_BCN_CRC1); +} + +#undef LMICbandplan_isValidBeacon1 +#define LMICbandplan_isValidBeacon1(pFrame) LMICin866_isValidBeacon1(pFrame) + +// override default for LMICbandplan_isFSK() +#undef LMICbandplan_isFSK +#define LMICbandplan_isFSK() (/* TX datarate */LMIC.dndr == IN866_DR_FSK) + +#define LMICbandplan_getInitialDrJoin() (IN866_DR_SF7) + +void LMICin866_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICin866_setBcnRxParams() + +u4_t LMICin866_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICin866_convFreq(ptr) + +void LMICin866_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICin866_initJoinLoop() + +ostime_t LMICin866_nextTx(ostime_t now); +#define LMICbandplan_nextTx(now) LMICin866_nextTx(now) + +ostime_t LMICin866_nextJoinState(void); +#define LMICbandplan_nextJoinState() LMICin866_nextJoinState() + +void LMICin866_initDefaultChannels(bit_t join); +#define LMICbandplan_initDefaultChannels(join) LMICin866_initDefaultChannels(join) + +void LMICin866_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICin866_setRx1Params() + +#undef LMICbandplan_validDR +bit_t LMICin866_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICin866_validDR(dr) + +#endif // _lmic_bandplan_in866_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_kr920.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_kr920.h new file mode 100644 index 0000000..49beda0 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_kr920.h @@ -0,0 +1,95 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_kr920_h_ +# define _lmic_kr920_h_ + +#ifndef _lmic_eu_like_h_ +# include "lmic_eu_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (kr920); 0 --> not valid dr. +uint8_t LMICkr920_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICkr920_maxFrameLen(dr) + +int8_t LMICkr920_pow2dBm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICkr920_pow2dBm(mcmd_ladr_p1) + +// Times for half symbol per DR +// Per DR table to minimize rounding errors +ostime_t LMICkr920_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICkr920_dr2hsym(dr) + + +// TODO(tmm@mcci.com) this looks bogus compared to current 1.02 regional +// spec. https://github.com/mcci-catena/arduino-lmic/issues/18 +static inline int +LMICkr920_isValidBeacon1(const uint8_t *d) { + return d[OFF_BCN_CRC1] != (u1_t)os_crc16(d, OFF_BCN_CRC1); +} + +#undef LMICbandplan_isValidBeacon1 +#define LMICbandplan_isValidBeacon1(pFrame) LMICkr920_isValidBeacon1(pFrame) + +// override default for LMICbandplan_isFSK() +#undef LMICbandplan_isFSK +#define LMICbandplan_isFSK() (/* always false */ 0) + +#define LMICbandplan_getInitialDrJoin() (KR920_DR_SF7) + +void LMICkr920_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICkr920_setBcnRxParams() + +u4_t LMICkr920_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICkr920_convFreq(ptr) + +void LMICkr920_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICkr920_initJoinLoop() + +ostime_t LMICkr920_nextTx(ostime_t now); +#define LMICbandplan_nextTx(now) LMICkr920_nextTx(now) + +ostime_t LMICkr920_nextJoinState(void); +#define LMICbandplan_nextJoinState() LMICkr920_nextJoinState() + +void LMICkr920_initDefaultChannels(bit_t join); +#define LMICbandplan_initDefaultChannels(join) LMICkr920_initDefaultChannels(join) + +void LMICkr920_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICkr920_setRx1Params() + +#undef LMICbandplan_updateTx +void LMICkr920_updateTx(ostime_t txbeg); +#define LMICbandplan_updateTx(t) LMICkr920_updateTx(t) + +#undef LMICbandplan_validDR +bit_t LMICkr920_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICkr920_validDR(dr) + +#endif // _lmic_kr920_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_us915.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_us915.h new file mode 100644 index 0000000..2c739c2 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_bandplan_us915.h @@ -0,0 +1,73 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_bandplan_us915_h_ +# define _lmic_bandplan_us915_h_ + +// preconditions for lmic_us_like.h +#define LMICuslike_getFirst500kHzDR() (LORAWAN_DR4) +#define LMICuslike_getJoin125kHzDR() (LORAWAN_DR0) + +#ifndef _lmic_us_like_h_ +# include "lmic_us_like.h" +#endif + +// return maximum frame length (including PHY header) for this data rate (us915); 0 --> not valid dr. +uint8_t LMICus915_maxFrameLen(uint8_t dr); +// return maximum frame length (including PHY header) for this data rate; 0 --> not valid dr. +#define LMICbandplan_maxFrameLen(dr) LMICus915_maxFrameLen(dr) + +int8_t LMICus915_pow2dbm(uint8_t mcmd_ladr_p1); +#define pow2dBm(mcmd_ladr_p1) LMICus915_pow2dbm(mcmd_ladr_p1) + +ostime_t LMICus915_dr2hsym(uint8_t dr); +#define dr2hsym(dr) LMICus915_dr2hsym(dr) + + +#define LMICbandplan_getInitialDrJoin() (LORAWAN_DR0) + +void LMICus915_setBcnRxParams(void); +#define LMICbandplan_setBcnRxParams() LMICus915_setBcnRxParams() + +u4_t LMICus915_convFreq(xref2cu1_t ptr); +#define LMICbandplan_convFreq(ptr) LMICus915_convFreq(ptr) + +void LMICus915_initJoinLoop(void); +#define LMICbandplan_initJoinLoop() LMICus915_initJoinLoop() + +void LMICus915_setRx1Params(void); +#define LMICbandplan_setRx1Params() LMICus915_setRx1Params() + +void LMICus915_updateTx(ostime_t txbeg); +#define LMICbandplan_updateTx(txbeg) LMICus915_updateTx(txbeg) + +#undef LMICbandplan_validDR +bit_t LMICus915_validDR(dr_t dr); +#define LMICbandplan_validDR(dr) LMICus915_validDR(dr) + +#endif // _lmic_bandplan_us915_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_channelshuffle.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_channelshuffle.c new file mode 100644 index 0000000..252bbee --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_channelshuffle.c @@ -0,0 +1,217 @@ +/* + +Module: lmic_channelshuffle.c + +Function: + Channel scheduling without replacement. + +Copyright and License: + This file copyright (C) 2021 by + + MCCI Corporation + 3520 Krums Corners Road + Ithaca, NY 14850 + + See accompanying LICENSE file for copyright and license information. + +Author: + Terry Moore, MCCI Corporation April 2021 + +*/ + +#include "lmic.h" +#include <string.h> + +/****************************************************************************\ +| +| Manifest constants and local declarations. +| +\****************************************************************************/ + +static unsigned sidewaysSum16(const uint16_t *pMask, uint16_t nEntries); +static unsigned findNthSetBit(const uint16_t *pMask, uint16_t bitnum); + +/****************************************************************************\ +| +| Read-only data. +| +\****************************************************************************/ + +/****************************************************************************\ +| +| Variables. +| +\****************************************************************************/ + +/* + +Name: LMIC_findNextChannel() + +Function: + Scan a shuffle mask, and select a channel (without replacement). + +Definition: + int LMIC_findNextChannel( + uint16_t *pShuffleMask, + const uint16_t *pEnableMask, + uint16_t nEntries, + int lastChannel + ); + +Description: + pShuffleMask and pEnableMask are bit vectors. Channels correspond to + bits in little-endian order; entry [0] has channels 0 through 15, entry + [1] channels 16 through 31, and so forth. nEntries specifies the number + of entries in the mask vectors. The enable mask is 1 for a given channel + if that channel is eligible for selection, 0 otherwise. + + This routine selects channels from the shuffle mask until all entries + are exhausted; it then refreshes the shuffle mask from the enable mask. + + If it refreshes the channel mask, lastChannel is taken as a channel number + that is to be avoided in the next selection. (This is to avoid back-to-back + use of a channel across a refresh boundary.) Otherwise lastChannel is + ignored. This avoidance can be suppresed by setting lastChannel to -1. + If only one channel is enabled, lastChannel is also ignored. If lastChannel + is actually disabled, lastChannel is also ignored. + +Returns: + A channel number, in 0 .. nEntries-1, or -1 if the enable mask is + identically zero. + +Notes: + This routine is somewhat optimized for AVR processors, which don't have + multi-bit shifts. + +*/ + +int LMIC_findNextChannel( + uint16_t *pShuffleMask, + const uint16_t *pEnableMask, + uint16_t nEntries, + int lastChannel +) { + unsigned nSet16; + uint16_t saveLastChannelVal; + + // in case someone has changed the enable mask, update + // the shuffle mask so there are no disable bits set. + for (unsigned i = 0; i < nEntries; ++i) { + pShuffleMask[i] &= pEnableMask[i]; + } + + // count the set bits in the shuffle mask (with a factor of 16 for speed) + nSet16 = sidewaysSum16(pShuffleMask, nEntries); + + // if zero, copy the enable mask to the shuffle mask, and recount + if (nSet16 == 0) { + memcpy(pShuffleMask, pEnableMask, nEntries * sizeof(*pShuffleMask)); + nSet16 = sidewaysSum16(pShuffleMask, nEntries); + } else { + // don't try to skip the last channel becuase it can't be chosen. + lastChannel = -1; + } + + // if still zero, return -1. + if (nSet16 == 0) { + return -1; + } + + // if we have to skip a channel, and we have more than one choice, turn off + // the last channel bit. Post condition: if we really clered a bit, + // saveLastChannelVal will be non-zero. + saveLastChannelVal = 0; + if (nSet16 > 16 && lastChannel >= 0 && lastChannel <= nEntries * 16) { + uint16_t const saveLastChannelMask = (1 << (lastChannel & 0xF)); + + saveLastChannelVal = pShuffleMask[lastChannel >> 4] & saveLastChannelMask; + pShuffleMask[lastChannel >> 4] &= ~saveLastChannelMask; + + // if we cleared a bit, reduce the count. + if (saveLastChannelVal > 0) + nSet16 -= 16; + } + + if (saveLastChannelVal == 0) { + // We didn't eliminate a channel, so we don't have to worry. + lastChannel = -1; + } + + // get a random number + unsigned choice = os_getRndU2() % ((uint16_t)nSet16 >> 4); + + // choose a bit based on set bit + unsigned channel = findNthSetBit(pShuffleMask, choice); + pShuffleMask[channel / 16] ^= (1 << (channel & 0xF)); + + // handle channel skip + if (lastChannel >= 0) { + pShuffleMask[lastChannel >> 4] |= saveLastChannelVal; + } + return channel; +} + +static unsigned sidewaysSum16(const uint16_t *pMask, uint16_t nEntries) { + unsigned result; + + result = 0; + for (; nEntries > 0; --nEntries, ++pMask) + { + uint16_t v = *pMask; + + // the following is an adaptation of Knuth 7.1.3 (62). To avoid + // lots of shifts (slow on AVR, and code intensive) and table lookups, + // we sum popc * 16, then divide by 16. + + // sum adjacent bits, making a series of 2-bit sums + v = v - ((v >> 1) & 0x5555u); + v = (v & 0x3333u) + ((v >> 2) & 0x3333u); + // this assumes multiplies are essentialy free; + v = (v & 0xF0F0u) + ((v & 0x0F0Fu) * 16u); + // Accumulate result, but note it's times 16. + // AVR compiler should optimize the x8 shift. + result += (v & 0xFF) + (v >> 8); + } + + // + return result; +} + +static unsigned findNthSetBit(const uint16_t *pMask, uint16_t bitnum) { + unsigned result; + result = 0; + bitnum = bitnum * 16; + for (;; result += 16) { + uint16_t m = *pMask++; + if (m == 0) + continue; + uint16_t v = m - ((m >> 1) & 0x5555u); + v = (v & 0x3333u) + ((v >> 2) & 0x3333u); + // this assumes multiplies are essentialy free; + v = (v & 0xF0F0u) + ((v & 0x0F0Fu) * 16u); + // Accumulate result, but note it's times 16. + // AVR compiler should optimize the x8 shift. + v = (v & 0xFF) + (v >> 8); + if (v <= bitnum) + bitnum -= v; + else { + // the selected bit is in this word. We need to count. + while (bitnum > 0) { + m &= m - 1; + bitnum -= 16; + } + // now the lsb of m is our choice. + // get a mask, then use Knuth 7.1.3 (59) to find the + // bit number. + m &= -m; + result += ((m & 0x5555u) ? 0 : 1) + + ((m & 0x3333u) ? 0 : 2) + + ((m & 0x0F0Fu) ? 0 : 4) + + ((m & 0x00FFu) ? 0 : 8) + ; + break; + } + } + + return result; +}
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compat.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compat.h new file mode 100644 index 0000000..96dca49 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compat.h @@ -0,0 +1,72 @@ +/* + +Module: lmic_compat.h + +Function: + Symbols that are defined for backward compatibility + +Copyright notice and license info: + See LICENSE file accompanying this project. + +Author: + Terry Moore, MCCI Corporation January 2020 + +Description: + This include file centralizes backwards compatibility + definitions. The idea is to centralize the decision, + so it's clear as to what's deprecated. + +*/ + +#ifndef _lmic_compat_h_ /* prevent multiple includes */ +#define _lmic_compat_h_ + +#ifdef __cplusplus +extern "C"{ +#endif + +#ifndef ARDUINO_LMIC_VERSION +# error "This file is normally included from lmic.h, not stand alone" +#endif + +#define LMIC_DEPRECATE(m) _Pragma(#m) + +#if ! defined(LMIC_REGION_au921) && ARDUINO_LMIC_VERSION < ARDUINO_LMIC_VERSION_CALC(5,0,0,0) +# define LMIC_REGION_au921 LMIC_DEPRECATE(GCC warning "LMIC_REGION_au921 is deprecated, EOL at V5, use LMIC_REGION_au915") \ + LMIC_REGION_au915 + +// Frequency plan symbols +# define AU921_DR_SF12 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF12 +# define AU921_DR_SF11 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF11 +# define AU921_DR_SF10 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF10 +# define AU921_DR_SF9 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF9 +# define AU921_DR_SF8 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF8 +# define AU921_DR_SF7 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF7 +# define AU921_DR_SF8C LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF8C +# define AU921_DR_NONE LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_NONE +# define AU921_DR_SF12CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF12CR +# define AU921_DR_SF11CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF11CR +# define AU921_DR_SF10CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF10CR +# define AU921_DR_SF9CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF9CR +# define AU921_DR_SF8CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF8CR +# define AU921_DR_SF7CR LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_DR_SF7CR +# define AU921_125kHz_UPFBASE LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_125kHz_UPFBASE +# define AU921_125kHz_UPFSTEP LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_125kHz_UPFSTEP +# define AU921_500kHz_UPFBASE LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_500kHz_UPFBASE +# define AU921_500kHz_UPFSTEP LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_500kHz_UPFSTEP +# define AU921_500kHz_DNFBASE LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_500kHz_DNFBASE +# define AU921_500kHz_DNFSTEP LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_500kHz_DNFSTEP +# define AU921_FREQ_MIN LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_FREQ_MIN +# define AU921_FREQ_MAX LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_FREQ_MAX +# define AU921_TX_EIRP_MAX_DBM LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_TX_EIRP_MAX_DBM +# define AU921_INITIAL_TxParam_UplinkDwellTime LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_INITIAL_TxParam_UplinkDwellTime +# define AU921_UPLINK_DWELL_TIME_osticks LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_UPLINK_DWELL_TIME_osticks +# define DR_PAGE_AU921 LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") DR_PAGE_AU915 +# define AU921_LMIC_REGION_EIRP LMIC_DEPRECATE(GCC warning "A921 symbols are deprecated EOL V5, use AU915") AU915_LMIC_REGION_EIRP +#endif + +#ifdef __cplusplus +} +#endif + +#endif /* _lmic_compat_h_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.c new file mode 100644 index 0000000..8d767b2 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.c @@ -0,0 +1,771 @@ +/* + +Module: lmic_compliance.c + +Function: + Implementation of the compliance engine. + +Copyright notice and license info: + See LICENSE file accompanying this project. + +Author: + Terry Moore, MCCI Corporation March 2019 + +Description: + See function descriptions. + +*/ + +#include "lmic.h" +#include "lmic_compliance.h" +#include "lorawan_spec_compliance.h" +#include <stdbool.h> +#include <string.h> + +#if defined(LMIC_PRINTF_TO) +# include <stdio.h> +# define LMIC_COMPLIANCE_PRINTF(f, ...) printf(f, ## __VA_ARGS__) +#else +# define LMIC_COMPLIANCE_PRINTF(f, ...) do { ; } while (0) +#endif + +/****************************************************************************\ +| +| Manifest constants and local declarations. +| +\****************************************************************************/ + +static void acEnterActiveMode(void); +static void acExitActiveMode(void); +static void acSendUplink(void); +static void acSetTimer(ostime_t); +static void acSendUplinkBuffer(void); +static void evActivate(void); +static void evDeactivate(void); +static void evJoinCommand(void); +static void evMessage(const uint8_t *pMessage, size_t nMessage); +static lmic_compliance_fsmstate_t fsmDispatch(lmic_compliance_fsmstate_t, bool); +static void fsmEval(void); +static void fsmEvalDeferred(void); +static osjobcbfn_t fsmJobCb; +static bool isActivateMessage(const uint8_t *pMessage, size_t nMessage); +static void evEchoCommand(const uint8_t *pMessage, size_t nMessage); +static lmic_event_cb_t lmicEventCb; +static lmic_txmessage_cb_t sendUplinkCompleteCb; +static osjobcbfn_t timerExpiredCb; + +/* these are declared global so the optimizer can chuck them without warnings */ +const char *LMICcompliance_txSuccessToString(int fSuccess); +const char * LMICcompliance_fsmstate_getName(lmic_compliance_fsmstate_t state); + +/****************************************************************************\ +| +| Read-only data. +| +\****************************************************************************/ + +/****************************************************************************\ +| +| Variables. +| +\****************************************************************************/ + +lmic_compliance_t LMIC_Compliance; + +/* + +Name: LMIC_complianceRxMessage() + +Function: + Add compliance-awareness to LMIC applications by filtering messages. + +Definition: + lmic_compliance_rx_action_t LMIC_complianceRxMessage( + u1_t port, + const u1_t *pMessage, + size_t nMessage + ); + +Description: + Clients who want to handle the LoRaWAN compliance protocol on + port 224 should call this routine each time a downlink message is + received. This function will update the internal compliance state, + and return an appropriate action to the user. + + If the result is `LMIC_COMPLIANCE_RX_ACTION_PROCESS`, then the client should + process the message as usual. Otherwise, the client should discard the + message. The other values further allow the client to track entry into, + and exit from, compliance state. `LMIC_COMPLIANCE_RX_ACTION_START` signals + entry into compliance state; `LMIC_COMPLIANCE_RX_ACTION_END` signals exit + from compliance state; and `LMIC_COMPLIANCE_RX_ACTION_IGNORE` indicates + a mesage that should be discarded while already in compliance + state. + +Returns: + See description. + +*/ + +lmic_compliance_rx_action_t +LMIC_complianceRxMessage( + uint8_t port, + const uint8_t *pMessage, + size_t nMessage +) { + lmic_compliance_state_t const complianceState = LMIC_Compliance.state; + + // update the counter used by the status message. + ++LMIC_Compliance.downlinkCount; + + // filter normal messages. + if (port != LORAWAN_PORT_COMPLIANCE) { + return lmic_compliance_state_IsActive(complianceState) + ? LMIC_COMPLIANCE_RX_ACTION_PROCESS + : LMIC_COMPLIANCE_RX_ACTION_IGNORE + ; + } + + // it's a message to port 224. + // if we're not active, ignore everything but activation messages + if (! lmic_compliance_state_IsActive(complianceState)) { + if (isActivateMessage(pMessage, nMessage)) { + evActivate(); + } // else ignore. + } else { + evMessage(pMessage, nMessage); + } + if (lmic_compliance_state_IsActive(complianceState) == lmic_compliance_state_IsActive(LMIC_Compliance.state)) + return LMIC_COMPLIANCE_RX_ACTION_IGNORE; + else if (! lmic_compliance_state_IsActive(complianceState)) + return LMIC_COMPLIANCE_RX_ACTION_START; + else + return LMIC_COMPLIANCE_RX_ACTION_END; +} + +/* + +Name: isActivateMessage() + +Function: + See whether a message is a LoRaWAN activate test mode message. + +Definition: + static bool isActivateMessage( + const uint8_t *pMessage, + size_t nMessage + ); + +Description: + The message body is compared to an activate message (per the + LoRa Alliance End Device Certification spec). + +Returns: + The result is `true` if the message is an activation message; + it's `false` otherwise. + +*/ + +static bool +isActivateMessage( + const uint8_t *pMessage, + size_t nMessage +) { + const uint8_t body[LORAWAN_COMPLIANCE_CMD_ACTIVATE_LEN] = { + LORAWAN_COMPLIANCE_CMD_ACTIVATE, + LORAWAN_COMPLIANCE_CMD_ACTIVATE_MAGIC, + LORAWAN_COMPLIANCE_CMD_ACTIVATE_MAGIC, + LORAWAN_COMPLIANCE_CMD_ACTIVATE_MAGIC, + }; + + if (nMessage != sizeof(body)) + return false; + + if (memcmp(pMessage, body, sizeof(body)) == 0) + return true; + else + return false; +} + +/* + +Name: evActivate() + +Function: + Report an activation event to the finite state machine. + +Definition: + void evActivate(void); + +Description: + We report an activation event, and re-evaluate the FSM. + +Returns: + No explicit result. + +*/ + +static void evActivate(void) { + if (! lmic_compliance_state_IsActive(LMIC_Compliance.state)) { + LMIC_Compliance.downlinkCount = 0; + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_ACTIVATE; + LMIC_Compliance.state = LMIC_COMPLIANCE_STATE_ACTIVATING; + + LMIC_Compliance.saveEvent.pEventCb = LMIC.client.eventCb; + LMIC_Compliance.saveEvent.pUserData = LMIC.client.eventUserData; + +#if CFG_LMIC_EU_like + band_t *b = LMIC.bands; + lmic_compliance_band_t *b_save = LMIC_Compliance.saveBands; + + for (; b < &LMIC.bands[MAX_BANDS]; ++b, ++b_save) { + b_save->txcap = b->txcap; + b->txcap = 1; + b->avail = os_getTime(); + } +#endif // CFG_LMIC_EU_like + + LMIC_registerEventCb(lmicEventCb, NULL); + + fsmEvalDeferred(); + } else { + LMIC_COMPLIANCE_PRINTF("Redundant ActivateTM message ignored.\n"); + } +} + +/* + +Name: evMessage() + +Function: + Process an inbound message while active. + +Definition: + void evMessage(const uint8_t *pMessage, size_t nMessage); + +Description: + The event is parsed, and the appropriate event(s) are sent into + the finite state machine. Note that because of the way the LMIC + works, we can assume that no uplink event is pending; so it's safe + to launch a send from here. + +Returns: + No explicit result. + +*/ + +static void evMessage( + const uint8_t *pMessage, + size_t nMessage +) { + if (nMessage == 0) + return; + + const uint8_t cmd = pMessage[0]; + switch (cmd) { + case LORAWAN_COMPLIANCE_CMD_DEACTIVATE: { + evDeactivate(); + break; + } + case LORAWAN_COMPLIANCE_CMD_ACTIVATE: { + if (isActivateMessage(pMessage, nMessage)) + evActivate(); + break; + } + case LORAWAN_COMPLIANCE_CMD_SET_CONFIRM: { + LMIC_Compliance.fsmFlags |= LMIC_COMPLIANCE_FSM_CONFIRM; + break; + } + case LORAWAN_COMPLIANCE_CMD_SET_UNCONFIRM: { + LMIC_Compliance.fsmFlags &= ~LMIC_COMPLIANCE_FSM_CONFIRM; + break; + } + case LORAWAN_COMPLIANCE_CMD_ECHO: { + evEchoCommand(pMessage, nMessage); + break; + } + case LORAWAN_COMPLIANCE_CMD_LINK: { + // we are required to initiate a Link + break; + } + case LORAWAN_COMPLIANCE_CMD_JOIN: { + evJoinCommand(); + break; + } + default: + break; + } +} + +/* + +Name: evDeactivate() + +Function: + Report an deactivation event to the finite state machine. + +Definition: + void evDectivate(void); + +Description: + We report a deactivation event, and re-evaluate the FSM. + We also set a flag so that we're return the appropriate + status from the compliance entry point to the real + application. + +Returns: + No explicit result. + +*/ + +static void evDeactivate(void) { + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_DEACTIVATE; + LMIC_Compliance.state = LMIC_COMPLIANCE_STATE_STOPPING; + + // restore user's event handler. + LMIC_registerEventCb(LMIC_Compliance.saveEvent.pEventCb, LMIC_Compliance.saveEvent.pUserData); + + // restore band settings +#if CFG_LMIC_EU_like + band_t *b = LMIC.bands; + lmic_compliance_band_t const *b_save = LMIC_Compliance.saveBands; + + for (; b < &LMIC.bands[MAX_BANDS]; ++b, ++b_save) { + b->txcap = b_save->txcap; + } +#endif // CFG_LMIC_EU_like + + fsmEvalDeferred(); +} + +/* + +Name: evJoinCommand() + +Function: + Report that a join has been commanded. + +Definition: + void evJoinCommand(void); + +Description: + We unjoin from the network, and then report a deactivation + of test mode. That will get us out of test mode and back + to the compliance app. The next message send will trigger + a join. + +Returns: + No explicit result. + +*/ + +static void evJoinCommand( + void +) { + LMIC_unjoin(); + evDeactivate(); +} + +/* + +Name: evEchoCommand() + +Function: + Format and transmit the response to an echo downlink (aka echo request). + +Definition: + void evEchoCommand( + const uint8_t *pMessage, + size_t nMessage + ); + +Description: + The echo response is formatted and transmitted. Since we just received + a downlink, it's always safe to do this. + +Returns: + No explicit result. + +*/ + +static void evEchoCommand( + const uint8_t *pMessage, + size_t nMessage +) { + uint8_t *pResponse; + + if (nMessage > sizeof(LMIC_Compliance.uplinkMessage)) + return; + + // create the echo message. + pResponse = LMIC_Compliance.uplinkMessage; + + // copy the command byte unchanged. + *pResponse++ = *pMessage++; + --nMessage; + + // each byte in the body has to be incremented by one. + for (; nMessage > 0; --nMessage) { + *pResponse++ = (uint8_t)(*pMessage++ + 1); + } + + // now that the message is formatted, tell the fsm to send it; + // need to use a separate job. + LMIC_Compliance.uplinkSize = (uint8_t) (pResponse - LMIC_Compliance.uplinkMessage); + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_ECHO_REQUEST; + fsmEvalDeferred(); +} + + +/* + +Name: fsmEval() + +Function: + Evaluate the FSM, preventing recursion. + +Definition: + void fsmEval(void); + +Description: + We check for a nested call to evaluate the FSM; + if detected, the processing is deferred until the + current evaluation completes. Otherwise, we start + a new FSM evaluation, which proceeds until the FSM + returns a "no-change" result. + +Returns: + No explicit result. + +*/ + +const char * LMICcompliance_fsmstate_getName(lmic_compliance_fsmstate_t state) { + const char * const names[] = { LMIC_COMPLIANCE_FSMSTATE__NAMES }; + + if ((unsigned) state >= sizeof(names)/sizeof(names[0])) + return "<<unknown>>"; + else + return names[state]; +} + +static void fsmEvalDeferred(void) { + os_setCallback(&LMIC_Compliance.fsmJob, fsmJobCb); +} + +static void fsmJobCb(osjob_t *j) { + LMIC_API_PARAMETER(j); + fsmEval(); +} + +static void fsmEval(void) { + bool fNewState; + + // check for reentry. + do { + lmic_compliance_fsmflags_t const fsmFlags = LMIC_Compliance.fsmFlags; + + if (fsmFlags & LMIC_COMPLIANCE_FSM_ACTIVE) { + LMIC_Compliance.fsmFlags = fsmFlags | LMIC_COMPLIANCE_FSM_REENTERED; + return; + } + + // record that we're active + LMIC_Compliance.fsmFlags = fsmFlags | LMIC_COMPLIANCE_FSM_ACTIVE; + } while (0); + + // evaluate and change state + fNewState = false; + for (;;) { + lmic_compliance_fsmstate_t const oldState = LMIC_Compliance.fsmState; + lmic_compliance_fsmstate_t newState; + + newState = fsmDispatch(oldState, fNewState); + + if (newState == LMIC_COMPLIANCE_FSMSTATE_NOCHANGE) { + lmic_compliance_fsmflags_t const fsmFlags = LMIC_Compliance.fsmFlags; + + if ((fsmFlags & LMIC_COMPLIANCE_FSM_REENTERED) == 0) { + // not reentered, no change: get out. + LMIC_Compliance.fsmFlags = fsmFlags & ~LMIC_COMPLIANCE_FSM_ACTIVE; + return; + } else { + // reentered. reset reentered flag and keep going. + LMIC_Compliance.fsmFlags = fsmFlags & ~LMIC_COMPLIANCE_FSM_REENTERED; + fNewState = false; + } + } else { + // state change! + LMIC_COMPLIANCE_PRINTF("%s: change state %s(%u) => %s(%u)\n", + __func__, + LMICcompliance_fsmstate_getName(oldState), (unsigned) oldState, + LMICcompliance_fsmstate_getName(newState), (unsigned) newState + ); + fNewState = true; + LMIC_Compliance.fsmState = newState; + } + } +} + +/* + +Name: fsmDispatch() + +Function: + Dispatch to the appropriate event handler. + +Definition: + lmic_compliance_fsmstate_t fsmDispatch( + lmic_compliance_fsmstate_t state, + bool fEntry + ); + +Description: + This function is called by the evalutator as needed. `state` + is set to the current state of the FSM, and `fEntry` is + true if and only if this state has just been entered via a + transition arrow. (Might be a transition to self.) + +Returns: + This function returns LMIC_COMPLIANCE_FSMSTATE_NOCHANGE if + the FSM is to remain in this state until an event occurs. + Otherwise it returns the new state. + +*/ + +static inline lmic_compliance_eventflags_t +eventflags_TestAndClear(lmic_compliance_eventflags_t flag) { + const lmic_compliance_eventflags_t old = LMIC_Compliance.eventflags; + const lmic_compliance_eventflags_t result = old & flag; + + if (result != 0) + LMIC_Compliance.eventflags = old ^ result; + + return result; +} + +static lmic_compliance_fsmstate_t +fsmDispatch( + lmic_compliance_fsmstate_t state, + bool fEntry +) { + lmic_compliance_fsmstate_t newState; + + // currently, this is a stub. + newState = LMIC_COMPLIANCE_FSMSTATE_NOCHANGE; + + switch (state) { + case LMIC_COMPLIANCE_FSMSTATE_INITIAL: { + newState = LMIC_COMPLIANCE_FSMSTATE_INACTIVE; + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_INACTIVE: { + if (fEntry) { + acExitActiveMode(); + } + + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_ACTIVATE)) { + newState = LMIC_COMPLIANCE_FSMSTATE_ACTIVE; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_ACTIVE: { + if (fEntry) { + acEnterActiveMode(); + acSetTimer(sec2osticks(1)); + } + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_TIMER_EXPIRED)) { + newState = LMIC_COMPLIANCE_FSMSTATE_TESTMODE; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_TXBUSY: { + if (fEntry) { + acSetTimer(sec2osticks(1)); + } + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_TIMER_EXPIRED)) { + newState = LMIC_COMPLIANCE_FSMSTATE_TESTMODE; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_TESTMODE: { + if (LMIC.opmode & OP_TXDATA) { + // go back and wait some more. + newState = LMIC_COMPLIANCE_FSMSTATE_TXBUSY; + } + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_DEACTIVATE)) { + newState = LMIC_COMPLIANCE_FSMSTATE_INACTIVE; + } else if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_ECHO_REQUEST)) { + newState = LMIC_COMPLIANCE_FSMSTATE_ECHOING; + } else { + newState = LMIC_COMPLIANCE_FSMSTATE_REPORTING; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_ECHOING: { + if (fEntry) + acSendUplinkBuffer(); + + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE)) { + newState = LMIC_COMPLIANCE_FSMSTATE_RECOVERY; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_REPORTING: { + if (fEntry) + acSendUplink(); + + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE)) { + newState = LMIC_COMPLIANCE_FSMSTATE_RECOVERY; + } + break; + } + + case LMIC_COMPLIANCE_FSMSTATE_RECOVERY: { + if (fEntry) { + if (LMIC_Compliance.eventflags & (LMIC_COMPLIANCE_EVENT_DEACTIVATE | + LMIC_COMPLIANCE_EVENT_ECHO_REQUEST)) { + acSetTimer(sec2osticks(1)); + } else { + acSetTimer(sec2osticks(5)); + } + } + + if (eventflags_TestAndClear(LMIC_COMPLIANCE_EVENT_TIMER_EXPIRED)) { + newState = LMIC_COMPLIANCE_FSMSTATE_TESTMODE; + } + break; + } + + default: { + break; + } + } + + return newState; +} + +static void acEnterActiveMode(void) { + // indicate to the outer world that we're active. + LMIC_Compliance.state = LMIC_COMPLIANCE_STATE_ACTIVE; +} + +void acSetTimer(ostime_t delay) { + os_setTimedCallback(&LMIC_Compliance.timerJob, os_getTime() + delay, timerExpiredCb); +} + +static void timerExpiredCb(osjob_t *j) { + LMIC_API_PARAMETER(j); + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_TIMER_EXPIRED; + fsmEval(); +} + +static void lmicEventCb( + void *pUserData, + ev_t ev +) { + LMIC_API_PARAMETER(pUserData); + + // pass to user handler + if (LMIC_Compliance.saveEvent.pEventCb) { + LMIC_Compliance.saveEvent.pEventCb( + LMIC_Compliance.saveEvent.pUserData, ev + ); + } + + // if it's a EV_JOINED, or a TXCMOMPLETE, we should tell the FSM. + if ((UINT32_C(1) << ev) & (EV_JOINED | EV_TXCOMPLETE)) { + fsmEvalDeferred(); + } +} + + +static void acExitActiveMode(void) { + LMIC_Compliance.state = LMIC_COMPLIANCE_STATE_IDLE; + os_clearCallback(&LMIC_Compliance.timerJob); + LMIC_clrTxData(); +} + + +static void acSendUplink(void) { + uint8_t payload[2]; + uint32_t const downlink = LMIC_Compliance.downlinkCount; + + // build the uplink message + payload[0] = (uint8_t) (downlink >> 8); + payload[1] = (uint8_t) downlink; + + // reset the flags + LMIC_Compliance.eventflags &= ~LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE; + + // don't try to send if busy; might be sending echo message. + lmic_tx_error_t const eSend = + LMIC_sendWithCallback_strict( + LORAWAN_PORT_COMPLIANCE, + payload, sizeof(payload), + /* confirmed? */ + !! (LMIC_Compliance.fsmFlags & LMIC_COMPLIANCE_FSM_CONFIRM), + sendUplinkCompleteCb, NULL + ); + + if (eSend == LMIC_ERROR_SUCCESS) { + // queued successfully + LMIC_COMPLIANCE_PRINTF( + "lmic_compliance.%s: queued uplink message(%u, %p)\n", + __func__, + (unsigned) downlink & 0xFFFF, + LMIC.client.txMessageCb + ); + } else { + // failed to queue; just skip this cycle. + LMIC_COMPLIANCE_PRINTF( + "lmic_compliance.%s: error(%d) sending uplink message(%u), %u bytes\n", + __func__, + eSend, + (unsigned) downlink & 0xFFFF, + (unsigned) sizeof(payload) + ); + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE; + fsmEval(); + } +} + +static void sendUplinkCompleteCb(void *pUserData, int fSuccess) { + LMIC_API_PARAMETER(pUserData); + LMIC_API_PARAMETER(fSuccess); + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE; + LMIC_COMPLIANCE_PRINTF("%s(%s)\n", __func__, LMICcompliance_txSuccessToString(fSuccess)); + fsmEvalDeferred(); +} + +static void acSendUplinkBuffer(void) { + // send uplink data. + lmic_tx_error_t const eSend = + LMIC_sendWithCallback_strict( + LORAWAN_PORT_COMPLIANCE, + LMIC_Compliance.uplinkMessage, LMIC_Compliance.uplinkSize, + /* confirmed? */ (LMIC_Compliance.fsmFlags & LMIC_COMPLIANCE_FSM_CONFIRM) != 0, + sendUplinkCompleteCb, + NULL); + + if (eSend == LMIC_ERROR_SUCCESS) { + LMIC_COMPLIANCE_PRINTF("%s: queued %u bytes\n", __func__, LMIC_Compliance.uplinkSize); + } else { + LMIC_COMPLIANCE_PRINTF("%s: uplink %u bytes failed (error %d)\n", __func__, LMIC_Compliance.uplinkSize, eSend); + if (eSend == LMIC_ERROR_TX_NOT_FEASIBLE) { + // Reverse the increment of the downlink count. Needed for US compliance. + if (CFG_region == LMIC_REGION_us915) + --LMIC_Compliance.downlinkCount; + } + LMIC_Compliance.eventflags |= LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE; + fsmEval(); + } +} + +const char *LMICcompliance_txSuccessToString(int fSuccess) { + return fSuccess ? "ok" : "failed"; +} diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.h new file mode 100644 index 0000000..8efe0e8 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_compliance.h @@ -0,0 +1,138 @@ +/* + +Module: lmic_compliance.h + +Function: + Internal header file for compliance-related work. + +Copyright notice and license info: + See LICENSE file accompanying this project. + +Author: + Terry Moore, MCCI Corporation March 2019 + +Description: + This header file allows us to break up the compliance + functions into multiple .c files if we wish. + +*/ + +#ifndef _lmic_compliance_h_ /* prevent multiple includes */ +#define _lmic_compliance_h_ + +#ifdef __cplusplus +extern "C"{ +#endif + +#ifndef _lmic_h_ +# include "lmic.h" +#endif + +#include <stdbool.h> +#include <stdint.h> + +typedef struct lmic_compliance_s lmic_compliance_t; + +// concrete type for the state enumeration for the compliance engine. +typedef uint8_t lmic_compliance_state_t; + +enum lmic_compliance_state_e { + LMIC_COMPLIANCE_STATE_IDLE = 0, // app state + LMIC_COMPLIANCE_STATE_STOPPING = 1, // transitioning back to app + LMIC_COMPLIANCE_STATE_ACTIVATING = 2, // transitioning to compliance state + LMIC_COMPLIANCE_STATE_ACTIVE = 3, // in compliance state +}; + +// return true if a state value indicates that the FSM is active. +static inline bool +lmic_compliance_state_IsActive(lmic_compliance_state_t s) { + return s >= LMIC_COMPLIANCE_STATE_ACTIVATING; +} + +// events from the outside world to the FSM +typedef uint8_t lmic_compliance_eventflags_t; + +enum lmic_compliance_eventflags_e { + LMIC_COMPLIANCE_EVENT_ACTIVATE = 1u << 0, + LMIC_COMPLIANCE_EVENT_DEACTIVATE = 1u << 1, + LMIC_COMPLIANCE_EVENT_TIMER_EXPIRED = 1u << 2, + LMIC_COMPLIANCE_EVENT_UPLINK_COMPLETE = 1u << 3, + LMIC_COMPLIANCE_EVENT_ECHO_REQUEST = 1u << 4, +}; + +typedef uint8_t lmic_compliance_fsmflags_t; +enum lmic_compliance_fsmflags_e { + LMIC_COMPLIANCE_FSM_ACTIVE = 1u << 0, + LMIC_COMPLIANCE_FSM_REENTERED = 1u << 1, + LMIC_COMPLIANCE_FSM_CONFIRM = 1u << 2, +}; + +typedef uint8_t lmic_compliance_fsmstate_t; +enum lmic_compliance_fsmstate_e { + LMIC_COMPLIANCE_FSMSTATE_INITIAL = 0, + LMIC_COMPLIANCE_FSMSTATE_NOCHANGE = 1, + LMIC_COMPLIANCE_FSMSTATE_ACTIVE = 2, + LMIC_COMPLIANCE_FSMSTATE_INACTIVE = 3, + LMIC_COMPLIANCE_FSMSTATE_TESTMODE = 4, // sending test uplinks + LMIC_COMPLIANCE_FSMSTATE_ECHOING = 5, + LMIC_COMPLIANCE_FSMSTATE_REPORTING = 6, + LMIC_COMPLIANCE_FSMSTATE_RECOVERY = 7, + LMIC_COMPLIANCE_FSMSTATE_TXBUSY = 8, +}; + +#define LMIC_COMPLIANCE_FSMSTATE__NAMES \ + "INITIAL", "NOCHANGE", "ACTIVE", "INACTIVE", "TESTMODE", \ + "ECHOING", "REPORTING", "RECOVERY", "TXBUSY" + +typedef struct lmic_compliance_eventcb_s lmic_compliance_eventcb_t; +struct lmic_compliance_eventcb_s { + // save the user's event CB while active. + lmic_event_cb_t *pEventCb; + // save the user's event data while active. + void *pUserData; +}; + +// structure for saving band settings during test +typedef struct lmic_compliance_band_s lmic_compliance_band_t; +struct lmic_compliance_band_s { + u2_t txcap; // saved 1/duty cycle +}; + +// the state of the compliance engine. +struct lmic_compliance_s { + // uint64 + // uintptr + osjob_t timerJob; // the job for driving uplinks + osjob_t fsmJob; // job for reevaluating the FSM. + lmic_compliance_eventcb_t saveEvent; // the user's event handler. + + // uint32 + + // uint16 +#if CFG_LMIC_EU_like + lmic_compliance_band_t saveBands[MAX_BANDS]; +#endif // CFG_LMIC_EU_like + + // we are required to maintain a downlink count + // that is reset on join/test entry and incremented for + // each valid test message. + uint16_t downlinkCount; + + // uint8 + + lmic_compliance_state_t state; // current state of compliance engine. + lmic_compliance_eventflags_t eventflags; // incoming events. + lmic_compliance_fsmflags_t fsmFlags; // FSM operational flags + lmic_compliance_fsmstate_t fsmState; // FSM current state + + uint8_t uplinkSize; + uint8_t uplinkMessage[MAX_LEN_PAYLOAD]; +}; + +extern lmic_compliance_t LMIC_Compliance; + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif /* _lmic_compliance_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_config_preconditions.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_config_preconditions.h new file mode 100644 index 0000000..3f6ac8b --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_config_preconditions.h @@ -0,0 +1,289 @@ +/* lmic_config_preconditions.h Fri May 19 2017 23:58:34 tmm */ + +/* + +Module: lmic_config_preconditions.h + +Function: + Preconditions for LMIC configuration. + +Version: + V2.0.0 Sun Aug 06 2017 17:40:44 tmm Edit level 1 + +Copyright notice: + This file copyright (C) 2017 by + + MCCI Corporation + 3520 Krums Corners Road + Ithaca, NY 14850 + + MIT License + + Permission is hereby granted, free of charge, to any person obtaining a copy + of this software and associated documentation files (the "Software"), to deal + in the Software without restriction, including without limitation the rights + to use, copy, modify, merge, publish, distribute, sublicense, and/or sell + copies of the Software, and to permit persons to whom the Software is + furnished to do so, subject to the following conditions: + + The above copyright notice and this permission notice shall be included in all + copies or substantial portions of the Software. + + THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR + IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE + AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER + LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, + OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE + SOFTWARE. + +Author: + Terry Moore, MCCI Corporation July 2017 + +Revision history: + 2.0.0 Sun Aug 06 2017 17:40:44 tmm + Module created. + +*/ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# define _LMIC_CONFIG_PRECONDITIONS_H_ + +// We need to be able to compile with different options without editing source. +// When building with a more advanced environment, set the following variable: +// ARDUINO_LMIC_PROJECT_CONFIG_H=my_project_config.h +// +// otherwise the lmic_project_config.h from the ../../project_config directory will be used. +#ifndef ARDUINO_LMIC_PROJECT_CONFIG_H +# define ARDUINO_LMIC_PROJECT_CONFIG_H ../../project_config/lmic_project_config.h +#endif + +#define CFG_TEXT_1(x) CFG_TEXT_2(x) +#define CFG_TEXT_2(x) #x + +// constants for comparison +#define LMIC_REGION_eu868 1 +#define LMIC_REGION_us915 2 +#define LMIC_REGION_cn783 3 +#define LMIC_REGION_eu433 4 +#define LMIC_REGION_au915 5 +#define LMIC_REGION_cn490 6 +#define LMIC_REGION_as923 7 +#define LMIC_REGION_kr920 8 +#define LMIC_REGION_in866 9 + +// Some regions have country-specific overrides. For generality, we specify +// country codes using the LMIC_COUNTY_CODE_C() macro These values are chosen +// from the 2-letter domain suffixes standardized by ISO-3166-1 alpha2 (see +// https://en.wikipedia.org/wiki/ISO_3166-1_alpha-2). They are therefore +// 16-bit constants. By convention, we use UPPER-CASE letters, thus +// LMIC_COUNTRY_CODE('J', 'P'), not ('j', 'p'). +#define LMIC_COUNTRY_CODE_C(c1, c2) ((c1) * 256 + (c2)) + +// this special code means "no country code defined" +#define LMIC_COUNTRY_CODE_NONE 0 + +// specific countries. Only the ones that are needed by the code are defined. +#define LMIC_COUNTRY_CODE_JP LMIC_COUNTRY_CODE_C('J', 'P') + +// include the file that the user is really supposed to edit. But for really strange +// ports, this can be suppressed +#ifndef ARDUINO_LMIC_PROJECT_CONFIG_H_SUPPRESS +# include CFG_TEXT_1(ARDUINO_LMIC_PROJECT_CONFIG_H) +#endif /* ARDUINO_LMIC_PROJECT_CONFIG_H_SUPPRESS */ + +#if defined(CFG_au921) && !defined(CFG_au915) +# warning "CFG_au921 was deprecated in favour of CFG_au915. Support for CFG_au921 might be removed in the future." +# define CFG_au915 +#endif + +// for backwards compatibility to legacy code, define CFG_au921 if we see CFG_au915. +#if defined(CFG_au915) && !defined(CFG_au921) +# define CFG_au921 +#endif + +// a mask of the supported regions +// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +// user-editable. +#define LMIC_REGIONS_SUPPORTED ( \ + (1 << LMIC_REGION_eu868) | \ + (1 << LMIC_REGION_us915) | \ + /* (1 << LMIC_REGION_cn783) | */ \ + /* (1 << LMIC_REGION_eu433) | */ \ + (1 << LMIC_REGION_au915) | \ + /* (1 << LMIC_REGION_cn490) | */ \ + (1 << LMIC_REGION_as923) | \ + (1 << LMIC_REGION_kr920) | \ + (1 << LMIC_REGION_in866) | \ + 0) + +// the selected region. +// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +// user-editable. +#if defined(CFG_eu868) +# define CFG_region LMIC_REGION_eu868 +#elif defined(CFG_us915) +# define CFG_region LMIC_REGION_us915 +#elif defined(CFG_cn783) +# define CFG_region LMIC_REGION_cn783 +#elif defined(CFG_eu433) +# define CFG_region LMIC_REGION_eu433 +#elif defined(CFG_au915) +# define CFG_region LMIC_REGION_au915 +#elif defined(CFG_cn490) +# define CFG_region LMIC_REGION_cn490 +#elif defined(CFG_as923jp) +# define CFG_as923 1 /* CFG_as923jp implies CFG_as923 */ +# define CFG_region LMIC_REGION_as923 +# define LMIC_COUNTRY_CODE LMIC_COUNTRY_CODE_JP +#elif defined(CFG_as923) +# define CFG_region LMIC_REGION_as923 +#elif defined(CFG_kr920) +# define CFG_region LMIC_REGION_kr920 +#elif defined(CFG_in866) +# define CFG_region LMIC_REGION_in866 +#else +# define CFG_region 0 +#endif + +// LMIC_CFG_*_ENA -- either 1 or 0 based on whether that region +// is enabled. Note: these must be after the code that special-cases +// CFG_as923jp. +#if defined(CFG_eu868) +# define LMIC_CFG_eu868_ENA 1 +#else +# define LMIC_CFG_eu868_ENA 0 +#endif + +#if defined(CFG_us915) +# define LMIC_CFG_us915_ENA 1 +#else +# define LMIC_CFG_us915_ENA 0 +#endif + +#if defined(CFG_cn783) +# define LMIC_CFG_cn783_ENA 1 +#else +# define LMIC_CFG_cn783_ENA 0 +#endif + +#if defined(CFG_eu433) +# define LMIC_CFG_eu433_ENA 1 +#else +# define LMIC_CFG_eu433_ENA 0 +#endif + +#if defined(CFG_au915) +# define LMIC_CFG_au915_ENA 1 +#else +# define LMIC_CFG_au915_ENA 0 +#endif + +#if defined(CFG_cn490) +# define LMIC_CFG_cn490_ENA 1 +#else +# define LMIC_CFG_cn490_ENA 0 +#endif + +#if defined(CFG_as923) +# define LMIC_CFG_as923_ENA 1 +#else +# define LMIC_CFG_as923_ENA 0 +#endif + +#if defined(CFG_kr920) +# define LMIC_CFG_kr920_ENA 1 +#else +# define LMIC_CFG_kr920_ENA 0 +#endif + +#if defined(CFG_in866) +# define LMIC_CFG_in866_ENA 1 +#else +# define LMIC_CFG_in866_ENA 0 +#endif + +/// \brief Bitmask of configured regions +/// +/// Our input is a -D of one of CFG_eu868, CFG_us915, CFG_as923, CFG_au915, CFG_in866 +/// More will be added in the the future. So at this point we create CFG_region with +/// following values. These are in order of the sections in the manual. Not all of the +/// below are supported yet. +/// +/// CFG_as923jp is treated as a special case of CFG_as923, so it's not included in +/// the below. +/// +/// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +/// user-editable. +/// +# define CFG_LMIC_REGION_MASK \ + ((LMIC_CFG_eu868_ENA << LMIC_REGION_eu868) | \ + (LMIC_CFG_us915_ENA << LMIC_REGION_us915) | \ + (LMIC_CFG_cn783_ENA << LMIC_REGION_cn783) | \ + (LMIC_CFG_eu433_ENA << LMIC_REGION_eu433) | \ + (LMIC_CFG_au915_ENA << LMIC_REGION_au915) | \ + (LMIC_CFG_cn490_ENA << LMIC_REGION_cn490) | \ + (LMIC_CFG_as923_ENA << LMIC_REGION_as923) | \ + (LMIC_CFG_kr920_ENA << LMIC_REGION_kr920) | \ + (LMIC_CFG_in866_ENA << LMIC_REGION_in866) | \ + 0) + +/// \brief a bitmask of EU-like regions +/// +/// EU-like regions have up to 16 channels individually programmable via downlink. +/// +/// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +/// user-editable. +#define CFG_LMIC_EU_like_MASK ( \ + (1 << LMIC_REGION_eu868) | \ + /* (1 << LMIC_REGION_us915) | */ \ + (1 << LMIC_REGION_cn783) | \ + (1 << LMIC_REGION_eu433) | \ + /* (1 << LMIC_REGION_au915) | */ \ + /* (1 << LMIC_REGION_cn490) | */ \ + (1 << LMIC_REGION_as923) | \ + (1 << LMIC_REGION_kr920) | \ + (1 << LMIC_REGION_in866) | \ + 0) + +/// \brief bitmask of` US-like regions +/// +/// US-like regions have 64 fixed 125-kHz channels overlaid by 8 500-kHz +/// channels. The channel frequencies can't be changed, but +/// subsets of channels can be selected via masks. +/// +/// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +/// user-editable. +#define CFG_LMIC_US_like_MASK ( \ + /* (1 << LMIC_REGION_eu868) | */ \ + (1 << LMIC_REGION_us915) | \ + /* (1 << LMIC_REGION_cn783) | */ \ + /* (1 << LMIC_REGION_eu433) | */ \ + (1 << LMIC_REGION_au915) | \ + /* (1 << LMIC_REGION_cn490) | */ \ + /* (1 << LMIC_REGION_as923) | */ \ + /* (1 << LMIC_REGION_kr920) | */ \ + /* (1 << LMIC_REGION_in866) | */ \ + 0) + +// +// booleans that are true if the configured region is EU-like or US-like. +// TODO(tmm@mcci.com) consider moving this block to a central file as it's not +// user-editable. +// + +/// \brief true if configured region is EU-like, false otherwise. +#define CFG_LMIC_EU_like (!!(CFG_LMIC_REGION_MASK & CFG_LMIC_EU_like_MASK)) +/// \brief true if configured region is US-like, false otherwise. +#define CFG_LMIC_US_like (!!(CFG_LMIC_REGION_MASK & CFG_LMIC_US_like_MASK)) + +// +// The supported LMIC LoRaWAN spec versions. These need to be numerically ordered, +// so that we can (for example) compare +// +// LMIC_LORAWAN_SPEC_VERSION < LMIC_LORAWAN_SPEC_VERSION_1_0_3. +// +#define LMIC_LORAWAN_SPEC_VERSION_1_0_2 0x01000200u /// Refers to LoRaWAN spec 1.0.2 +#define LMIC_LORAWAN_SPEC_VERSION_1_0_3 0x01000300u /// Refers to LoRaWAN spec 1.0.3 + +#endif /* _LMIC_CONFIG_PRECONDITIONS_H_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_env.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_env.h new file mode 100644 index 0000000..06793e0 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_env.h @@ -0,0 +1,251 @@ +/* + +Module: lmic_env.h + +Function: + Sets up macros etc. to make things a little easier for portabilty + +Copyright notice and license info: + See LICENSE file accompanying this project. + +Author: + Terry Moore, MCCI Corporation November 2018 + +Description: + This file is an adaptation of MCCI's standard IOCTL framework. + We duplicate a bit of functionality that we might get from other + libraries, so that the LMIC library can continue to stand alone. + +*/ + +#ifndef _lmic_env_h_ /* prevent multiple includes */ +#define _lmic_env_h_ + +/* + +Macro: LMIC_C_ASSERT() + +Function: + Declaration-like macro that will cause a compile error if arg is FALSE. + +Definition: + LMIC_C_ASSERT( + BOOL fErrorIfFalse + ); + +Description: + This macro, if used where an external reference declarataion is + permitted, will either compile cleanly, or will cause a compilation + error. The results of using this macro where a declaration is not + permitted are unspecified. + + This is different from #if !(fErrorIfFalse) / #error in that the + expression is evaluated by the compiler rather than by the pre- + processor. Therefore things like sizeof() can be used. + +Returns: + No explicit result -- either compiles cleanly or causes a compile + error. + +*/ + +#ifndef LMIC_C_ASSERT +# define LMIC_C_ASSERT(e) \ + void LMIC_C_ASSERT__(int LMIC_C_ASSERT_x[(e) ? 1: -1]) +#endif + +/****************************************************************************\ +| +| Define the begin/end declaration tags for C++ co-existance +| +\****************************************************************************/ + +#ifdef __cplusplus +# define LMIC_BEGIN_DECLS extern "C" { +# define LMIC_END_DECLS } +#else +# define LMIC_BEGIN_DECLS /* nothing */ +# define LMIC_END_DECLS /* nothing */ +#endif + +//---------------------------------------------------------------------------- +// Annotations to avoid various "unused" warnings. These must appear as a +// statement in the function body; the macro annotates the variable to quiet +// compiler warnings. The way this is done is compiler-specific, and so these +// definitions are fall-backs, which might be overridden. +// +// Although these are all similar, we don't want extra macro expansions, +// so we define each one explicitly rather than relying on a common macro. +//---------------------------------------------------------------------------- + +// signal that a parameter is intentionally unused. +#ifndef LMIC_UNREFERENCED_PARAMETER +# define LMIC_UNREFERENCED_PARAMETER(v) do { (void) (v); } while (0) +#endif + +// an API parameter is a parameter that is required by an API definition, but +// happens to be unreferenced in this implementation. This is a stronger +// assertion than LMIC_UNREFERENCED_PARAMETER(): this parameter is here +// becuase of an API contract, but we have no use for it in this function. +#ifndef LMIC_API_PARAMETER +# define LMIC_API_PARAMETER(v) do { (void) (v); } while (0) +#endif + +// an intentionally-unreferenced variable. +#ifndef LMIC_UNREFERENCED_VARIABLE +# define LMIC_UNREFERENCED_VARIABLE(v) do { (void) (v); } while (0) +#endif + +// we have three (!) debug levels (LMIC_DEBUG_LEVEL > 0, LMIC_DEBUG_LEVEL > 1, +// and LMIC_X_DEBUG_LEVEL > 0. In each case we might have parameters or +// or varables that are only refereneced at the target debug level. + +// Parameter referenced only if debugging at level > 0. +#ifndef LMIC_DEBUG1_PARAMETER +# if LMIC_DEBUG_LEVEL > 0 +# define LMIC_DEBUG1_PARAMETER(v) do { ; } while (0) +# else +# define LMIC_DEBUG1_PARAMETER(v) do { (void) (v); } while (0) +# endif +#endif + +// variable referenced only if debugging at level > 0 +#ifndef LMIC_DEBUG1_VARIABLE +# if LMIC_DEBUG_LEVEL > 0 +# define LMIC_DEBUG1_VARIABLE(v) do { ; } while (0) +# else +# define LMIC_DEBUG1_VARIABLE(v) do { (void) (v); } while (0) +# endif +#endif + +// parameter referenced only if debugging at level > 1 +#ifndef LMIC_DEBUG2_PARAMETER +# if LMIC_DEBUG_LEVEL > 1 +# define LMIC_DEBUG2_PARAMETER(v) do { ; } while (0) +# else +# define LMIC_DEBUG2_PARAMETER(v) do { (void) (v); } while (0) +# endif +#endif + +// variable referenced only if debugging at level > 1 +#ifndef LMIC_DEBUG2_VARIABLE +# if LMIC_DEBUG_LEVEL > 1 +# define LMIC_DEBUG2_VARIABLE(v) do { ; } while (0) +# else +# define LMIC_DEBUG2_VARIABLE(v) do { (void) (v); } while (0) +# endif +#endif + +// parameter referenced only if LMIC_X_DEBUG_LEVEL > 0 +#ifndef LMIC_X_DEBUG_PARAMETER +# if LMIC_X_DEBUG_LEVEL > 0 +# define LMIC_X_DEBUG_PARAMETER(v) do { ; } while (0) +# else +# define LMIC_X_DEBUG_PARAMETER(v) do { (void) (v); } while (0) +# endif +#endif + +// variable referenced only if LMIC_X_DEBUG_LEVEL > 0 +#ifndef LMIC_X_DEBUG_VARIABLE +# if LMIC_X_DEBUG_LEVEL > 0 +# define LMIC_X_DEBUG_VARIABLE(v) do { ; } while (0) +# else +# define LMIC_X_DEBUG_VARIABLE(v) do { (void) (v); } while (0) +# endif +#endif + +// parameter referenced only if EV() macro is enabled (which it never is) +// TODO(tmm@mcci.com) take out the EV() framework as it reuqires C++, and +// this code is really C-99 to its bones. +#ifndef LMIC_EV_PARAMETER +# define LMIC_EV_PARAMETER(v) do { (void) (v); } while (0) +#endif + +// variable referenced only if EV() macro is defined. +#ifndef LMIC_EV_VARIABLE +# define LMIC_EV_VARIABLE(v) do { (void) (v); } while (0) +#endif + + /* + +Macro: LMIC_ABI_STD + +Index: Macro: LMIC_ABI_VARARGS + +Function: + Annotation macros to force a particular binary calling sequence. + +Definition: + #define LMIC_ABI_STD compiler-specific + #define LMIC_ABI_VARARGS compiler-specific + +Description: + These macros are used when declaring a function type, and indicate + that a particular calling sequence is to be used. They are normally + used between the type portion of the function declaration and the + name of the function. For example: + + typedef void LMIC_ABI_STD myCallBack_t(void); + + It's important to use this in libraries on platforms with multiple + calling sequences, because different components can be compiled with + different defaults. + +Returns: + Not applicable. + +*/ + +/* ABI marker for normal (fixed parameter count) functions -- used for function types */ +#ifndef LMIC_ABI_STD +# ifdef _MSC_VER +# define LMIC_ABI_STD __stdcall +# else +# define LMIC_ABI_STD /* nothing */ +# endif +#endif + +/* ABI marker for VARARG functions -- used for function types */ +#ifndef LMIC_ABI_VARARGS +# ifdef _MSC_VER +# define LMIC_ABI_VARARGS __cdecl +# else +# define LMIC_ABI_VARARGS /* nothing */ +# endif +#endif + +/* + +Macro: LMIC_DECLARE_FUNCTION_WEAK() + +Function: + Declare an external function as a weak reference. + +Definition: + #define LMIC_DECLARE_FUNCTION_WEAK(ReturnType, FunctionName, Params) ... + +Description: + This macro generates a weak reference to the specified function. + +Example: + LMIC_DECLARE_FUNCTION_WEAK(void, onEvent, (ev_t e)); + + This saya that onEvent is a weak external reference. When calling + onEvent, you must always first check whether it's supplied: + + if (onEvent != NULL) + onEvent(e); + +Returns: + This macro expands to a declaration, without a trailing semicolon. + +Notes: + This form allows for compilers that use _Pragma(weak, name) instead + of inline attributes. + +*/ + +#define LMIC_DECLARE_FUNCTION_WEAK(a_ReturnType, a_FunctionName, a_Params) \ + a_ReturnType __attribute__((__weak__)) a_FunctionName a_Params + +#endif /* _lmic_env_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu868.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu868.c new file mode 100644 index 0000000..c8653cb --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu868.c @@ -0,0 +1,381 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_eu868) +// ================================================================================ +// +// BEG: EU868 related stuff +// + +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, + (u1_t)MAKERPS(SF12, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF11, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF10, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF9, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF8, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF7, BW125, CR_4_5, 0, 0), + (u1_t)MAKERPS(SF7, BW250, CR_4_5, 0, 0), + (u1_t)MAKERPS(FSK, BW125, CR_4_5, 0, 0), + ILLEGAL_RPS +}; + +bit_t +LMICeu868_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +static CONST_TABLE(u1_t, maxFrameLens)[] = { + 59+5, 59+5, 59+5, 123+5, 250+5, 250+5, 250+5, 250+5 +}; + +uint8_t LMICeu868_maxFrameLen(uint8_t dr) { + if (dr < LENOF_TABLE(maxFrameLens)) + return TABLE_GET_U1(maxFrameLens, dr); + else + return 0; +} + +static CONST_TABLE(s1_t, TXPOWLEVELS)[] = { + 16, 14, 12, 10, 8, 6, 4, 2 +}; + +int8_t LMICeu868_pow2dBm(uint8_t mcmd_ladr_p1) { + uint8_t const pindex = (mcmd_ladr_p1&MCMD_LinkADRReq_POW_MASK)>>MCMD_LinkADRReq_POW_SHIFT; + if (pindex < LENOF_TABLE(TXPOWLEVELS)) { + return TABLE_GET_S1(TXPOWLEVELS, pindex); + } else { + return -128; + } +} + +// only used in this module, but used by variant macro dr2hsym(). +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 7), // DR_SF12 + us2osticksRound(128 << 6), // DR_SF11 + us2osticksRound(128 << 5), // DR_SF10 + us2osticksRound(128 << 4), // DR_SF9 + us2osticksRound(128 << 3), // DR_SF8 + us2osticksRound(128 << 2), // DR_SF7 + us2osticksRound(128 << 1), // DR_SF7B + us2osticksRound(80) // FSK -- time for 1/2 byte (unused by LMIC) +}; + +ostime_t LMICeu868_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, dr); +} + + +enum { NUM_DEFAULT_CHANNELS = 3 }; +static CONST_TABLE(u4_t, iniChannelFreq)[6] = { + // Join frequencies and duty cycle limit (0.1%) + EU868_F1 | BAND_MILLI, EU868_F2 | BAND_MILLI, EU868_F3 | BAND_MILLI, + // Default operational frequencies and duty cycle limit (1%) + EU868_F1 | BAND_CENTI, EU868_F2 | BAND_CENTI, EU868_F3 | BAND_CENTI, +}; + +void LMICeu868_initDefaultChannels(bit_t join) { + os_clearMem(&LMIC.channelFreq, sizeof(LMIC.channelFreq)); +#if !defined(DISABLE_MCMD_DlChannelReq) + os_clearMem(&LMIC.channelDlFreq, sizeof(LMIC.channelDlFreq)); +#endif // !DISABLE_MCMD_DlChannelReq + os_clearMem(&LMIC.channelDrMap, sizeof(LMIC.channelDrMap)); + os_clearMem(&LMIC.bands, sizeof(LMIC.bands)); + + LMIC.channelMap = (1 << NUM_DEFAULT_CHANNELS) - 1; + u1_t su = join ? 0 : NUM_DEFAULT_CHANNELS; + for (u1_t fu = 0; fu<NUM_DEFAULT_CHANNELS; fu++, su++) { + LMIC.channelFreq[fu] = TABLE_GET_U4(iniChannelFreq, su); + // TODO(tmm@mcci.com): don't use EU DR directly, use something from the LMIC context or a static const + LMIC.channelDrMap[fu] = DR_RANGE_MAP(EU868_DR_SF12, EU868_DR_SF7); + } + + (void) LMIC_setupBand(BAND_MILLI, 14 /* dBm */, 1000 /* 0.1% */); + (void) LMIC_setupBand(BAND_CENTI, 14 /* dBm */, 100 /* 1% */); + (void) LMIC_setupBand(BAND_DECI, 27 /* dBm */, 10 /* 10% */); +} + +bit_t LMIC_setupBand(u1_t bandidx, s1_t txpow, u2_t txcap) { + if (bandidx > BAND_AUX) return 0; + //band_t* b = &LMIC.bands[bandidx]; + xref2band_t b = &LMIC.bands[bandidx]; + b->txpow = txpow; + b->txcap = txcap; + b->avail = os_getTime(); + b->lastchnl = os_getRndU1() % MAX_CHANNELS; + return 1; +} + +// this table is from highest to lowest +static CONST_TABLE(u4_t, bandAssignments)[] = { + 870000000 /* .. and above */ | BAND_MILLI, + 869700000 /* .. 869700000 */ | BAND_CENTI, + 869650000 /* .. 869700000 */ | BAND_MILLI, + 869400000 /* .. 869650000 */ | BAND_DECI, + 868600000 /* .. 869640000 */ | BAND_MILLI, + 865000000 /* .. 868400000 */ | BAND_CENTI, +}; + +/// +/// \brief query number of default channels. +/// +u1_t LMIC_queryNumDefaultChannels() { + return NUM_DEFAULT_CHANNELS; +} + +/// +/// \brief LMIC_setupChannel for EU 868 +/// +/// \note according to LoRaWAN 1.0.3 section 5.6, "the acceptable range +/// for **ChIndex** is N to 16", where N is our \c NUM_DEFAULT_CHANNELS. +/// This routine is used internally for MAC commands, so we enforce +/// this for the extenal API as well. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + // zero the band bits in freq, just in case. + freq &= ~3; + + if (chidx < NUM_DEFAULT_CHANNELS) { + // can't do anything to a default channel. + return 0; + } + bit_t fEnable = (freq != 0); + if (chidx >= MAX_CHANNELS) + return 0; + + if (band == -1) { + for (u1_t i = 0; i < LENOF_TABLE(bandAssignments); ++i) { + const u4_t thisFreqBand = TABLE_GET_U4(bandAssignments, i); + const u4_t thisFreq = thisFreqBand & ~3; + if (freq >= thisFreq) { + band = ((u1_t)thisFreqBand & 3); + break; + } + } + + // if we didn't identify a frequency, it's millis. + if (band == -1) { + band = BAND_MILLI; + } + } + + if ((u1_t)band > BAND_AUX) + return 0; + + freq |= band; + + LMIC.channelFreq[chidx] = freq; + LMIC.channelDrMap[chidx] = drmap == 0 ? DR_RANGE_MAP(EU868_DR_SF12, EU868_DR_SF7) : drmap; + if (fEnable) + LMIC.channelMap |= 1 << chidx; // enabled right away + else + LMIC.channelMap &= ~(1 << chidx); + return 1; +} + + + +u4_t LMICeu868_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < EU868_FREQ_MIN || freq > EU868_FREQ_MAX) + freq = 0; + return freq; +} + +ostime_t LMICeu868_nextJoinTime(ostime_t time) { + // is the avail time in the future? + if ((s4_t) (time - LMIC.bands[BAND_MILLI].avail) < 0) + // yes: then wait until then. + time = LMIC.bands[BAND_MILLI].avail; + + return time; +} + +/// +/// \brief change the TX channel given the desired tx time. +/// +/// \param [in] now is the time at which we want to transmit. In fact, it's always +/// the current time. +/// +/// \returns the actual time at which we can transmit. \c LMIC.txChnl is set to the +/// selected channel. +/// +/// \details +/// We scan all the channels, creating a mask of all enabled channels that are +/// feasible at the earliest possible time. We then randomly choose one from +/// that, updating the shuffle mask. +/// +/// One sublety is that we have to cope with an artifact of the shuffler. +/// It will zero out bits for candidates that are real candidates, but +/// not in the time window, and not consider them as early as it should. +/// So we keep a mask of all feasible channels, and make sure that they +/// remain set in the shuffle mask if appropriate. +/// +ostime_t LMICeu868_nextTx(ostime_t now) { + ostime_t mintime = now + /*8h*/sec2osticks(28800); + u2_t availMap; + u2_t feasibleMap; + u1_t bandMap; + + // set mintime to the earliest time of all enabled channels + // (can't just look at bands); and for a given channel, we + // can't tell if we're ready till we've checked all possible + // avail times. + bandMap = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + u2_t chnlBit = 1 << chnl; + + // none at any higher numbers? + if (LMIC.channelMap < chnlBit) + break; + + // not enabled? + if ((LMIC.channelMap & chnlBit) == 0) + continue; + + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + + u1_t const band = LMIC.channelFreq[chnl] & 0x3; + u1_t const thisBandBit = 1 << band; + // already considered? + if ((bandMap & thisBandBit) != 0) + continue; + + // consider this band. + bandMap |= thisBandBit; + + // enabled, not considered, feasible: adjust the min time. + if ((s4_t)(mintime - LMIC.bands[band].avail) > 0) + mintime = LMIC.bands[band].avail; + } + + // make a mask of candidates available for use + availMap = 0; + feasibleMap = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + u2_t chnlBit = 1 << chnl; + + // none at any higher numbers? + if (LMIC.channelMap < chnlBit) + break; + + // not enabled? + if ((LMIC.channelMap & chnlBit) == 0) + continue; + + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + + // This channel is feasible. But might not be available. + feasibleMap |= chnlBit; + + // not available yet? + u1_t const band = LMIC.channelFreq[chnl] & 0x3; + if ((s4_t)(LMIC.bands[band].avail - mintime) > 0) + continue; + + // ok: this is a candidate. + availMap |= chnlBit; + } + + // find the next available chennel. + u2_t saveShuffleMap = LMIC.channelShuffleMap; + int candidateCh = LMIC_findNextChannel(&LMIC.channelShuffleMap, &availMap, 1, LMIC.txChnl == 0xFF ? -1 : LMIC.txChnl); + + // restore bits in the shuffleMap that were on, but might have reset + // if availMap was used to refresh shuffleMap. These are channels that + // are feasble but not yet candidates due to band saturation + LMIC.channelShuffleMap |= saveShuffleMap & feasibleMap & ~availMap; + + if (candidateCh >= 0) { + // update the channel; otherwise we'll just use the + // most recent one. + LMIC.txChnl = candidateCh; + } + return mintime; +} + + +#if !defined(DISABLE_BEACONS) +void LMICeu868_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = LMIC.channelFreq[LMIC.bcnChnl] & ~(u4_t)3; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +#if !defined(DISABLE_JOIN) +ostime_t LMICeu868_nextJoinState(void) { + return LMICeulike_nextJoinState(NUM_DEFAULT_CHANNELS); +} +#endif // !DISABLE_JOIN + +// set the Rx1 dndr, rps. +void LMICeu868_setRx1Params(void) { + u1_t const txdr = LMIC.dndr; + s1_t drOffset; + s1_t candidateDr; + + LMICeulike_setRx1Freq(); + + if ( LMIC.rx1DrOffset <= 5) + drOffset = (s1_t) LMIC.rx1DrOffset; + else + // make a reasonable assumption for unspecified value. + drOffset = 5; + + candidateDr = (s1_t) txdr - drOffset; + if (candidateDr < LORAWAN_DR0) + candidateDr = 0; + else if (candidateDr > LORAWAN_DR7) + candidateDr = LORAWAN_DR7; + + LMIC.dndr = (u1_t) candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +void +LMICeu868_initJoinLoop(void) { + LMICeulike_initJoinLoop(NUM_DEFAULT_CHANNELS, /* adr dBm */ EU868_TX_EIRP_MAX_DBM); +} + +// +// END: EU868 related stuff +// +// ================================================================================ +#endif
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.c new file mode 100644 index 0000000..733ff3c --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.c @@ -0,0 +1,297 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if CFG_LMIC_EU_like + +bit_t LMIC_enableSubBand(u1_t band) { + LMIC_API_PARAMETER(band); + return 0; +} + +bit_t LMIC_disableSubBand(u1_t band) { + LMIC_API_PARAMETER(band); + return 0; +} + +bit_t LMIC_disableChannel(u1_t channel) { + u2_t old_chmap = LMIC.channelMap; + LMIC.channelFreq[channel] = 0; + LMIC.channelDrMap[channel] = 0; + LMIC.channelMap = old_chmap & ~(1 << channel); + return LMIC.channelMap != old_chmap; +} + +// this is a no-op provided for compatibilty +bit_t LMIC_enableChannel(u1_t channel) { + LMIC_API_PARAMETER(channel); + return 0; +} + +// check whether a map operation will work. +// chpage is 0 or 6; 6 turns all on; 0 selects channels 0..15 via mask. +// The spec is unclear as to whether we should veto a channel mask that enables +// a channel that hasn't been configured; we veto it. +bit_t LMICeulike_canMapChannels(u1_t chpage, u2_t chmap) { + switch (chpage) { + case MCMD_LinkADRReq_ChMaskCntl_EULIKE_DIRECT: + // we don't allow any channel to be turned on if its frequency is zero. + for (u1_t chnl = 0; chnl<MAX_CHANNELS; chnl++) { + if ((chmap & (1 << chnl)) != 0 && (LMIC.channelFreq[chnl]&~3) == 0) + return 0; // fail - channel is not defined + } + return 1; + + case MCMD_LinkADRReq_ChMaskCntl_EULIKE_ALL_ON: + return 1; + + default: + return 0; + } +} + +// assumes that LMICeulike_canMapChannels passed. Return true if this would +// be a valid final configuration. +// chpage is 0 or 0x60; 0x60 turns all on; 0 selects channels 0..15 via mask. +// Assumes canMapChannels has already approved this change. +bit_t LMICeulike_mapChannels(u1_t chpage, u2_t chmap) { + switch (chpage) { + case MCMD_LinkADRReq_ChMaskCntl_EULIKE_DIRECT: + LMIC.channelMap = chmap; + break; + + case MCMD_LinkADRReq_ChMaskCntl_EULIKE_ALL_ON: { + u2_t new_chmap = 0; + for (u1_t chnl = 0; chnl<MAX_CHANNELS; chnl++) { + if ((LMIC.channelFreq[chnl]&~3) != 0) { + new_chmap |= (1 << chnl); + } + } + LMIC.channelMap = new_chmap; + break; + } + + default: + // do nothing. + break; + } + return LMIC.channelMap != 0; +} + +bit_t LMICeulike_isDataRateFeasible(dr_t dr) { + // if the region uses TxpParam, then someone + // could have changed TxDwell, which makes some + // otherwise-legal DRs infeasible. +#if LMIC_ENABLE_TxParamSetupReq + if (LMICbandplan_maxFrameLen(dr) == 0) { + return 0; + } +#endif + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + if ((LMIC.channelMap & (1 << chnl)) != 0 && // channel enabled + (LMIC.channelDrMap[chnl] & (1 << dr)) != 0) + return 1; + } + return 0; +} + +#if !defined(DISABLE_JOIN) +void LMICeulike_initJoinLoop(uint8_t nDefaultChannels, s1_t adrTxPow) { +#if CFG_TxContinuousMode + LMIC.txChnl = 0 +#else + uint16_t enableMap = (1 << nDefaultChannels) - 1; + LMIC.channelShuffleMap = enableMap; + LMIC.txChnl = LMIC_findNextChannel(&LMIC.channelShuffleMap, &enableMap, 1, -1); +#endif + LMIC.adrTxPow = adrTxPow; + // TODO(tmm@mcci.com) don't use EU directly, use a table. That + // will allow support for EU-style bandplans with similar code. + LMICcore_setDrJoin(DRCHG_SET, LMICbandplan_getInitialDrJoin()); + LMICbandplan_initDefaultChannels(/* put into join mode */ 1); + ASSERT((LMIC.opmode & OP_NEXTCHNL) == 0); + LMIC.txend = os_getTime() + LMICcore_rndDelay(8); +} +#endif // DISABLE_JOIN + +void LMICeulike_updateTx(ostime_t txbeg) { + u4_t freq = LMIC.channelFreq[LMIC.txChnl]; + // Update global/band specific duty cycle stats + ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); + // Update channel/global duty cycle stats + xref2band_t band = &LMIC.bands[freq & 0x3]; + LMIC.freq = freq & ~(u4_t)3; + LMIC.txpow = band->txpow; + band->avail = txbeg + airtime * band->txcap; + if (LMIC.globalDutyRate != 0) + LMIC.globalDutyAvail = txbeg + (airtime << LMIC.globalDutyRate); +} + +#if !defined(DISABLE_JOIN) +// +// TODO(tmm@mcci.com): +// +// The definition of this is a little strange. this seems to return a time, but +// in reality it returns 0 if the caller should continue scanning through +// channels, and 1 if the caller has scanned all channels on this session, +// and therefore should reset to the beginning. The IBM 1.6 code is the +// same way, so apparently I just carried this across. We should declare +// as bool_t and change callers to use the result clearly as a flag. +// +ostime_t LMICeulike_nextJoinState(uint8_t nDefaultChannels) { + u1_t failed = 0; + u2_t enableMap = (1 << nDefaultChannels) - 1; + + // Try each default channel with same DR + // If all fail try next lower datarate + if (LMIC.channelShuffleMap == 0) { + // Lower DR every nth try (having all default channels with same DR) + // + // TODO(tmm@mcci.com) add new DR_REGION_JOIN_MIN instead of LORAWAN_DR0; + // then we can eliminate the LMIC_REGION_as923 below because we'll set + // the failed flag here. This will cause the outer caller to take the + // appropriate join path. Or add new LMICeulike_GetLowestJoinDR() + // +// TODO(tmm@mcci.com) - see above; please remove regional dependency from this file. +#if CFG_region == LMIC_REGION_as923 + // in the join of AS923 v1.1 or older, only DR2 is used. + // no need to change the DR. + LMIC.datarate = AS923_DR_SF10; + failed = 1; +#else + if (LMIC.datarate == LORAWAN_DR0) { + failed = 1; // we have tried all DR - signal EV_JOIN_FAILED + } else { + LMICcore_setDrJoin(DRCHG_NOJACC, decDR((dr_t)LMIC.datarate)); + } +#endif + } + + // find new channel, avoiding repeats. + int newCh = LMIC_findNextChannel(&LMIC.channelShuffleMap, &enableMap, 1, LMIC.txChnl); + if (newCh >= 0) + LMIC.txChnl = newCh; + + // Clear OP_NEXTCHNL because join state engine controls channel hopping + LMIC.opmode &= ~OP_NEXTCHNL; + + // Move txend to randomize synchronized concurrent joins. + // Duty cycle is based on txend. + ostime_t const time = LMICbandplan_nextJoinTime(os_getTime()); + + // TODO(tmm@mcci.com): change delay to (0:1) secs + a known t0, but randomized; + // starting adding a bias after 1 hour, 25 hours, etc.; and limit the duty + // cycle on power up. For testability, add a way to set the join start time + // externally (a test API) so we can check this feature. + // See https://github.com/mcci-catena/arduino-lmic/issues/2 + // Current code doesn't match LoRaWAN 1.0.2 requirements. + + LMIC.txend = time + + (isTESTMODE() + // Avoid collision with JOIN ACCEPT @ SF12 being sent by GW (but we missed it) + ? DNW2_SAFETY_ZONE + // Otherwise: randomize join (street lamp case): + // SF12:255, SF11:127, .., SF7:8secs + // + : DNW2_SAFETY_ZONE + LMICcore_rndDelay(255 >> LMIC.datarate)); + // 1 - triggers EV_JOIN_FAILED event + return failed; +} +#endif // !DISABLE_JOIN + +#if !defined(DISABLE_JOIN) +void LMICeulike_processJoinAcceptCFList(void) { + if ( LMICbandplan_hasJoinCFlist() && + LMIC.frame[OFF_CFLIST + 15] == LORAWAN_JoinAccept_CFListType_FREQUENCIES) { + u1_t dlen; + u1_t nDefault = LMIC_queryNumDefaultChannels(); + + dlen = OFF_CFLIST; + for( u1_t chidx = nDefault; chidx < nDefault + 5; chidx++, dlen+=3 ) { + u4_t freq = LMICbandplan_convFreq(&LMIC.frame[dlen]); + if( freq ) { + LMIC_setupChannel(chidx, freq, 0, -1); +#if LMIC_DEBUG_LEVEL > 1 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": Setup channel, idx=%d, freq=%"PRIu32"\n", os_getTime(), chidx, freq); +#endif + } + } + } +} +#endif // !DISABLE_JOIN + +void LMICeulike_saveAdrState(lmic_saved_adr_state_t *pStateBuffer) { + os_copyMem( + pStateBuffer->channelFreq, + LMIC.channelFreq, + sizeof(LMIC.channelFreq) + ); + pStateBuffer->channelMap = LMIC.channelMap; +} + +bit_t LMICeulike_compareAdrState(const lmic_saved_adr_state_t *pStateBuffer) { + if (memcmp(pStateBuffer->channelFreq, LMIC.channelFreq, sizeof(LMIC.channelFreq)) != 0) + return 1; + return pStateBuffer->channelMap != LMIC.channelMap; +} + +void LMICeulike_restoreAdrState(const lmic_saved_adr_state_t *pStateBuffer) { + os_copyMem( + LMIC.channelFreq, + pStateBuffer->channelFreq, + sizeof(LMIC.channelFreq) + ); + LMIC.channelMap = pStateBuffer->channelMap; +} + +void LMICeulike_setRx1Freq(void) { +#if !defined(DISABLE_MCMD_DlChannelReq) + uint32_t dlFreq = LMIC.channelDlFreq[LMIC.txChnl]; + if (dlFreq != 0) + LMIC.freq = dlFreq; +#endif // !DISABLE_MCMD_DlChannelReq +} + +// Class A txDone handling for FSK. +void +LMICeulike_txDoneFSK(ostime_t delay, osjobcb_t func) { + // one symbol == one bit at 50kHz == 20us. + ostime_t const hsym = us2osticksRound(10); + + // start a little earlier. PRERX_FSK is in bytes; one byte at 50 kHz == 160us + delay -= LMICbandplan_PRERX_FSK * us2osticksRound(160); + + // set LMIC.rxtime and LMIC.rxsyms: + LMIC.rxtime = LMIC.txend + LMICcore_adjustForDrift(delay, hsym, 8 * LMICbandplan_RXLEN_FSK); + os_setTimedCallback(&LMIC.osjob, LMIC.rxtime - os_getRadioRxRampup(), func); +} + +#endif // CFG_LMIC_EU_like diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.h new file mode 100644 index 0000000..729af64 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_eu_like.h @@ -0,0 +1,120 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_eu_like_h_ +# define _lmic_eu_like_h_ + +#ifndef _lmic_h_ +# include "lmic.h" +#endif + +// make sure we want US-like code +#if !CFG_LMIC_EU_like +# error "lmic not configured for EU-like bandplan" +#endif + +// TODO(tmm@mcci.com): this should come from the lmic.h or lorabase.h file; and +// it's probably affected by the fix to this issue: +// https://github.com/mcci-catena/arduino-lmic/issues/2 +#define DNW2_SAFETY_ZONE ms2osticks(3000) + +// provide a default for LMICbandplan_isValidBeacon1() +static inline int +LMICeulike_isValidBeacon1(const uint8_t *d) { + return os_rlsbf2(&d[OFF_BCN_CRC1]) != os_crc16(d, OFF_BCN_CRC1); +} + +#define LMICbandplan_isValidBeacon1(pFrame) LMICeulike_isValidBeacon1(pFrame) + + +// provide a default for LMICbandplan_isFSK() +#define LMICbandplan_isFSK() (0) + +// provide a default LMICbandplan_txDoneDoFSK() +void LMICeulike_txDoneFSK(ostime_t delay, osjobcb_t func); +#define LMICbandplan_txDoneFSK(delay, func) LMICeulike_txDoneFSK(delay, func) + +#define LMICbandplan_joinAcceptChannelClear() LMICbandplan_initDefaultChannels(/* normal, not join */ 0) + +enum { BAND_MILLI = 0, BAND_CENTI = 1, BAND_DECI = 2, BAND_AUX = 3 }; + +// there's a CFList on joins for EU-like plans +#define LMICbandplan_hasJoinCFlist() (1) + +/// \brief process CFLists from JoinAccept for EU-like regions +void LMICeulike_processJoinAcceptCFList(void); +/// \brief by default, EU-like plans use LMICeulike_processJoinAcceptCFList +#define LMICbandplan_processJoinAcceptCFList LMICeulike_processJoinAcceptCFList + +#define LMICbandplan_advanceBeaconChannel() \ + do { /* nothing */ } while (0) + +#define LMICbandplan_resetDefaultChannels() \ + do { /* nothing */ } while (0) + +#define LMICbandplan_setSessionInitDefaultChannels() \ + do { LMICbandplan_initDefaultChannels(/* normal, not join */ 0); } while (0) + +bit_t LMICeulike_canMapChannels(u1_t chpage, u2_t chmap); +#define LMICbandplan_canMapChannels(c, m) LMICeulike_canMapChannels(c, m) + +bit_t LMICeulike_mapChannels(u1_t chpage, u2_t chmap); +#define LMICbandplan_mapChannels(c, m) LMICeulike_mapChannels(c, m) + +void LMICeulike_initJoinLoop(u1_t nDefaultChannels, s1_t adrTxPow); + +void LMICeulike_updateTx(ostime_t txbeg); +#define LMICbandplan_updateTx(t) LMICeulike_updateTx(t) + +ostime_t LMICeulike_nextJoinState(uint8_t nDefaultChannels); + +static inline ostime_t LMICeulike_nextJoinTime(ostime_t now) { + return now; +} +#define LMICbandplan_nextJoinTime(now) LMICeulike_nextJoinTime(now) + +#define LMICbandplan_init() \ + do { /* nothing */ } while (0) + +void LMICeulike_saveAdrState(lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_saveAdrState(pState) LMICeulike_saveAdrState(pState) + +bit_t LMICeulike_compareAdrState(const lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_compareAdrState(pState) LMICeulike_compareAdrState(pState) + +void LMICeulike_restoreAdrState(const lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_restoreAdrState(pState) LMICeulike_restoreAdrState(pState) + +// set Rx1 frequency (might be different than uplink). +void LMICeulike_setRx1Freq(void); + +bit_t LMICeulike_isDataRateFeasible(dr_t dr); +#define LMICbandplan_isDataRateFeasible(dr) LMICeulike_isDataRateFeasible(dr) + + +#endif // _lmic_eu_like_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_in866.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_in866.c new file mode 100644 index 0000000..3cb066e --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_in866.c @@ -0,0 +1,281 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_in866) +// ================================================================================ +// +// BEG: IN866 related stuff +// + +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, + (u1_t)MAKERPS(SF12, BW125, CR_4_5, 0, 0), // [0] + (u1_t)MAKERPS(SF11, BW125, CR_4_5, 0, 0), // [1] + (u1_t)MAKERPS(SF10, BW125, CR_4_5, 0, 0), // [2] + (u1_t)MAKERPS(SF9, BW125, CR_4_5, 0, 0), // [3] + (u1_t)MAKERPS(SF8, BW125, CR_4_5, 0, 0), // [4] + (u1_t)MAKERPS(SF7, BW125, CR_4_5, 0, 0), // [5] + ILLEGAL_RPS, // [6] + (u1_t)MAKERPS(FSK, BW125, CR_4_5, 0, 0), // [7] + ILLEGAL_RPS +}; + +bit_t +LMICin866_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +static CONST_TABLE(u1_t, maxFrameLens)[] = { + 59+5, 59+5, 59+5, 123+5, 250+5, 250+5, 0, 250+5 +}; + +uint8_t LMICin866_maxFrameLen(uint8_t dr) { + if (dr < LENOF_TABLE(maxFrameLens)) + return TABLE_GET_U1(maxFrameLens, dr); + else + return 0; +} + +static CONST_TABLE(s1_t, TXPOWLEVELS)[] = { + 30, 28, 26, 24, 22, 20, 18, 16, 14, 12, 10 +}; + +int8_t LMICin866_pow2dBm(uint8_t mcmd_ladr_p1) { + uint8_t const pindex = (mcmd_ladr_p1&MCMD_LinkADRReq_POW_MASK)>>MCMD_LinkADRReq_POW_SHIFT; + if (pindex < LENOF_TABLE(TXPOWLEVELS)) { + return TABLE_GET_S1(TXPOWLEVELS, pindex); + } else { + return -128; + } +} + +// only used in this module, but used by variant macro dr2hsym(). +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 7), // DR_SF12 + us2osticksRound(128 << 6), // DR_SF11 + us2osticksRound(128 << 5), // DR_SF10 + us2osticksRound(128 << 4), // DR_SF9 + us2osticksRound(128 << 3), // DR_SF8 + us2osticksRound(128 << 2), // DR_SF7 + us2osticksRound(128 << 1), // -- + us2osticksRound(80) // FSK -- not used (time for 1/2 byte) +}; + +ostime_t LMICin866_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, dr); +} + + +// All frequencies are marked as BAND_MILLI, and we don't do duty-cycle. But this lets +// us reuse code. +enum { NUM_DEFAULT_CHANNELS = 3 }; +static CONST_TABLE(u4_t, iniChannelFreq)[NUM_DEFAULT_CHANNELS] = { + // Default operational frequencies + IN866_F1 | BAND_MILLI, + IN866_F2 | BAND_MILLI, + IN866_F3 | BAND_MILLI, +}; + +// india ignores join, becuase the channel setup is the same either way. +void LMICin866_initDefaultChannels(bit_t join) { + LMIC_API_PARAMETER(join); + + os_clearMem(&LMIC.channelFreq, sizeof(LMIC.channelFreq)); +#if !defined(DISABLE_MCMD_DlChannelReq) + os_clearMem(&LMIC.channelDlFreq, sizeof(LMIC.channelDlFreq)); +#endif // !DISABLE_MCMD_DlChannelReq + os_clearMem(&LMIC.channelDrMap, sizeof(LMIC.channelDrMap)); + os_clearMem(&LMIC.bands, sizeof(LMIC.bands)); + + LMIC.channelMap = (1 << NUM_DEFAULT_CHANNELS) - 1; + for (u1_t fu = 0; fu<NUM_DEFAULT_CHANNELS; fu++) { + LMIC.channelFreq[fu] = TABLE_GET_U4(iniChannelFreq, fu); + LMIC.channelDrMap[fu] = DR_RANGE_MAP(IN866_DR_SF12, IN866_DR_SF7); + } + + LMIC.bands[BAND_MILLI].txcap = 1; // no limit, in effect. + LMIC.bands[BAND_MILLI].txpow = IN866_TX_EIRP_MAX_DBM; + LMIC.bands[BAND_MILLI].lastchnl = os_getRndU1() % MAX_CHANNELS; + LMIC.bands[BAND_MILLI].avail = os_getTime(); +} + +bit_t LMIC_setupBand(u1_t bandidx, s1_t txpow, u2_t txcap) { + if (bandidx > BAND_MILLI) return 0; + //band_t* b = &LMIC.bands[bandidx]; + xref2band_t b = &LMIC.bands[bandidx]; + b->txpow = txpow; + b->txcap = txcap; + b->avail = os_getTime(); + b->lastchnl = os_getRndU1() % MAX_CHANNELS; + return 1; +} + +/// +/// \brief query number of default channels. +/// +u1_t LMIC_queryNumDefaultChannels() { + return NUM_DEFAULT_CHANNELS; +} + +/// +/// \brief LMIC_setupChannel for IN region +/// +/// \note according to LoRaWAN 1.3 section 5.6, "the acceptable range +/// for **ChIndex** is N to 16", where N is our \c NUM_DEFAULT_CHANNELS. +/// This routine is used internally for MAC commands, so we enforce +/// this for the extenal API as well. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + // zero the band bits in freq, just in case. + freq &= ~3; + + if (chidx < NUM_DEFAULT_CHANNELS) { + return 0; + } + bit_t fEnable = (freq != 0); + if (chidx >= MAX_CHANNELS) + return 0; + if (band == -1) { + freq = (freq&~3) | BAND_MILLI; + } else { + if (band > BAND_MILLI) return 0; + freq = (freq&~3) | band; + } + LMIC.channelFreq[chidx] = freq; + LMIC.channelDrMap[chidx] = drmap == 0 ? DR_RANGE_MAP(IN866_DR_SF12, IN866_DR_SF7) : drmap; + if (fEnable) + LMIC.channelMap |= 1 << chidx; // enabled right away + else + LMIC.channelMap &= ~(1 << chidx); + return 1; +} + + + +u4_t LMICin866_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < IN866_FREQ_MIN || freq > IN866_FREQ_MAX) + freq = 0; + return freq; +} + +/// +/// \brief change the TX channel given the desired tx time. +/// +/// \param [in] now is the time at which we want to transmit. In fact, it's always +/// the current time. +/// +/// \returns the actual time at which we can transmit. \c LMIC.txChnl is set to the +/// selected channel. +/// +/// \details +/// We scan all the bands, creating a mask of all enabled channels that are +/// feasible at the earliest possible time. We then randomly choose one from +/// that, updating the shuffle mask. +/// +/// Since there's no duty cycle limitation, and no dwell limitation, +/// we just choose a channel from the shuffle and return the current time. +/// +ostime_t LMICin866_nextTx(ostime_t now) { + uint16_t availmask; + + // scan all the enabled channels and make a mask of candidates + availmask = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + // not enabled? + if ((LMIC.channelMap & (1 << chnl)) == 0) + continue; + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + availmask |= 1 << chnl; + } + + // now: calculate the mask + int candidateCh = LMIC_findNextChannel(&LMIC.channelShuffleMap, &availmask, 1, LMIC.txChnl == 0xFF ? -1 : LMIC.txChnl); + if (candidateCh >= 0) { + // update the channel. + LMIC.txChnl = candidateCh; + } + return now; +} + +#if !defined(DISABLE_BEACONS) +void LMICin866_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = LMIC.channelFreq[LMIC.bcnChnl] & ~(u4_t)3; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +#if !defined(DISABLE_JOIN) +ostime_t LMICin866_nextJoinState(void) { + return LMICeulike_nextJoinState(NUM_DEFAULT_CHANNELS); +} +#endif // !DISABLE_JOIN + +// set the Rx1 dndr, rps. +void LMICin866_setRx1Params(void) { + u1_t const txdr = LMIC.dndr; + s1_t drOffset; + s1_t candidateDr; + + LMICeulike_setRx1Freq(); + + if ( LMIC.rx1DrOffset <= 5) + drOffset = (s1_t) LMIC.rx1DrOffset; + else + drOffset = 5 - (s1_t) LMIC.rx1DrOffset; + + candidateDr = (s1_t) txdr - drOffset; + if (candidateDr < LORAWAN_DR0) + candidateDr = 0; + else if (candidateDr > LORAWAN_DR5) + candidateDr = LORAWAN_DR5; + + LMIC.dndr = (u1_t) candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +void +LMICin866_initJoinLoop(void) { + LMICeulike_initJoinLoop(NUM_DEFAULT_CHANNELS, /* adr dBm */ IN866_TX_EIRP_MAX_DBM); +} + +// +// END: IN866 related stuff +// +// ================================================================================ +#endif
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_kr920.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_kr920.c new file mode 100644 index 0000000..e295516 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_kr920.c @@ -0,0 +1,309 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_kr920) +// ================================================================================ +// +// BEG: KR920 related stuff +// + +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, + (u1_t)MAKERPS(SF12, BW125, CR_4_5, 0, 0), // [0] + (u1_t)MAKERPS(SF11, BW125, CR_4_5, 0, 0), // [1] + (u1_t)MAKERPS(SF10, BW125, CR_4_5, 0, 0), // [2] + (u1_t)MAKERPS(SF9, BW125, CR_4_5, 0, 0), // [3] + (u1_t)MAKERPS(SF8, BW125, CR_4_5, 0, 0), // [4] + (u1_t)MAKERPS(SF7, BW125, CR_4_5, 0, 0), // [5] + ILLEGAL_RPS, // [6] +}; + +bit_t +LMICkr920_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +static CONST_TABLE(u1_t, maxFrameLens)[] = { + 59+5, 59+5, 59+5, 123+5, 250+5, 250+5 +}; + +uint8_t LMICkr920_maxFrameLen(uint8_t dr) { + if (dr < LENOF_TABLE(maxFrameLens)) + return TABLE_GET_U1(maxFrameLens, dr); + else + return 0; +} + +static CONST_TABLE(s1_t, TXPOWLEVELS)[] = { + 14, 12, 10, 8, 6, 4, 2, 0 +}; + +int8_t LMICkr920_pow2dBm(uint8_t mcmd_ladr_p1) { + uint8_t const pindex = (mcmd_ladr_p1&MCMD_LinkADRReq_POW_MASK)>>MCMD_LinkADRReq_POW_SHIFT; + if (pindex < LENOF_TABLE(TXPOWLEVELS)) { + return TABLE_GET_S1(TXPOWLEVELS, pindex); + } else { + return -128; + } +} + +// only used in this module, but used by variant macro dr2hsym(). +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 7), // DR_SF12 + us2osticksRound(128 << 6), // DR_SF11 + us2osticksRound(128 << 5), // DR_SF10 + us2osticksRound(128 << 4), // DR_SF9 + us2osticksRound(128 << 3), // DR_SF8 + us2osticksRound(128 << 2), // DR_SF7 +}; + +ostime_t LMICkr920_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, dr); +} + + +// All frequencies are marked as BAND_MILLI, and we don't do duty-cycle. But this lets +// us reuse code. +enum { NUM_DEFAULT_CHANNELS = 3 }; +static CONST_TABLE(u4_t, iniChannelFreq)[NUM_DEFAULT_CHANNELS] = { + // Default operational frequencies + KR920_F1 | BAND_MILLI, + KR920_F2 | BAND_MILLI, + KR920_F3 | BAND_MILLI, +}; + +// korea ignores the join flag, becuase the channel setup is the same either way. +void LMICkr920_initDefaultChannels(bit_t join) { + LMIC_API_PARAMETER(join); + + os_clearMem(&LMIC.channelFreq, sizeof(LMIC.channelFreq)); +#if !defined(DISABLE_MCMD_DlChannelReq) + os_clearMem(&LMIC.channelDlFreq, sizeof(LMIC.channelDlFreq)); +#endif // !DISABLE_MCMD_DlChannelReq + os_clearMem(&LMIC.channelDrMap, sizeof(LMIC.channelDrMap)); + os_clearMem(&LMIC.bands, sizeof(LMIC.bands)); + + LMIC.channelMap = (1 << NUM_DEFAULT_CHANNELS) - 1; + for (u1_t fu = 0; fu<NUM_DEFAULT_CHANNELS; fu++) { + LMIC.channelFreq[fu] = TABLE_GET_U4(iniChannelFreq, fu); + LMIC.channelDrMap[fu] = DR_RANGE_MAP(KR920_DR_SF12, KR920_DR_SF7); + } + + LMIC.bands[BAND_MILLI].txcap = 1; // no limit, in effect. + LMIC.bands[BAND_MILLI].txpow = KR920_TX_EIRP_MAX_DBM; + LMIC.bands[BAND_MILLI].lastchnl = os_getRndU1() % MAX_CHANNELS; + LMIC.bands[BAND_MILLI].avail = os_getTime(); +} + +void +LMICkr920_init(void) { + // set LBT mode + LMIC.lbt_ticks = us2osticks(KR920_LBT_US); + LMIC.lbt_dbmax = KR920_LBT_DB_MAX; +} + +void +LMICas923_resetDefaultChannels(void) { + // set LBT mode + LMIC.lbt_ticks = us2osticks(KR920_LBT_US); + LMIC.lbt_dbmax = KR920_LBT_DB_MAX; +} + + +bit_t LMIC_setupBand(u1_t bandidx, s1_t txpow, u2_t txcap) { + if (bandidx > BAND_MILLI) return 0; + //band_t* b = &LMIC.bands[bandidx]; + xref2band_t b = &LMIC.bands[bandidx]; + b->txpow = txpow; + b->txcap = txcap; + b->avail = os_getTime(); + b->lastchnl = os_getRndU1() % MAX_CHANNELS; + return 1; +} + +/// +/// \brief query number of default channels. +/// +u1_t LMIC_queryNumDefaultChannels() { + return NUM_DEFAULT_CHANNELS; +} + +/// +/// \brief LMIC_setupChannel for KR920 +/// +/// \note according to LoRaWAN 1.3 section 5.6, "the acceptable range +/// for **ChIndex** is N to 16", where N is our \c NUM_DEFAULT_CHANNELS. +/// This routine is used internally for MAC commands, so we enforce +/// this for the extenal API as well. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + // zero the band bits in freq, just in case. + freq &= ~3; + + if (chidx < NUM_DEFAULT_CHANNELS) { + // can't change a default channel. + return 0; + } + bit_t fEnable = (freq != 0); + if (chidx >= MAX_CHANNELS) + return 0; + if (band == -1) { + freq = (freq&~3) | BAND_MILLI; + } else { + if (band > BAND_MILLI) return 0; + freq = (freq&~3) | band; + } + LMIC.channelFreq[chidx] = freq; + LMIC.channelDrMap[chidx] = drmap == 0 ? DR_RANGE_MAP(KR920_DR_SF12, KR920_DR_SF7) : drmap; + if (fEnable) + LMIC.channelMap |= 1 << chidx; // enabled right away + else + LMIC.channelMap &= ~(1 << chidx); + return 1; +} + + + +u4_t LMICkr920_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < KR920_FREQ_MIN || freq > KR920_FREQ_MAX) + freq = 0; + return freq; +} + +/// +/// \brief change the TX channel given the desired tx time. +/// +/// \param [in] now is the time at which we want to transmit. In fact, it's always +/// the current time. +/// +/// \returns the actual time at which we can transmit. \c LMIC.txChnl is set to the +/// selected channel. +/// +/// \details +/// We scan all the bands, creating a mask of all enabled channels that are +/// feasible at the earliest possible time. We then randomly choose one from +/// that, updating the shuffle mask. +/// +/// Since there's no duty cycle limitation, and no dwell limitation, +/// we just choose a channel from the shuffle and return the current time. +/// +ostime_t LMICkr920_nextTx(ostime_t now) { + uint16_t availmask; + + // scan all the enabled channels and make a mask of candidates + availmask = 0; + for (u1_t chnl = 0; chnl < MAX_CHANNELS; ++chnl) { + // not enabled? + if ((LMIC.channelMap & (1 << chnl)) == 0) + continue; + // not feasible? + if ((LMIC.channelDrMap[chnl] & (1 << (LMIC.datarate & 0xF))) == 0) + continue; + availmask |= 1 << chnl; + } + + // now: calculate the mask + int candidateCh = LMIC_findNextChannel(&LMIC.channelShuffleMap, &availmask, 1, LMIC.txChnl == 0xFF ? -1 : LMIC.txChnl); + if (candidateCh >= 0) { + // update the channel. + LMIC.txChnl = candidateCh; + } + return now; +} + +#if !defined(DISABLE_BEACONS) +void LMICkr920_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = LMIC.channelFreq[LMIC.bcnChnl] & ~(u4_t)3; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +#if !defined(DISABLE_JOIN) +ostime_t LMICkr920_nextJoinState(void) { + return LMICeulike_nextJoinState(NUM_DEFAULT_CHANNELS); +} +#endif // !DISABLE_JOIN + +// set the Rx1 dndr, rps. +void LMICkr920_setRx1Params(void) { + u1_t const txdr = LMIC.dndr; + s1_t drOffset; + s1_t candidateDr; + + LMICeulike_setRx1Freq(); + + if ( LMIC.rx1DrOffset <= 5) + drOffset = (s1_t) LMIC.rx1DrOffset; + else + drOffset = 5 - (s1_t) LMIC.rx1DrOffset; + + candidateDr = (s1_t) txdr - drOffset; + if (candidateDr < LORAWAN_DR0) + candidateDr = 0; + else if (candidateDr > LORAWAN_DR5) + candidateDr = LORAWAN_DR5; + + LMIC.dndr = (u1_t) candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +void +LMICkr920_initJoinLoop(void) { + LMICeulike_initJoinLoop(NUM_DEFAULT_CHANNELS, /* adr dBm */ KR920_TX_EIRP_MAX_DBM); +} + +void LMICkr920_updateTx(ostime_t txbeg) { + u4_t freq = LMIC.channelFreq[LMIC.txChnl]; + // Update global/band specific duty cycle stats + ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); + // Update channel/global duty cycle stats + xref2band_t band = &LMIC.bands[freq & 0x3]; + LMIC.freq = freq & ~(u4_t)3; + LMIC.txpow = band->txpow; + if (LMIC.freq <= KR920_FDOWN && LMIC.txpow > KR920_TX_EIRP_MAX_DBM_LOW) { + LMIC.txpow = KR920_TX_EIRP_MAX_DBM_LOW; + } + band->avail = txbeg + airtime * band->txcap; + if (LMIC.globalDutyRate != 0) + LMIC.globalDutyAvail = txbeg + (airtime << LMIC.globalDutyRate); +} + +// +// END: KR920 related stuff +// +// ================================================================================ +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us915.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us915.c new file mode 100644 index 0000000..0cbf852 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us915.c @@ -0,0 +1,269 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019-2021 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if defined(CFG_us915) +// ================================================================================ +// +// BEG: US915 related stuff +// + +CONST_TABLE(u1_t, _DR2RPS_CRC)[] = { + ILLEGAL_RPS, // [-1] + MAKERPS(SF10, BW125, CR_4_5, 0, 0), // [0] + MAKERPS(SF9 , BW125, CR_4_5, 0, 0), // [1] + MAKERPS(SF8 , BW125, CR_4_5, 0, 0), // [2] + MAKERPS(SF7 , BW125, CR_4_5, 0, 0), // [3] + MAKERPS(SF8 , BW500, CR_4_5, 0, 0), // [4] + ILLEGAL_RPS , // [5] + ILLEGAL_RPS , // [6] + ILLEGAL_RPS , // [7] + MAKERPS(SF12, BW500, CR_4_5, 0, 0), // [8] + MAKERPS(SF11, BW500, CR_4_5, 0, 0), // [9] + MAKERPS(SF10, BW500, CR_4_5, 0, 0), // [10] + MAKERPS(SF9 , BW500, CR_4_5, 0, 0), // [11] + MAKERPS(SF8 , BW500, CR_4_5, 0, 0), // [12] + MAKERPS(SF7 , BW500, CR_4_5, 0, 0), // [13] + ILLEGAL_RPS // [14] +}; + +bit_t +LMICus915_validDR(dr_t dr) { + // use subtract here to avoid overflow + if (dr >= LENOF_TABLE(_DR2RPS_CRC) - 2) + return 0; + return TABLE_GET_U1(_DR2RPS_CRC, dr+1)!=ILLEGAL_RPS; +} + +static CONST_TABLE(u1_t, maxFrameLens)[] = { + 19+5, 61+5, 133+5, 250+5, 250+5, 0, 0,0, + 61+5, 133+5, 250+5, 250+5, 250+5, 250+5 + }; + +uint8_t LMICus915_maxFrameLen(uint8_t dr) { + if (dr < LENOF_TABLE(maxFrameLens)) + return TABLE_GET_U1(maxFrameLens, dr); + else + return 0; +} + +int8_t LMICus915_pow2dbm(uint8_t mcmd_ladr_p1) { + if ((mcmd_ladr_p1 & MCMD_LinkADRReq_POW_MASK) > + ((LMIC_LORAWAN_SPEC_VERSION < LMIC_LORAWAN_SPEC_VERSION_1_0_3) + ? US915_LinkAdrReq_POW_MAX_1_0_2 + : US915_LinkAdrReq_POW_MAX_1_0_3)) + return -128; + else + return ((s1_t)(US915_TX_MAX_DBM - (((mcmd_ladr_p1)&MCMD_LinkADRReq_POW_MASK)<<1))); +} + +static CONST_TABLE(ostime_t, DR2HSYM_osticks)[] = { + us2osticksRound(128 << 5), // DR_SF10 DR_SF12CR + us2osticksRound(128 << 4), // DR_SF9 DR_SF11CR + us2osticksRound(128 << 3), // DR_SF8 DR_SF10CR + us2osticksRound(128 << 2), // DR_SF7 DR_SF9CR + us2osticksRound(128 << 1), // DR_SF8C DR_SF8CR + us2osticksRound(128 << 0) // ------ DR_SF7CR +}; + +ostime_t LMICus915_dr2hsym(uint8_t dr) { + return TABLE_GET_OSTIME(DR2HSYM_osticks, (dr) & 7); // map DR_SFnCR -> 0-6 +} + + + +u4_t LMICus915_convFreq(xref2cu1_t ptr) { + u4_t freq = (os_rlsbf4(ptr - 1) >> 8) * 100; + if (freq < US915_FREQ_MIN || freq > US915_FREQ_MAX) + freq = 0; + return freq; +} + +/// +/// \brief query number of default channels. +/// +/// For US, we have no programmable channels; all channels +/// are fixed. Return the total channel count. +/// +u1_t LMIC_queryNumDefaultChannels() { + return 64 + 8; +} + +/// +/// \brief LMIC_setupChannel for US915 +/// +/// \note there are no progammable channels for US915, so this API +/// always returns FALSE. +/// +bit_t LMIC_setupChannel(u1_t chidx, u4_t freq, u2_t drmap, s1_t band) { + LMIC_API_PARAMETER(chidx); + LMIC_API_PARAMETER(freq); + LMIC_API_PARAMETER(drmap); + LMIC_API_PARAMETER(band); + + return 0; // channels 0..71 are hardwired +} + +bit_t LMIC_disableChannel(u1_t channel) { + bit_t result = 0; + if (channel < 72) { + if (ENABLED_CHANNEL(channel)) { + result = 1; + if (IS_CHANNEL_125khz(channel)) + LMIC.activeChannels125khz--; + else if (IS_CHANNEL_500khz(channel)) + LMIC.activeChannels500khz--; + } + LMIC.channelMap[channel >> 4] &= ~(1 << (channel & 0xF)); + } + return result; +} + +bit_t LMIC_enableChannel(u1_t channel) { + bit_t result = 0; + if (channel < 72) { + if (!ENABLED_CHANNEL(channel)) { + result = 1; + if (IS_CHANNEL_125khz(channel)) + LMIC.activeChannels125khz++; + else if (IS_CHANNEL_500khz(channel)) + LMIC.activeChannels500khz++; + } + LMIC.channelMap[channel >> 4] |= (1 << (channel & 0xF)); + } + return result; +} + +bit_t LMIC_enableSubBand(u1_t band) { + ASSERT(band < 8); + u1_t start = band * 8; + u1_t end = start + 8; + bit_t result = 0; + + // enable all eight 125 kHz channels in this subband + for (int channel = start; channel < end; ++channel) + result |= LMIC_enableChannel(channel); + + // there's a single 500 kHz channel associated with + // each group of 8 125 kHz channels. Enable it, too. + result |= LMIC_enableChannel(64 + band); + return result; +} + +bit_t LMIC_disableSubBand(u1_t band) { + ASSERT(band < 8); + u1_t start = band * 8; + u1_t end = start + 8; + bit_t result = 0; + + // disable all eight 125 kHz channels in this subband + for (int channel = start; channel < end; ++channel) + result |= LMIC_disableChannel(channel); + + // there's a single 500 kHz channel associated with + // each group of 8 125 kHz channels. Disable it, too. + result |= LMIC_disableChannel(64 + band); + return result; +} + +bit_t LMIC_selectSubBand(u1_t band) { + bit_t result = 0; + + ASSERT(band < 8); + for (int b = 0; b<8; ++b) { + if (band == b) + result |= LMIC_enableSubBand(b); + else + result |= LMIC_disableSubBand(b); + } + return result; +} + +void LMICus915_updateTx(ostime_t txbeg) { + u1_t chnl = LMIC.txChnl; + if (chnl < 64) { + LMIC.freq = US915_125kHz_UPFBASE + chnl*US915_125kHz_UPFSTEP; + if (LMIC.activeChannels125khz >= 50) + LMIC.txpow = 30; + else + LMIC.txpow = 21; + } else { + // at 500kHz bandwidth, we're allowed more power. + LMIC.txpow = 26; + LMIC.freq = US915_500kHz_UPFBASE + (chnl - 64)*US915_500kHz_UPFSTEP; + } + + // Update global duty cycle stats + if (LMIC.globalDutyRate != 0) { + ostime_t airtime = calcAirTime(LMIC.rps, LMIC.dataLen); + LMIC.globalDutyAvail = txbeg + (airtime << LMIC.globalDutyRate); + } +} + +#if !defined(DISABLE_BEACONS) +void LMICus915_setBcnRxParams(void) { + LMIC.dataLen = 0; + LMIC.freq = US915_500kHz_DNFBASE + LMIC.bcnChnl * US915_500kHz_DNFSTEP; + LMIC.rps = setIh(setNocrc(dndr2rps((dr_t)DR_BCN), 1), LEN_BCN); +} +#endif // !DISABLE_BEACONS + +// set the Rx1 dndr, rps. +void LMICus915_setRx1Params(void) { + u1_t const txdr = LMIC.dndr; + u1_t candidateDr; + LMIC.freq = US915_500kHz_DNFBASE + (LMIC.txChnl & 0x7) * US915_500kHz_DNFSTEP; + if ( /* TX datarate */txdr < LORAWAN_DR4) + candidateDr = txdr + 10 - LMIC.rx1DrOffset; + else + candidateDr = LORAWAN_DR13 - LMIC.rx1DrOffset; + + if (candidateDr < LORAWAN_DR8) + candidateDr = LORAWAN_DR8; + else if (candidateDr > LORAWAN_DR13) + candidateDr = LORAWAN_DR13; + + LMIC.dndr = candidateDr; + LMIC.rps = dndr2rps(LMIC.dndr); +} + +void LMICus915_initJoinLoop(void) { + LMICuslike_initJoinLoop(); + + // initialize the adrTxPower. + LMIC.adrTxPow = 20; // dBm +} + +// +// END: US915 related stuff +// +// ================================================================================ +#endif diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.c new file mode 100644 index 0000000..31e4cc1 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.c @@ -0,0 +1,369 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#define LMIC_DR_LEGACY 0 + +#include "lmic_bandplan.h" + +#if CFG_LMIC_US_like + +#ifndef LMICuslike_getFirst500kHzDR +# error "LMICuslike_getFirst500kHzDR() not defined by bandplan" +#endif + +/// +/// \brief set LMIC.txChan to the next selected channel. +/// +/// \param [in] start first channel number +/// \param [in] end one past the last channel number +/// +/// \details +/// We set up a call to LMIC_findNextChannel using the channelShuffleMap and +/// the channelEnableMap. We subset these based on start and end. \p start must +/// be a multiple of 16. +/// +static void setNextChannel(uint16_t start, uint16_t end, uint16_t count) { + ASSERT(count>0); + ASSERT(start<end); + ASSERT(count <= (end - start)); + ASSERT((start & 0xF) == 0); + uint16_t const mapStart = start >> 4; + uint16_t const mapEntries = (end - start + 15) >> 4; + + int candidate = start + LMIC_findNextChannel( + LMIC.channelShuffleMap + mapStart, + LMIC.channelMap + mapStart, + mapEntries, + LMIC.txChnl == 0xFF ? -1 : LMIC.txChnl + ); + + if (candidate >= 0) + LMIC.txChnl = candidate; +} + + + +bit_t LMIC_setupBand(u1_t bandidx, s1_t txpow, u2_t txcap) { + LMIC_API_PARAMETER(bandidx); + LMIC_API_PARAMETER(txpow); + LMIC_API_PARAMETER(txcap); + + // nothing; just succeed. + return 1; +} + + +void LMICuslike_initDefaultChannels(bit_t fJoin) { + LMIC_API_PARAMETER(fJoin); + + // things work the same for join as normal. + for (u1_t i = 0; i<4; i++) + LMIC.channelMap[i] = 0xFFFF; + LMIC.channelMap[4] = 0x00FF; + os_clearMem(LMIC.channelShuffleMap, sizeof(LMIC.channelShuffleMap)); + LMIC.activeChannels125khz = 64; + LMIC.activeChannels500khz = 8; + // choose a random channel. + LMIC.txChnl = 0xFF; +} + +// verify that a given setting is permitted +bit_t LMICuslike_canMapChannels(u1_t chpage, u2_t chmap) { + /* + || MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON and MCMD_LinkADRReq_ChMaskCntl_USLIKE_125OFF are special. The + || channel map appllies to 500kHz (ch 64..71) and in addition + || all channels 0..63 are turned off or on. MCMC_LADR_CHP_BANK + || is also special, in that it enables subbands. + */ + if (chpage < MCMD_LinkADRReq_ChMaskCntl_USLIKE_SPECIAL) { + // operate on channels 0..15, 16..31, 32..47, 48..63, 64..71 + if (chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_500K) { + if (chmap & 0xFF00) { + // those are reserved bits, fail. + return 0; + } + } else { + return 1; + } + } else if (chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_BANK) { + if (chmap == 0 || (chmap & 0xFF00) != 0) { + // no bits set, or reserved bitsset , fail. + return 0; + } + } else if (chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON || + chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125OFF) { + u1_t const en125 = chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON; + + // if disabling all 125kHz chans, must have at least one 500kHz chan + // don't allow reserved bits to be set in chmap. + if ((! en125 && chmap == 0) || (chmap & 0xFF00) != 0) + return 0; + } else { + return 0; + } + + // if we get here, it looks legal. + return 1; +} + +// map channels. return true if configuration looks valid. +bit_t LMICuslike_mapChannels(u1_t chpage, u2_t chmap) { + /* + || MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON and MCMD_LinkADRReq_ChMaskCntl_USLIKE_125OFF are special. The + || channel map appllies to 500kHz (ch 64..71) and in addition + || all channels 0..63 are turned off or on. MCMC_LADR_CHP_BANK + || is also special, in that it enables subbands. + */ + if (chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_BANK) { + // each bit enables a bank of channels + for (u1_t subband = 0; subband < 8; ++subband, chmap >>= 1) { + if (chmap & 1) { + LMIC_enableSubBand(subband); + } else { + LMIC_disableSubBand(subband); + } + } + } else { + u1_t base, top; + + if (chpage < MCMD_LinkADRReq_ChMaskCntl_USLIKE_SPECIAL) { + // operate on channels 0..15, 16..31, 32..47, 48..63 + // note that the chpage hasn't been shifted right, so + // it's really the base. + base = chpage; + top = base + 16; + if (base == 64) { + top = 72; + } + } else /* if (chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON || + chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125OFF) */ { + u1_t const en125 = chpage == MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON; + + // enable or disable all 125kHz channels + for (u1_t chnl = 0; chnl < 64; ++chnl) { + if (en125) + LMIC_enableChannel(chnl); + else + LMIC_disableChannel(chnl); + } + + // then apply mask to top 8 channels. + base = 64; + top = 72; + } + + // apply chmap to channels in [base..top-1]. + // Use enable/disable channel to keep activeChannel counts in sync. + for (u1_t chnl = base; chnl < top; ++chnl, chmap >>= 1) { + if (chmap & 0x0001) + LMIC_enableChannel(chnl); + else + LMIC_disableChannel(chnl); + } + } + + LMICOS_logEventUint32("LMICuslike_mapChannels", ((u4_t)LMIC.activeChannels125khz << 16u)|(LMIC.activeChannels500khz << 0u)); + return (LMIC.activeChannels125khz > 0) || (LMIC.activeChannels500khz > 0); +} + +// US does not have duty cycling - return now as earliest TX time +// but also do the channel hopping dance. +ostime_t LMICuslike_nextTx(ostime_t now) { + // TODO(tmm@mcci.com): use a static const for US-like + if (LMIC.datarate >= LMICuslike_getFirst500kHzDR()) { // 500kHz + if (LMIC.activeChannels500khz > 0) { + setNextChannel(64, 64 + 8, LMIC.activeChannels500khz); + } else if (LMIC.activeChannels125khz > 0) { + LMIC.datarate = lowerDR(LMICuslike_getFirst500kHzDR(), 1); + setNextChannel(0, 64, LMIC.activeChannels125khz); + LMICOS_logEvent("LMICuslike_nextTx: no 500k, choose 125k"); + } else { + LMICOS_logEvent("LMICuslike_nextTx: no channels at all (500)"); + } + } + else { // 125kHz + if (LMIC.activeChannels125khz > 0) { + setNextChannel(0, 64, LMIC.activeChannels125khz); + } else if (LMIC.activeChannels500khz > 0) { + LMIC.datarate = LMICuslike_getFirst500kHzDR(); + setNextChannel(64, 64 + 8, LMIC.activeChannels500khz); + LMICOS_logEvent("LMICuslike_nextTx: no 125k, choose 500k"); + } else { + LMICOS_logEvent("LMICuslike_nextTx: no channels at all (125)"); + } + } + return now; +} + +bit_t LMICuslike_isDataRateFeasible(dr_t dr) { + if (dr >= LMICuslike_getFirst500kHzDR()) { // 500kHz + return LMIC.activeChannels500khz > 0; + } else { + return LMIC.activeChannels125khz > 6; + } +} + +#if !defined(DISABLE_JOIN) +void LMICuslike_initJoinLoop(void) { + // set an initial condition so that setNextChannel()'s preconds are met + LMIC.txChnl = 0xFF; + + // then chose a new channel. This gives us a random first channel for + // the join. The join logic uses the current txChnl, + // then changes after the rx window expires; so we need to set a valid + // starting point. + setNextChannel(0, 64, LMIC.activeChannels125khz); + + // make sure LMIC.txend is valid. + LMIC.txend = os_getTime(); + ASSERT((LMIC.opmode & OP_NEXTCHNL) == 0); + + // make sure the datarate is set to DR2 per LoRaWAN regional reqts V1.0.2, + // section 2.*.2 + LMICcore_setDrJoin(DRCHG_SET, LMICbandplan_getInitialDrJoin()); + + // TODO(tmm@mcci.com) need to implement the transmit randomization and + // duty cycle restrictions from LoRaWAN V1.0.2 section 7. +} +#endif // !DISABLE_JOIN + +#if !defined(DISABLE_JOIN) +// +// TODO(tmm@mcci.com): +// +// The definition of this is a little strange. this seems to return a time, but +// in reality it returns 0 if the caller should continue scanning through +// channels, and 1 if the caller has scanned all channels on this session, +// and therefore should reset to the beginning. The IBM 1.6 code is the +// same way, so apparently I just carried this across. We should declare +// as bool_t and change callers to use the result clearly as a flag. +// +ostime_t LMICuslike_nextJoinState(void) { + // Try the following: + // DR0 (SF10) on a random channel 0..63 + // (honoring enable mask) + // DR4 (SF8C) on a random 500 kHz channel 64..71 + // (always determined by + // previously selected + // 125 kHz channel) + // + u1_t failed = 0; + // TODO(tmm@mcci.com) parameterize for US-like + if (LMIC.datarate != LMICuslike_getFirst500kHzDR()) { + // assume that 500 kHz equiv of last 125 kHz channel + // is also enabled, and use it next. + LMIC.txChnl_125kHz = LMIC.txChnl; + LMIC.txChnl = 64 + (LMIC.txChnl >> 3); + LMICcore_setDrJoin(DRCHG_SET, LMICuslike_getFirst500kHzDR()); + } + else { + // restore invariant + LMIC.txChnl = LMIC.txChnl_125kHz; + setNextChannel(0, 64, LMIC.activeChannels125khz); + + // TODO(tmm@mcci.com) parameterize + s1_t dr = LMICuslike_getJoin125kHzDR(); + if ((++LMIC.txCnt & 0x7) == 0) { + failed = 1; // All DR exhausted - signal failed + } + LMICcore_setDrJoin(DRCHG_SET, dr); + } + // tell the main loop that we've already selected a channel. + LMIC.opmode &= ~OP_NEXTCHNL; + + // TODO(tmm@mcci.com): change delay to (0:1) secs + a known t0, but randomized; + // starting adding a bias after 1 hour, 25 hours, etc.; and limit the duty + // cycle on power up. For testability, add a way to set the join start time + // externally (a test API) so we can check this feature. + // See https://github.com/mcci-catena/arduino-lmic/issues/2 + // Current code doesn't match LoRaWAN 1.0.2 requirements. + + LMIC.txend = os_getTime() + + (isTESTMODE() + // Avoid collision with JOIN ACCEPT being sent by GW (but we missed it - GW is still busy) + ? DNW2_SAFETY_ZONE + // Otherwise: randomize join (street lamp case): + // SF10:16, SF9=8,..SF8C:1secs + : LMICcore_rndDelay(16 >> LMIC.datarate)); + // 1 - triggers EV_JOIN_FAILED event + return failed; +} +#endif + +#if !defined(DISABLE_JOIN) +void LMICuslike_processJoinAcceptCFList(void) { + if ( LMICbandplan_hasJoinCFlist() && + LMIC.frame[OFF_CFLIST + 15] == LORAWAN_JoinAccept_CFListType_MASK ) { + u1_t dlen; + + dlen = OFF_CFLIST; + for( u1_t chidx = 0; chidx < 8 * sizeof(LMIC.channelMap); chidx += 16, dlen += 2 ) { + u2_t mask = os_rlsbf2(&LMIC.frame[dlen]); +#if LMIC_DEBUG_LEVEL > 1 + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": Setup channel mask, group=%u, mask=%04x\n", os_getTime(), chidx, mask); +#endif + for ( u1_t chnum = chidx; chnum < chidx + 16; ++chnum, mask >>= 1) { + if (chnum >= 72) { + break; + } else if (mask & 1) { + LMIC_enableChannel(chnum); + } else { + LMIC_disableChannel(chnum); + } + } + } + } +} +#endif // !DISABLE_JOIN + +void LMICuslike_saveAdrState(lmic_saved_adr_state_t *pStateBuffer) { + os_copyMem( + pStateBuffer->channelMap, + LMIC.channelMap, + sizeof(LMIC.channelMap) + ); + pStateBuffer->activeChannels125khz = LMIC.activeChannels125khz; + pStateBuffer->activeChannels500khz = LMIC.activeChannels500khz; +} + +void LMICuslike_restoreAdrState(const lmic_saved_adr_state_t *pStateBuffer) { + os_copyMem( + LMIC.channelMap, + pStateBuffer->channelMap, + sizeof(LMIC.channelMap) + ); + LMIC.activeChannels125khz = pStateBuffer->activeChannels125khz; + LMIC.activeChannels500khz = pStateBuffer->activeChannels500khz; +} + + +bit_t LMICuslike_compareAdrState(const lmic_saved_adr_state_t *pStateBuffer) { + return memcmp(pStateBuffer->channelMap, LMIC.channelMap, sizeof(LMIC.channelMap)) != 0; +} + +#endif // CFG_LMIC_US_like diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.h new file mode 100644 index 0000000..f3e8bfc --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_us_like.h @@ -0,0 +1,121 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* Copyright (c) 2017, 2019 MCCI Corporation. +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lmic_us_like_h_ +# define _lmic_us_like_h_ + +// make sure we want US-like code +#if !CFG_LMIC_US_like +# error "lmic not configured for us-like bandplan" +#endif + +// TODO(tmm@mcci.com): this should come from the lmic.h or lorabase.h file; and +// it's probably affected by the fix to this issue: +// https://github.com/mcci-catena/arduino-lmic/issues/2 +#define DNW2_SAFETY_ZONE ms2osticks(750) + +#define IS_CHANNEL_125khz(c) (c<64) +#define IS_CHANNEL_500khz(c) (c>=64 && c<72) +#define ENABLED_CHANNEL(chnl) ((LMIC.channelMap[(chnl >> 4)] & (1<<(chnl & 0x0F))) != 0) + +// library functions: called from bandplan +void LMICuslike_initJoinLoop(void); + +// provide the isValidBeacon1 function -- int for bool. +static inline int +LMICuslike_isValidBeacon1(const uint8_t *d) { + return os_rlsbf2(&d[OFF_BCN_CRC1]) != os_crc16(d, OFF_BCN_CRC1); +} + +#define LMICbandplan_isValidBeacon1(pFrame) LMICuslike_isValidBeacon1(pFrame) + +// provide a default for LMICbandplan_isFSK() +#define LMICbandplan_isFSK() (0) + +// provide a default LMICbandplan_txDoneFSK() +#define LMICbandplan_txDoneFSK(delay, func) do { } while (0) + +// provide a default LMICbandplan_joinAcceptChannelClear() +#define LMICbandplan_joinAcceptChannelClear() do { } while (0) + +/// \brief there's a CFList on joins for US-like plans +#define LMICbandplan_hasJoinCFlist() (1) + +/// \brief process CFLists from JoinAccept for EU-like regions +void LMICuslike_processJoinAcceptCFList(void); +/// \brief by default, EU-like plans use LMICuslike_processJoinAcceptCFList +#define LMICbandplan_processJoinAcceptCFList LMICuslike_processJoinAcceptCFList + + +#define LMICbandplan_advanceBeaconChannel() \ + do { LMIC.bcnChnl = (LMIC.bcnChnl+1) & 7; } while (0) + +// TODO(tmm@mcci.com): decide whether we want to do this on every +// reset or just restore the last sub-band selected by the user. +#define LMICbandplan_resetDefaultChannels() \ + LMICbandplan_initDefaultChannels(/* normal */ 0) + +void LMICuslike_initDefaultChannels(bit_t fJoin); +#define LMICbandplan_initDefaultChannels(fJoin) LMICuslike_initDefaultChannels(fJoin) + +#define LMICbandplan_setSessionInitDefaultChannels() \ + do { /* nothing */} while (0) + +bit_t LMICuslike_canMapChannels(u1_t chpage, u2_t chmap); +#define LMICbandplan_canMapChannels(chpage, chmap) LMICuslike_canMapChannels(chpage, chmap) + +bit_t LMICuslike_mapChannels(u1_t chpage, u2_t chmap); +#define LMICbandplan_mapChannels(chpage, chmap) LMICuslike_mapChannels(chpage, chmap) + +ostime_t LMICuslike_nextTx(ostime_t now); +#define LMICbandplan_nextTx(now) LMICuslike_nextTx(now) + +ostime_t LMICuslike_nextJoinState(void); +#define LMICbandplan_nextJoinState() LMICuslike_nextJoinState(); + +static inline ostime_t LMICuslike_nextJoinTime(ostime_t now) { + return now; +} +#define LMICbandplan_nextJoinTime(now) LMICuslike_nextJoinTime(now) + +#define LMICbandplan_init() \ + do { /* nothing */ } while (0) + +void LMICuslike_saveAdrState(lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_saveAdrState(pState) LMICuslike_saveAdrState(pState) + +bit_t LMICuslike_compareAdrState(const lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_compareAdrState(pState) LMICuslike_compareAdrState(pState) + +void LMICuslike_restoreAdrState(const lmic_saved_adr_state_t *pStateBuffer); +#define LMICbandplan_restoreAdrState(pState) LMICuslike_restoreAdrState(pState) + +bit_t LMICuslike_isDataRateFeasible(dr_t dr); +#define LMICbandplan_isDataRateFeasible(dr) LMICuslike_isDataRateFeasible(dr) + +#endif // _lmic_us_like_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.c new file mode 100644 index 0000000..0d56c25 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.c @@ -0,0 +1,335 @@ +/* + +Module: lmic_util.c + +Function: + Encoding and decoding utilities for LMIC clients. + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI September 2019 + +*/ + +#include "lmic_util.h" + +#include <math.h> + +/* + +Name: LMIC_f2sflt16() + +Function: + Encode a floating point number into a uint16_t. + +Definition: + uint16_t LMIC_f2sflt16( + float f + ); + +Description: + The float to be transmitted must be a number in the range (-1.0, 1.0). + It is converted to 16-bit integer formatted as follows: + + bits 15: sign + bits 14..11: biased exponent + bits 10..0: mantissa + + The float is properly rounded, and saturates. + + Note that the encoded value is sign/magnitude format, rather than + two's complement for negative values. + +Returns: + 0xFFFF for negative values <= 1.0; + 0x7FFF for positive values >= 1.0; + Otherwise an appropriate float. + +*/ + +uint16_t +LMIC_f2sflt16( + float f + ) + { + if (f <= -1.0) + return 0xFFFF; + else if (f >= 1.0) + return 0x7FFF; + else + { + int iExp; + float normalValue; + uint16_t sign; + + normalValue = frexpf(f, &iExp); + + sign = 0; + if (normalValue < 0) + { + // set the "sign bit" of the result + // and work with the absolute value of normalValue. + sign = 0x8000; + normalValue = -normalValue; + } + + // abs(f) is supposed to be in [0..1), so useful exp + // is [0..-15] + iExp += 15; + if (iExp < 0) + iExp = 0; + + // bit 15 is the sign + // bits 14..11 are the exponent + // bits 10..0 are the fraction + // we conmpute the fraction and then decide if we need to round. + uint16_t outputFraction = ldexpf(normalValue, 11) + 0.5; + if (outputFraction >= (1 << 11u)) + { + // reduce output fraction + outputFraction = 1 << 10; + // increase exponent + ++iExp; + } + + // check for overflow and return max instead. + if (iExp > 15) + return 0x7FFF | sign; + + return (uint16_t)(sign | (iExp << 11u) | outputFraction); + } + } + +/* + +Name: LMIC_f2sflt12() + +Function: + Encode a floating point number into a uint16_t using only 12 bits. + +Definition: + uint16_t LMIC_f2sflt16( + float f + ); + +Description: + The float to be transmitted must be a number in the range (-1.0, 1.0). + It is converted to 16-bit integer formatted as follows: + + bits 15-12: zero + bit 11: sign + bits 10..7: biased exponent + bits 6..0: mantissa + + The float is properly rounded, and saturates. + + Note that the encoded value is sign/magnitude format, rather than + two's complement for negative values. + +Returns: + 0xFFF for negative values <= 1.0; + 0x7FF for positive values >= 1.0; + Otherwise an appropriate float. + +*/ + +uint16_t +LMIC_f2sflt12( + float f + ) + { + if (f <= -1.0) + return 0xFFF; + else if (f >= 1.0) + return 0x7FF; + else + { + int iExp; + float normalValue; + uint16_t sign; + + normalValue = frexpf(f, &iExp); + + sign = 0; + if (normalValue < 0) + { + // set the "sign bit" of the result + // and work with the absolute value of normalValue. + sign = 0x800; + normalValue = -normalValue; + } + + // abs(f) is supposed to be in [0..1), so useful exp + // is [0..-15] + iExp += 15; + if (iExp < 0) + iExp = 0; + + // bit 15 is the sign + // bits 14..11 are the exponent + // bits 10..0 are the fraction + // we conmpute the fraction and then decide if we need to round. + uint16_t outputFraction = ldexpf(normalValue, 7) + 0.5; + if (outputFraction >= (1 << 7u)) + { + // reduce output fraction + outputFraction = 1 << 6; + // increase exponent + ++iExp; + } + + // check for overflow and return max instead. + if (iExp > 15) + return 0x7FF | sign; + + return (uint16_t)(sign | (iExp << 7u) | outputFraction); + } + } + +/* + +Name: LMIC_f2uflt16() + +Function: + Encode a floating point number into a uint16_t. + +Definition: + uint16_t LMIC_f2uflt16( + float f + ); + +Description: + The float to be transmitted must be a number in the range [0, 1.0). + It is converted to 16-bit integer formatted as follows: + + bits 15..12: biased exponent + bits 11..0: mantissa + + The float is properly rounded, and saturates. + + Note that the encoded value is sign/magnitude format, rather than + two's complement for negative values. + +Returns: + 0x0000 for values < 0.0; + 0xFFFF for positive values >= 1.0; + Otherwise an appropriate encoding of the input float. + +*/ + +uint16_t +LMIC_f2uflt16( + float f + ) + { + if (f < 0.0) + return 0; + else if (f >= 1.0) + return 0xFFFF; + else + { + int iExp; + float normalValue; + + normalValue = frexpf(f, &iExp); + + // f is supposed to be in [0..1), so useful exp + // is [0..-15] + iExp += 15; + if (iExp < 0) + // underflow. + iExp = 0; + + // bits 15..12 are the exponent + // bits 11..0 are the fraction + // we conmpute the fraction and then decide if we need to round. + uint16_t outputFraction = ldexpf(normalValue, 12) + 0.5; + if (outputFraction >= (1 << 12u)) + { + // reduce output fraction + outputFraction = 1 << 11; + // increase exponent + ++iExp; + } + + // check for overflow and return max instead. + if (iExp > 15) + return 0xFFFF; + + return (uint16_t)((iExp << 12u) | outputFraction); + } + } + +/* + +Name: LMIC_f2uflt12() + +Function: + Encode positive floating point number into a uint16_t using only 12 bits. + +Definition: + uint16_t LMIC_f2sflt16( + float f + ); + +Description: + The float to be transmitted must be a number in the range [0, 1.0). + It is converted to 16-bit integer formatted as follows: + + bits 15-12: zero + bits 11..8: biased exponent + bits 7..0: mantissa + + The float is properly rounded, and saturates. + +Returns: + 0x000 for negative values < 0.0; + 0xFFF for positive values >= 1.0; + Otherwise an appropriate float. + +*/ + +uint16_t +LMIC_f2uflt12( + float f + ) + { + if (f < 0.0) + return 0x000; + else if (f >= 1.0) + return 0xFFF; + else + { + int iExp; + float normalValue; + + normalValue = frexpf(f, &iExp); + + // f is supposed to be in [0..1), so useful exp + // is [0..-15] + iExp += 15; + if (iExp < 0) + // graceful underflow + iExp = 0; + + // bits 11..8 are the exponent + // bits 7..0 are the fraction + // we conmpute the fraction and then decide if we need to round. + uint16_t outputFraction = ldexpf(normalValue, 8) + 0.5; + if (outputFraction >= (1 << 8u)) + { + // reduce output fraction + outputFraction = 1 << 7; + // increase exponent + ++iExp; + } + + // check for overflow and return max instead. + if (iExp > 15) + return 0xFFF; + + return (uint16_t)((iExp << 8u) | outputFraction); + } + } diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.h new file mode 100644 index 0000000..7e1b3c8 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lmic_util.h @@ -0,0 +1,34 @@ +/* + +Module: lmic_util.h + +Function: + Declare encoding and decoding utilities for LMIC clients. + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI September 2018 + +*/ + +#ifndef _LMIC_UTIL_H_ +# define _LMIC_UTIL_H_ + +#ifdef __cplusplus +extern "C" { +#endif + +#include <stdint.h> + +uint16_t LMIC_f2sflt16(float); +uint16_t LMIC_f2sflt12(float); +uint16_t LMIC_f2uflt16(float); +uint16_t LMIC_f2uflt12(float); + +#ifdef __cplusplus +} +#endif + +#endif /* _LMIC_UTIL_H_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase.h new file mode 100644 index 0000000..632a8b4 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase.h @@ -0,0 +1,665 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2017-2021 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#ifndef _lorabase_h_ +#define _lorabase_h_ + +#ifdef __cplusplus +extern "C"{ +#endif + +// ================================================================================ +// BEG: Keep in sync with lorabase.hpp +// + +enum _cr_t { CR_4_5=0, CR_4_6, CR_4_7, CR_4_8 }; +enum _sf_t { FSK=0, SF7, SF8, SF9, SF10, SF11, SF12, SFrfu }; +enum _bw_t { BW125=0, BW250, BW500, BWrfu }; +typedef u1_t cr_t; +typedef u1_t sf_t; +typedef u1_t bw_t; +typedef u1_t dr_t; +typedef u2_t rxsyms_t; + +// Radio parameter set (encodes SF/BW/CR/IH/NOCRC) +// 2..0: Spreading factor +// 4..3: bandwidth: 0 == 125kHz, 1 == 250 kHz, 2 == 500 kHz. 3 == reserved. +// 6..5: coding rate: 0 == 4/5, 1 == 4/6, 2 == 4/7, 3 == 4/8 +// 7: nocrc: 0 == with crc, 1 == without crc +// 15..8: Implicit header control: 0 ==> none, 1..0xFF ==> length in bytes. + +typedef u2_t rps_t; +TYPEDEF_xref2rps_t; + +enum { ILLEGAL_RPS = 0xFF }; + +// Global maximum frame length +enum { STD_PREAMBLE_LEN = 8 }; +enum { MAX_LEN_FRAME = LMIC_MAX_FRAME_LENGTH }; +enum { LEN_DEVNONCE = 2 }; +enum { LEN_ARTNONCE = 3 }; +enum { LEN_NETID = 3 }; +enum { DELAY_JACC1 = 5 }; // in secs +enum { DELAY_DNW1 = 1 }; // in secs down window #1 +enum { DELAY_EXTDNW2 = 1 }; // in secs +enum { DELAY_JACC2 = DELAY_JACC1+(int)DELAY_EXTDNW2 }; // in secs +enum { DELAY_DNW2 = DELAY_DNW1 +(int)DELAY_EXTDNW2 }; // in secs down window #1 +enum { BCN_INTV_exp = 7 }; +enum { BCN_INTV_sec = 1<<BCN_INTV_exp }; +enum { BCN_INTV_ms = BCN_INTV_sec*1000L }; +enum { BCN_INTV_us = BCN_INTV_ms*1000L }; +enum { BCN_RESERVE_ms = 2120 }; // space reserved for beacon and NWK management +enum { BCN_GUARD_ms = 3000 }; // end of beacon period to prevent interference with beacon +enum { BCN_SLOT_SPAN_ms = 30 }; // 2^12 reception slots a this span +enum { BCN_WINDOW_ms = BCN_INTV_ms-(int)BCN_GUARD_ms-(int)BCN_RESERVE_ms }; +enum { BCN_RESERVE_us = 2120000 }; +enum { BCN_GUARD_us = 3000000 }; +enum { BCN_SLOT_SPAN_us = 30000 }; + +// there are exactly 16 datarates +enum _dr_code_t { + LORAWAN_DR0 = 0, + LORAWAN_DR1, + LORAWAN_DR2, + LORAWAN_DR3, + LORAWAN_DR4, + LORAWAN_DR5, + LORAWAN_DR6, + LORAWAN_DR7, + LORAWAN_DR8, + LORAWAN_DR9, + LORAWAN_DR10, + LORAWAN_DR11, + LORAWAN_DR12, + LORAWAN_DR13, + LORAWAN_DR14, + LORAWAN_DR15, + LORAWAN_DR_LENGTH // 16, for sizing arrays. +}; + +// post conditions from this block: symbols used by general code that is not +// ostensiblly region-specific. +// DR_DFLTMIN must be defined as a suitable substititute value if we get a bogus DR +// It is misnamed, it should be the maximum DR (which is the minimum SF) for +// 125 kHz. +// DR_PAGE is used only for a non-supported debug system, but should be defined. +// CHNL_DNW2 is the channel to be used for RX2 +// FREQ_DNW2 is the frequency to be used for RX2 +// DR_DNW2 is the data-rate to be used for RX2 +// +// The Class B stuff is untested and definitely wrong in parts for LoRaWAN 1.02 +// CHNL_PING is the channel to be used for pinging. +// FREQ_PING is the default ping channel frequency +// DR_PING is the data-rate to be used for pings. +// CHNL_BCN is the channel to be used for the beacon (or perhaps the start chan) +// FREQ_BCN is the frequency to be used for the beacon +// DR_BCN is the datarate to be used for the beacon +// AIRTIME_BCN is the airtime for the beacon + + + +#if defined(CFG_eu868) // ============================================== + +#include "lorabase_eu868.h" + +// per 2.1.3: not implemented +#define LMIC_ENABLE_TxParamSetupReq 0 + +enum { DR_DFLTMIN = EU868_DR_SF7 }; // DR5 + // DR_PAGE is a debugging parameter +enum { DR_PAGE = DR_PAGE_EU868 }; + +//enum { CHNL_PING = 5 }; +enum { FREQ_PING = EU868_F6 }; // default ping freq +enum { DR_PING = EU868_DR_SF9 }; // default ping DR + //enum { CHNL_DNW2 = 5 }; +enum { FREQ_DNW2 = EU868_F6 }; +enum { DR_DNW2 = EU868_DR_SF12 }; +enum { CHNL_BCN = 5 }; +enum { FREQ_BCN = EU868_F6 }; +enum { DR_BCN = EU868_DR_SF9 }; +enum { AIRTIME_BCN = 144384 }; // micros +enum { LMIC_REGION_EIRP = EU868_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format EU SF9 + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 3, + OFF_BCN_CRC1 = 7, + OFF_BCN_INFO = 8, + OFF_BCN_LAT = 9, + OFF_BCN_LON = 12, + OFF_BCN_CRC2 = 15, + LEN_BCN = 17 +}; + +// for backwards compatibility. This must match _dr_eu868_t +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF12 = EU868_DR_SF12, + DR_SF11 = EU868_DR_SF11, + DR_SF10 = EU868_DR_SF10, + DR_SF9 = EU868_DR_SF9, + DR_SF8 = EU868_DR_SF8, + DR_SF7 = EU868_DR_SF7, + DR_SF7B = EU868_DR_SF7B, + DR_FSK = EU868_DR_FSK, + DR_NONE = EU868_DR_NONE +}; +# endif // LMIC_DR_LEGACY + +#elif defined(CFG_us915) // ========================================= + +#include "lorabase_us915.h" + +// per 2.2.3: not implemented +#define LMIC_ENABLE_TxParamSetupReq 0 + +enum { DR_DFLTMIN = US915_DR_SF7 }; // DR5 + +// DR_PAGE is a debugging parameter; it must be defined but it has no use in arduino-lmic +enum { DR_PAGE = DR_PAGE_US915 }; + +//enum { CHNL_PING = 0 }; // used only for default init of state (follows beacon - rotating) +enum { FREQ_PING = US915_500kHz_DNFBASE + 0*US915_500kHz_DNFSTEP }; // default ping freq +enum { DR_PING = US915_DR_SF10CR }; // default ping DR +//enum { CHNL_DNW2 = 0 }; +enum { FREQ_DNW2 = US915_500kHz_DNFBASE + 0*US915_500kHz_DNFSTEP }; +enum { DR_DNW2 = US915_DR_SF12CR }; +enum { CHNL_BCN = 0 }; // used only for default init of state (rotating beacon scheme) +enum { DR_BCN = US915_DR_SF12CR }; +// TODO(tmm@mcci.com): check this, as beacon DR was SF10 in IBM code. +enum { AIRTIME_BCN = 72192 }; // micros +enum { LMIC_REGION_EIRP = US915_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format US SF10 + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 3, + OFF_BCN_CRC1 = 7, + OFF_BCN_INFO = 9, + OFF_BCN_LAT = 10, + OFF_BCN_LON = 13, + OFF_BCN_RFU1 = 16, + OFF_BCN_CRC2 = 17, + LEN_BCN = 19 +}; + +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF10 = US915_DR_SF10, + DR_SF9 = US915_DR_SF9, + DR_SF8 = US915_DR_SF8, + DR_SF7 = US915_DR_SF7, + DR_SF8C = US915_DR_SF8C, + DR_NONE = US915_DR_NONE, + DR_SF12CR = US915_DR_SF12CR, + DR_SF11CR = US915_DR_SF11CR, + DR_SF10CR = US915_DR_SF10CR, + DR_SF9CR = US915_DR_SF9CR, + DR_SF8CR = US915_DR_SF8CR, + DR_SF7CR = US915_DR_SF7CR +}; +# endif // LMIC_DR_LEGACY + +#elif defined(CFG_au915) // ========================================= + +#include "lorabase_au915.h" + +// per 2.5.3: must be implemented +#define LMIC_ENABLE_TxParamSetupReq 1 + +enum { DR_DFLTMIN = AU915_DR_SF7 }; // DR5 + + // DR_PAGE is a debugging parameter; it must be defined but it has no use in arduino-lmic +enum { DR_PAGE = DR_PAGE_AU915 }; + +//enum { CHNL_PING = 0 }; // used only for default init of state (follows beacon - rotating) +enum { FREQ_PING = AU915_500kHz_DNFBASE + 0*AU915_500kHz_DNFSTEP }; // default ping freq +enum { DR_PING = AU915_DR_SF10CR }; // default ping DR +//enum { CHNL_DNW2 = 0 }; +enum { FREQ_DNW2 = AU915_500kHz_DNFBASE + 0*AU915_500kHz_DNFSTEP }; +enum { DR_DNW2 = AU915_DR_SF12CR }; // DR8 +enum { CHNL_BCN = 0 }; // used only for default init of state (rotating beacon scheme) +enum { DR_BCN = AU915_DR_SF10CR }; +enum { AIRTIME_BCN = 72192 }; // micros ... TODO(tmm@mcci.com) check. +enum { LMIC_REGION_EIRP = AU915_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format AU DR10/SF10 500kHz + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 3, + OFF_BCN_CRC1 = 7, + OFF_BCN_INFO = 9, + OFF_BCN_LAT = 10, + OFF_BCN_LON = 13, + OFF_BCN_RFU1 = 16, + OFF_BCN_CRC2 = 17, + LEN_BCN = 19 +}; + +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF12 = AU915_DR_SF12, + DR_SF11 = AU915_DR_SF11, + DR_SF10 = AU915_DR_SF10, + DR_SF9 = AU915_DR_SF9, + DR_SF8 = AU915_DR_SF8, + DR_SF7 = AU915_DR_SF7, + DR_SF8C = AU915_DR_SF8C, + DR_NONE = AU915_DR_NONE, + DR_SF12CR = AU915_DR_SF12CR, + DR_SF11CR = AU915_DR_SF11CR, + DR_SF10CR = AU915_DR_SF10CR, + DR_SF9CR = AU915_DR_SF9CR, + DR_SF8CR = AU915_DR_SF8CR, + DR_SF7CR = AU915_DR_SF7CR +}; +# endif // LMIC_DR_LEGACY + +#elif defined(CFG_as923) // ============================================== + +#include "lorabase_as923.h" + +// per 2.7.3: must be implemented +#define LMIC_ENABLE_TxParamSetupReq 1 + +enum { DR_DFLTMIN = AS923_DR_SF10 }; // DR2 + // DR_PAGE is a debugging parameter +enum { DR_PAGE = DR_PAGE_AS923 }; + +enum { FREQ_PING = AS923_F2 }; // default ping freq +enum { DR_PING = AS923_DR_SF9 }; // default ping DR: DR3 +enum { FREQ_DNW2 = AS923_FDOWN }; +enum { DR_DNW2 = AS923_DR_SF10 }; +enum { CHNL_BCN = 5 }; +enum { FREQ_BCN = AS923_FBCN }; +enum { DR_BCN = AS923_DR_SF9 }; +enum { AIRTIME_BCN = 144384 }; // micros +enum { LMIC_REGION_EIRP = AS923_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format AS SF9 + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 2, + OFF_BCN_CRC1 = 6, + OFF_BCN_INFO = 8, + OFF_BCN_LAT = 9, + OFF_BCN_LON = 12, + OFF_BCN_CRC2 = 15, + LEN_BCN = 17 +}; + +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF12 = AS923_DR_SF12, + DR_SF11 = AS923_DR_SF11, + DR_SF10 = AS923_DR_SF10, + DR_SF9 = AS923_DR_SF9, + DR_SF8 = AS923_DR_SF8, + DR_SF7 = AS923_DR_SF7, + DR_SF7B = AS923_DR_SF7B, + DR_FSK = AS923_DR_FSK, + DR_NONE = AS923_DR_NONE +}; +# endif // LMIC_DR_LEGACY + +#elif defined(CFG_kr920) // ============================================== + +#include "lorabase_kr920.h" + +// per 2.8.3 (1.0.3 2.9.3): is not implemented +#define LMIC_ENABLE_TxParamSetupReq 0 + +enum { DR_DFLTMIN = KR920_DR_SF12 }; // DR2 + // DR_PAGE is a debugging parameter +enum { DR_PAGE = DR_PAGE_KR920 }; + +enum { FREQ_PING = KR920_FBCN }; // default ping freq +enum { DR_PING = KR920_DR_SF9 }; // default ping DR: DR3 +enum { FREQ_DNW2 = KR920_FDOWN }; +enum { DR_DNW2 = KR920_DR_SF12 }; +enum { CHNL_BCN = 11 }; +enum { FREQ_BCN = KR920_FBCN }; +enum { DR_BCN = KR920_DR_SF9 }; +enum { AIRTIME_BCN = 144384 }; // micros +enum { LMIC_REGION_EIRP = KR920_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format KR SF9 + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 2, + OFF_BCN_CRC1 = 6, + OFF_BCN_INFO = 8, + OFF_BCN_LAT = 9, + OFF_BCN_LON = 12, + OFF_BCN_CRC2 = 15, + LEN_BCN = 17 +}; + +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF12 = KR920_DR_SF12, + DR_SF11 = KR920_DR_SF11, + DR_SF10 = KR920_DR_SF10, + DR_SF9 = KR920_DR_SF9, + DR_SF8 = KR920_DR_SF8, + DR_SF7 = KR920_DR_SF7, + DR_NONE = KR920_DR_NONE +}; +# endif // LMIC_DR_LEGACY + +#elif defined(CFG_in866) // ============================================== + +#include "lorabase_in866.h" + +// per 2.9.3: not implemented +#define LMIC_ENABLE_TxParamSetupReq 0 + +enum { DR_DFLTMIN = IN866_DR_SF7 }; // DR5 +enum { DR_PAGE = DR_PAGE_IN866 }; // DR_PAGE is a debugging parameter + +enum { FREQ_PING = IN866_FB }; // default ping freq +enum { DR_PING = IN866_DR_SF8 }; // default ping DR +enum { FREQ_DNW2 = IN866_FB }; +enum { DR_DNW2 = IN866_DR_SF10 }; +enum { CHNL_BCN = 5 }; +enum { FREQ_BCN = IN866_FB }; +enum { DR_BCN = IN866_DR_SF8 }; +enum { AIRTIME_BCN = 144384 }; // micros +enum { LMIC_REGION_EIRP = IN866_LMIC_REGION_EIRP }; // region uses EIRP + +enum { + // Beacon frame format IN SF9 + OFF_BCN_NETID = 0, + OFF_BCN_TIME = 1, + OFF_BCN_CRC1 = 5, + OFF_BCN_INFO = 7, + OFF_BCN_LAT = 8, + OFF_BCN_LON = 11, + OFF_BCN_CRC2 = 17, + LEN_BCN = 19 +}; + +# if LMIC_DR_LEGACY +enum _dr_configured_t { + DR_SF12 = IN866_DR_SF12, // DR0 + DR_SF11 = IN866_DR_SF11, // DR1 + DR_SF10 = IN866_DR_SF10, // DR2 + DR_SF9 = IN866_DR_SF9, // DR3 + DR_SF8 = IN866_DR_SF8, // DR4 + DR_SF7 = IN866_DR_SF7, // DR5 + DR_FSK = IN866_DR_FSK, // DR7 + DR_NONE = IN866_DR_NONE +}; +# endif // LMIC_DR_LEGACY + +#else +# error Unsupported configuration setting +#endif // =================================================== + +enum { + // Join Request frame format + OFF_JR_HDR = 0, + OFF_JR_ARTEUI = 1, + OFF_JR_DEVEUI = 9, + OFF_JR_DEVNONCE = 17, + OFF_JR_MIC = 19, + LEN_JR = 23 +}; +enum { + // Join Accept frame format + OFF_JA_HDR = 0, + OFF_JA_ARTNONCE = 1, + OFF_JA_NETID = 4, + OFF_JA_DEVADDR = 7, + OFF_JA_RFU = 11, + OFF_JA_DLSET = 11, + OFF_JA_RXDLY = 12, + OFF_CFLIST = 13, + LEN_JA = 17, + LEN_JAEXT = 17+16 +}; + +enum { + // JoinAccept CFList types + LORAWAN_JoinAccept_CFListType_FREQUENCIES = 0, ///< the CFList contains 5 frequencies + LORAWAN_JoinAccept_CFListType_MASK = 1, ///< the CFList contains channel-mask data +}; + +enum { + // Data frame format + OFF_DAT_HDR = 0, + OFF_DAT_ADDR = 1, + OFF_DAT_FCT = 5, + OFF_DAT_SEQNO = 6, + OFF_DAT_OPTS = 8, +}; +enum { MAX_LEN_PAYLOAD = MAX_LEN_FRAME-(int)OFF_DAT_OPTS-4 }; +enum { + // Bitfields in frame format octet + HDR_FTYPE = 0xE0, + HDR_RFU = 0x1C, + HDR_MAJOR = 0x03 +}; +enum { HDR_FTYPE_DNFLAG = 0x20 }; // flags DN frame except for HDR_FTYPE_PROP +enum { + // Values of frame type bit field + HDR_FTYPE_JREQ = 0x00, + HDR_FTYPE_JACC = 0x20, + HDR_FTYPE_DAUP = 0x40, // data (unconfirmed) up + HDR_FTYPE_DADN = 0x60, // data (unconfirmed) dn + HDR_FTYPE_DCUP = 0x80, // data confirmed up + HDR_FTYPE_DCDN = 0xA0, // data confirmed dn + HDR_FTYPE_PROP = 0xE0 +}; +enum { + HDR_MAJOR_V1 = 0x00, +}; +enum { + // Bitfields in frame control octet + FCT_ADREN = 0x80, + FCT_ADRACKReq = 0x40, + FCT_ACK = 0x20, + FCT_MORE = 0x10, // also in DN direction: Class B indicator + FCT_OPTLEN = 0x0F, +}; +enum { + // In UP direction: signals class B enabled + FCT_CLASSB = FCT_MORE +}; + +enum { + LWAN_FCtrl_FOptsLen_MAX = 0x0Fu, // maximum size of embedded MAC commands +}; + +enum { + NWKID_MASK = (int)0xFE000000, + NWKID_BITS = 7 +}; + +// MAC uplink commands downwlink too +enum { + // Class A + MCMD_LinkCheckReq = 0x02, // - + MCMD_LinkADRAns = 0x03, // u1:7-3:RFU, 3/2/1: pow/DR/Ch ACK + MCMD_DutyCycleAns = 0x04, // - + MCMD_RXParamSetupAns = 0x05, // u1:7-2:RFU 1/0:datarate/channel ack + MCMD_DevStatusAns = 0x06, // u1:battery 0,1-254,255=?, u1:7-6:RFU,5-0:margin(-32..31) + MCMD_NewChannelAns = 0x07, // u1: 7-2=RFU, 1/0:DR/freq ACK + MCMD_RXTimingSetupAns = 0x08, // - + MCMD_TxParamSetupAns = 0x09, // - + MCMD_DlChannelAns = 0x0A, // u1: [7-2]:RFU 1:exists 0:OK + MCMD_DeviceTimeReq = 0x0D, // - + + // Class B + MCMD_PingSlotInfoReq = 0x10, // u1: 7=RFU, 6-4:interval, 3-0:datarate + MCMD_PingSlotChannelAns = 0x11, // u1: 7-1:RFU, 0:freq ok + MCMD_BeaconInfoReq = 0x12, // - (DEPRECATED) + MCMD_BeaconFreqAns = 0x13, // u1: 7-1:RFU, 0:freq ok +}; + +// MAC downlink commands +enum { + // Class A + MCMD_LinkCheckAns = 0x02, // u1:margin 0-254,255=unknown margin / u1:gwcnt LinkCheckReq + MCMD_LinkADRReq = 0x03, // u1:DR/TXPow, u2:chmask, u1:chpage/repeat + MCMD_DutyCycleReq = 0x04, // u1:255 dead [7-4]:RFU, [3-0]:cap 2^-k + MCMD_RXParamSetupReq = 0x05, // u1:7-4:RFU/3-0:datarate, u3:freq + MCMD_DevStatusReq = 0x06, // - + MCMD_NewChannelReq = 0x07, // u1:chidx, u3:freq, u1:DRrange + MCMD_RXTimingSetupReq = 0x08, // u1: [7-4]:RFU [3-0]: Delay 1-15s (0 => 1) + MCMD_TxParamSetupReq = 0x09, // u1: [7-6]:RFU [5:4]: dl dwell/ul dwell [3:0] max EIRP + MCMD_DlChannelReq = 0x0A, // u1: channel, u3: frequency + MCMD_DeviceTimeAns = 0x0D, // u4: seconds since epoch, u1: fractional second + + // Class B + MCMD_PingSlotInfoAns = 0x10, // - + MCMD_PingSlotChannelReq = 0x11, // u3: freq, u1:dr [7-4]:RFU [3:0]:datarate + MCMD_BeaconTimingAns = 0x12, // u2: delay(in TUNIT millis), u1:channel (DEPRECATED) + MCMD_BeaconFreqReq = 0x13, // u3: freq +}; + +enum { + MCMD_BeaconTimingAns_TUNIT = 30 // time unit of delay value in millis +}; +enum { + MCMD_LinkADRAns_RFU = 0xF8, // RFU bits + MCMD_LinkADRAns_PowerACK = 0x04, // 0=not supported power level + MCMD_LinkADRAns_DataRateACK = 0x02, // 0=unknown data rate + MCMD_LinkADRAns_ChannelACK = 0x01, // 0=unknown channel enabled +}; +enum { + MCMD_RXParamSetupAns_RFU = 0xF8, // RFU bits + MCMD_RXParamSetupAns_RX1DrOffsetAck = 0x04, // 0=dr2 not allowed + MCMD_RXParamSetupAns_RX2DataRateACK = 0x02, // 0=unknown data rate + MCMD_RXParamSetupAns_ChannelACK = 0x01, // 0=unknown channel enabled +}; +enum { + MCMD_NewChannelAns_RFU = 0xFC, // RFU bits + MCMD_NewChannelAns_DataRateACK = 0x02, // 0=unknown data rate + MCMD_NewChannelAns_ChannelACK = 0x01, // 0=rejected channel frequency +}; +enum { + MCMD_RXTimingSetupReq_RFU = 0xF0, // RFU bits + MCMD_RXTimingSetupReq_Delay = 0x0F, // delay in secs, 1..15; 0 is mapped to 1. +}; +enum { + MCMD_DlChannelAns_RFU = 0xFC, // RFU bits + MCMD_DlChannelAns_FreqACK = 0x02, // 0 = uplink frequency not defined for this channel + MCMD_DlChannelAns_ChannelACK = 0x01, // 0 = rejected channel freq +}; +enum { + MCMD_PingSlotFreqAns_RFU = 0xFC, + MCMD_PingSlotFreqAns_DataRateACK = 0x02, + MCMD_PingSlotFreqAns_ChannelACK = 0x01, +}; + +enum { + MCMD_DEVS_EXT_POWER = 0x00, // external power supply + MCMD_DEVS_BATT_MIN = 0x01, // min battery value + MCMD_DEVS_BATT_MAX = 0xFE, // max battery value + MCMD_DEVS_BATT_NOINFO = 0xFF, // unknown battery level +}; + +// Bit fields byte#3 of MCMD_LinkADRReq payload +enum { + MCMD_LinkADRReq_Redundancy_RFU = 0x80, + MCMD_LinkADRReq_Redundancy_ChMaskCntl_MASK= 0x70, + MCMD_LinkADRReq_Redundancy_NbTrans_MASK = 0x0F, + + MCMD_LinkADRReq_ChMaskCntl_EULIKE_DIRECT = 0x00, // direct masking for EU + MCMD_LinkADRReq_ChMaskCntl_EULIKE_ALL_ON = 0x60, // EU: enable everything. + + MCMD_LinkADRReq_ChMaskCntl_USLIKE_500K = 0x40, // mask is for the 8 us-like 500 kHz channels + MCMD_LinkADRReq_ChMaskCntl_USLIKE_SPECIAL = 0x50, // first special for us-like + MCMD_LinkADRReq_ChMaskCntl_USLIKE_BANK = 0x50, // special: bits are banks. + MCMD_LinkADRReq_ChMaskCntl_USLIKE_125ON = 0x60, // special channel page enable, bits applied to 64..71 + MCMD_LinkADRReq_ChMaskCntl_USLIKE_125OFF = 0x70, // special channel page: disble 125K, bits apply to 64..71 + + MCMD_LinkADRReq_ChMaskCntl_CN470_ALL_ON = 0x60, // turn all on for China. +}; + +// Bit fields byte#0 of MCMD_LinkADRReq payload +enum { + MCMD_LinkADRReq_DR_MASK = 0xF0, + MCMD_LinkADRReq_POW_MASK = 0x0F, + MCMD_LinkADRReq_DR_SHIFT = 4, + MCMD_LinkADRReq_POW_SHIFT = 0, +}; + +// bit fields of the TxParam request +enum { + MCMD_TxParam_RxDWELL_SHIFT = 5, + MCMD_TxParam_RxDWELL_MASK = 1 << MCMD_TxParam_RxDWELL_SHIFT, + MCMD_TxParam_TxDWELL_SHIFT = 4, + MCMD_TxParam_TxDWELL_MASK = 1 << MCMD_TxParam_TxDWELL_SHIFT, + MCMD_TxParam_MaxEIRP_SHIFT = 0, + MCMD_TxParam_MaxEIRP_MASK = 0xF << MCMD_TxParam_MaxEIRP_SHIFT, +}; + +// Device address +typedef u4_t devaddr_t; + +// RX quality (device) +enum { RSSI_OFF=64, SNR_SCALEUP=4 }; + +static inline sf_t getSf (rps_t params) { return (sf_t)(params & 0x7); } +static inline rps_t setSf (rps_t params, sf_t sf) { return (rps_t)((params & ~0x7) | sf); } +static inline bw_t getBw (rps_t params) { return (bw_t)((params >> 3) & 0x3); } +static inline rps_t setBw (rps_t params, bw_t cr) { return (rps_t)((params & ~0x18) | (cr<<3)); } +static inline cr_t getCr (rps_t params) { return (cr_t)((params >> 5) & 0x3); } +static inline rps_t setCr (rps_t params, cr_t cr) { return (rps_t)((params & ~0x60) | (cr<<5)); } +static inline int getNocrc(rps_t params) { return ((params >> 7) & 0x1); } +static inline rps_t setNocrc(rps_t params, int nocrc) { return (rps_t)((params & ~0x80) | (nocrc<<7)); } +static inline int getIh (rps_t params) { return ((params >> 8) & 0xFF); } +static inline rps_t setIh (rps_t params, int ih) { return (rps_t)((params & ~0xFF00) | (ih<<8)); } +static inline rps_t makeRps (sf_t sf, bw_t bw, cr_t cr, int ih, int nocrc) { + return sf | (bw<<3) | (cr<<5) | (nocrc?(1<<7):0) | ((ih&0xFF)<<8); +} +#define MAKERPS(sf,bw,cr,ih,nocrc) ((rps_t)((sf) | ((bw)<<3) | ((cr)<<5) | ((nocrc)?(1<<7):0) | ((ih&0xFF)<<8))) +// Two frames with params r1/r2 would interfere on air: same SFx + BWx +static inline int sameSfBw(rps_t r1, rps_t r2) { return ((r1^r2)&0x1F) == 0; } +static inline int isFasterDR (dr_t dr1, dr_t dr2) { return dr1 > dr2; } +static inline int isSlowerDR (dr_t dr1, dr_t dr2) { return dr1 < dr2; } + +// +// BEG: Keep in sync with lorabase.hpp +// ================================================================================ + + +// Calculate airtime +ostime_t calcAirTime (rps_t rps, u1_t plen); +// Sensitivity at given SF/BW +int getSensitivity (rps_t rps); + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif // _lorabase_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_as923.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_as923.h new file mode 100644 index 0000000..d65bb75 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_as923.h @@ -0,0 +1,105 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_as923_h_ +#define _lorabase_as923_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for AS923 (always in scope) +| +\****************************************************************************/ + +enum _dr_as923_t { + AS923_DR_SF12 = 0, + AS923_DR_SF11, + AS923_DR_SF10, + AS923_DR_SF9, + AS923_DR_SF8, + AS923_DR_SF7, + AS923_DR_SF7B, + AS923_DR_FSK, + AS923_DR_NONE +}; + +// Bands: +// g1 : 1% 16dBm +// freq band datarates +enum { + AS923_F1 = 923200000, // g1 SF7-12 + AS923_F2 = 923400000, // g1 SF7-12 + AS923_FDOWN = 923200000, // (RX2 freq, DR2) + AS923_FBCN = 923400000, // default BCN, DR3 + AS923_FPING = 923400000, // default ping, DR3 +}; +enum { + AS923_FREQ_MIN = 915000000, + AS923_FREQ_MAX = 928000000 +}; +enum { + AS923_TX_EIRP_MAX_DBM = 16 // 16 dBm +}; +enum { DR_PAGE_AS923 = 0x10 * (LMIC_REGION_as923 - 1) }; + +enum { AS923_LMIC_REGION_EIRP = 1 }; // region uses EIRP + +enum { AS923JP_LBT_US = 5000 }; // microseconds of LBT time -- 5000 ==> + // 5 ms. We use us rather than ms for + // future 128us support, and just for + // backward compatibility -- there + // is code that uses the _US constant, + // and it's awkward to break it. + +enum { AS923JP_LBT_DB_MAX = -80 }; // maximum channel strength in dB; if TX + // we measure more than this, we don't tx. + +// AS923 v1.1, all channels face a 1% duty cycle. So this will have to change +// in the future via a config. But this code base needs major changes for +// v1.1 in any case. +enum { AS923_V102_TX_CAP = 100 }; // v1.0.2 allows 100% + +#ifndef AS923_TX_CAP +# define AS923_TX_CAP AS923_V102_TX_CAP +#endif + +// TxParam defaults +enum { + // initial value of UplinkDwellTime before TxParamSetupReq received. + AS923_INITIAL_TxParam_UplinkDwellTime = 1, + // initial value of DownlinkDwellTime before TxParamSetupReq received. + AS923_INITIAL_TxParam_DownlinkDwellTime = 1, + AS923_UPLINK_DWELL_TIME_osticks = sec2osticks(20), +}; + +#endif /* _lorabase_as923_h_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_au915.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_au915.h new file mode 100644 index 0000000..7bac54e --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_au915.h @@ -0,0 +1,89 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_au915_h_ +#define _lorabase_au915_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for AU 915 (always in scope) +| +\****************************************************************************/ + +// Frequency plan for AU 915 MHz +enum _dr_au915_t { + AU915_DR_SF12 = 0, + AU915_DR_SF11, + AU915_DR_SF10, + AU915_DR_SF9, + AU915_DR_SF8, + AU915_DR_SF7, + AU915_DR_SF8C, + AU915_DR_NONE, + // Devices behind a router: + AU915_DR_SF12CR = 8, + AU915_DR_SF11CR, + AU915_DR_SF10CR, + AU915_DR_SF9CR, + AU915_DR_SF8CR, + AU915_DR_SF7CR +}; + +// Default frequency plan for AU 915MHz +enum { + AU915_125kHz_UPFBASE = 915200000, + AU915_125kHz_UPFSTEP = 200000, + AU915_500kHz_UPFBASE = 915900000, + AU915_500kHz_UPFSTEP = 1600000, + AU915_500kHz_DNFBASE = 923300000, + AU915_500kHz_DNFSTEP = 600000 +}; +enum { + AU915_FREQ_MIN = 915000000, + AU915_FREQ_MAX = 928000000 +}; +enum { + AU915_TX_EIRP_MAX_DBM = 30 // 30 dBm +}; +enum { + // initial value of UplinkDwellTime before TxParamSetupReq received. + AU915_INITIAL_TxParam_UplinkDwellTime = 1, + AU915_UPLINK_DWELL_TIME_osticks = sec2osticks(20), +}; + +enum { DR_PAGE_AU915 = 0x10 * (LMIC_REGION_au915 - 1) }; + +enum { AU915_LMIC_REGION_EIRP = 1 }; // region uses EIRP + +#endif /* _lorabase_au915_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_eu868.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_eu868.h new file mode 100644 index 0000000..0040ad0 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_eu868.h @@ -0,0 +1,92 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_eu868_h_ +#define _lorabase_eu868_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for EU868 (always in scope) +| +\****************************************************************************/ + +// +// Default frequency plan for EU 868MHz ISM band +// data rates +// this is a little confusing: the integer values of these constants are the +// DataRates from the LoRaWAN Regional Parmaeter spec. The names are just +// convenient indications, so we can use them in the rare case that we need to +// choose a DataRate by SF and configuration, not by DR code. + +enum _dr_eu868_t { + EU868_DR_SF12 = 0, + EU868_DR_SF11, + EU868_DR_SF10, + EU868_DR_SF9, + EU868_DR_SF8, + EU868_DR_SF7, + EU868_DR_SF7B, + EU868_DR_FSK, + EU868_DR_NONE +}; + +// Bands: +// g1 : 1% 14dBm +// g2 : 0.1% 14dBm +// g3 : 10% 27dBm +// freq band datarates +enum { + EU868_F1 = 868100000, // g1 SF7-12 + EU868_F2 = 868300000, // g1 SF7-12 FSK SF7/250 + EU868_F3 = 868500000, // g1 SF7-12 + EU868_F4 = 868850000, // g2 SF7-12 + EU868_F5 = 869050000, // g2 SF7-12 + EU868_F6 = 869525000, // g3 SF7-12 + EU868_J4 = 864100000, // g2 SF7-12 used during join + EU868_J5 = 864300000, // g2 SF7-12 ditto + EU868_J6 = 864500000, // g2 SF7-12 ditto +}; +enum { + EU868_FREQ_MIN = 863000000, + EU868_FREQ_MAX = 870000000 +}; +enum { + EU868_TX_EIRP_MAX_DBM = 16 // 16 dBm EIRP. So subtract 3 dBm for a 3 dBi antenna. +}; + +enum { EU868_LMIC_REGION_EIRP = 1 }; // region uses EIRP + +enum { DR_PAGE_EU868 = 0x10 * (LMIC_REGION_eu868 - 1) }; + +#endif /* _lorabase_eu868_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_in866.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_in866.h new file mode 100644 index 0000000..6955a76 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_in866.h @@ -0,0 +1,78 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_in866_h_ +#define _lorabase_in866_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for IN866 (always in scope) +| +\****************************************************************************/ + +enum _dr_in866_t { + IN866_DR_SF12 = 0, // DR0 + IN866_DR_SF11, // DR1 + IN866_DR_SF10, // DR2 + IN866_DR_SF9, // DR3 + IN866_DR_SF8, // DR4 + IN866_DR_SF7, // DR5 + IN866_DR_RFU, // - + IN866_DR_FSK, // DR7 + IN866_DR_NONE +}; + +// There is no dwell-time or duty-cycle limitation for IN +// +// max power: 30dBM +// +// freq datarates +enum { + IN866_F1 = 865062500, // SF7-12 (DR0-5) + IN866_F2 = 865402500, // SF7-12 (DR0-5) + IN866_F3 = 865985000, // SF7-12 (DR0-5) + IN866_FB = 866550000, // beacon/ping +}; +enum { + IN866_FREQ_MIN = 865000000, + IN866_FREQ_MAX = 867000000 +}; +enum { + IN866_TX_EIRP_MAX_DBM = 30 // 30 dBm +}; +enum { DR_PAGE_IN866 = 0x10 * (LMIC_REGION_in866 - 1) }; + +enum { IN866_LMIC_REGION_EIRP = 1 }; // region uses EIRP + +#endif /* _lorabase_in866_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_kr920.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_kr920.h new file mode 100644 index 0000000..02fd5a0 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_kr920.h @@ -0,0 +1,84 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017, 2019 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_kr920_h_ +#define _lorabase_kr920_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for KR920 (always in scope) +| +\****************************************************************************/ + +enum _dr_kr920_t { + KR920_DR_SF12 = 0, // DR0 + KR920_DR_SF11, // DR1 + KR920_DR_SF10, // DR2 + KR920_DR_SF9, // DR3 + KR920_DR_SF8, // DR4 + KR920_DR_SF7, // DR5 + KR920_DR_NONE +}; + +// There is no dwell-time or duty-cycle limitation for IN +// +// max power: 30dBM +// +// freq datarates +enum { + KR920_F1 = 922100000, // SF7-12 (DR0-5) + KR920_F2 = 922300000, // SF7-12 (DR0-5) + KR920_F3 = 922500000, // SF7-12 (DR0-5) + KR920_FBCN = 923100000, // beacon/ping + KR920_F14DBM = 922100000, // Allows 14 dBm (not 10) if >= this. + KR920_FDOWN = 921900000, // RX2 downlink frequency +}; +enum { + KR920_FREQ_MIN = 920900000, + KR920_FREQ_MAX = 923300000 +}; +enum { + KR920_TX_EIRP_MAX_DBM = 14, // 14 dBm for most + KR920_TX_EIRP_MAX_DBM_LOW = 10, // 10 dBm for some +}; +enum { DR_PAGE_KR920 = 0x10 * (LMIC_REGION_kr920 - 1) }; + +enum { KR920_LMIC_REGION_EIRP = 1 }; // region uses EIRP + +enum { KR920_LBT_US = 128 }; // microseconds of LBT time. + +enum { KR920_LBT_DB_MAX = -80 }; // maximum channel strength in dB; if TX + // we measure more than this, we don't tx. + +#endif /* _lorabase_in866_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_us915.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_us915.h new file mode 100644 index 0000000..ed960c6 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorabase_us915.h @@ -0,0 +1,90 @@ +/* +* Copyright (c) 2014-2016 IBM Corporation. +* All rights reserved. +* +* Copyright (c) 2017 MCCI Corporation +* All rights reserved. +* +* Redistribution and use in source and binary forms, with or without +* modification, are permitted provided that the following conditions are met: +* * Redistributions of source code must retain the above copyright +* notice, this list of conditions and the following disclaimer. +* * Redistributions in binary form must reproduce the above copyright +* notice, this list of conditions and the following disclaimer in the +* documentation and/or other materials provided with the distribution. +* * Neither the name of the <organization> nor the +* names of its contributors may be used to endorse or promote products +* derived from this software without specific prior written permission. +* +* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND +* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED +* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE +* DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY +* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES +* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; +* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND +* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS +* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. +*/ + +#ifndef _lorabase_us915_h_ +#define _lorabase_us915_h_ + +#ifndef _LMIC_CONFIG_PRECONDITIONS_H_ +# include "lmic_config_preconditions.h" +#endif + +/****************************************************************************\ +| +| Basic definitions for US915 (always in scope) +| +\****************************************************************************/ + +// Frequency plan for US 915MHz ISM band +// data rates +enum _dr_us915_t { + US915_DR_SF10 = 0, + US915_DR_SF9, + US915_DR_SF8, + US915_DR_SF7, + US915_DR_SF8C, + US915_DR_NONE, + // Devices "behind a router" (and upper half of DR list): + US915_DR_SF12CR = 8, + US915_DR_SF11CR, + US915_DR_SF10CR, + US915_DR_SF9CR, + US915_DR_SF8CR, + US915_DR_SF7CR +}; + +// Default frequency plan for US 915MHz +enum { + US915_125kHz_UPFBASE = 902300000, + US915_125kHz_UPFSTEP = 200000, + US915_500kHz_UPFBASE = 903000000, + US915_500kHz_UPFSTEP = 1600000, + US915_500kHz_DNFBASE = 923300000, + US915_500kHz_DNFSTEP = 600000 +}; +enum { + US915_FREQ_MIN = 902000000, + US915_FREQ_MAX = 928000000 +}; +enum { + US915_TX_MAX_DBM = 30 // 30 dBm (but not EIRP): assumes we're + // on an 64-channel bandplan. See code + // that computes tx power. +}; + +enum { + US915_LinkAdrReq_POW_MAX_1_0_2 = 0xA, + US915_LinkAdrReq_POW_MAX_1_0_3 = 0xE, +}; + +enum { DR_PAGE_US915 = 0x10 * (LMIC_REGION_us915 - 1) }; + +enum { US915_LMIC_REGION_EIRP = 0 }; // region doesn't use EIRP, uses tx power + +#endif /* _lorabase_us915_h_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorawan_spec_compliance.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorawan_spec_compliance.h new file mode 100644 index 0000000..e479b24 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/lorawan_spec_compliance.h @@ -0,0 +1,64 @@ +/* + +Module: lorawan_spec_compliance.h + +Function: + Details from the LoRaWAN specification for compliance. + +Copyright notice and license info: + See LICENSE file accompanying this project. + +Author: + Terry Moore, MCCI Corporation March 2019 + +*/ + +#ifndef _lorawan_spec_COMPLIANCE_H_ /* prevent multiple includes */ +#define _lorawan_spec_COMPLIANCE_H_ + +#ifdef __cplusplus +extern "C"{ +#endif + +enum { + // the port for MAC commands + LORAWAN_PORT_MAC = 0u, + // the first port available for applications + LORAWAN_PORT_USER_MIN = 1u, + // the last port available for applications + LORAWAN_PORT_USER_MAX = 223u, + // the base of the reserved port numbers + LORAWAN_PORT_RESERVED = 224u, + // the port for the compliance protocol + LORAWAN_PORT_COMPLIANCE = LORAWAN_PORT_RESERVED + 0u, +}; + +enum lowawan_compliance_cmd_e { + LORAWAN_COMPLIANCE_CMD_DEACTIVATE = 0u, + LORAWAN_COMPLIANCE_CMD_ACTIVATE = 1u, + LORAWAN_COMPLIANCE_CMD_SET_CONFIRM = 2u, + LORAWAN_COMPLIANCE_CMD_SET_UNCONFIRM = 3u, + LORAWAN_COMPLIANCE_CMD_ECHO = 4u, + LORAWAN_COMPLIANCE_CMD_LINK = 5u, + LORAWAN_COMPLIANCE_CMD_JOIN = 6u, + LORAWAN_COMPLIANCE_CMD_CW = 7u, + LORAWAN_COMPLIANCE_CMD_MFG_BASE = 0x80u, +}; + +typedef unsigned char lorawan_compliance_cmd_t; + +// info on specific commands +enum { + LORAWAN_COMPLIANCE_CMD_ACTIVATE_LEN = 4u, + LORAWAN_COMPLIANCE_CMD_ACTIVATE_MAGIC = 1u, + + // Maximum crypto frame size; although the spec says 18, it + // is also used for testing max packet size. + LORAWAN_COMPLIANCE_CMD_ECHO_LEN_MAX = 242u, +}; + +#ifdef __cplusplus +} // extern "C" +#endif + +#endif /* _lorawan_spec_COMPLIANCE_H_ */
\ No newline at end of file diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.c new file mode 100644 index 0000000..fa205f4 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.c @@ -0,0 +1,169 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2016-2017, 2019 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#define LMIC_DR_LEGACY 0 + +#include "lmic.h" + +extern const struct lmic_pinmap lmic_pins; + +// RUNTIME STATE +static struct { + osjob_t* scheduledjobs; + osjob_t* runnablejobs; +} OS; + +int os_init_ex (const void *pintable) { + memset(&OS, 0x00, sizeof(OS)); + hal_init_ex(pintable); + if (! radio_init()) + return 0; + LMIC_init(); + return 1; +} + +void os_init() { + if (os_init_ex((const void *)&lmic_pins)) + return; + ASSERT(0); +} + +ostime_t os_getTime () { + return hal_ticks(); +} + +// unlink job from queue, return if removed +static int unlinkjob (osjob_t** pnext, osjob_t* job) { + for( ; *pnext; pnext = &((*pnext)->next)) { + if(*pnext == job) { // unlink + *pnext = job->next; + return 1; + } + } + return 0; +} + +static osjob_t** getJobQueue(osjob_t* job) { + return os_jobIsTimed(job) ? &OS.scheduledjobs : &OS.runnablejobs; +} + +// clear scheduled job +void os_clearCallback (osjob_t* job) { + hal_disableIRQs(); + + unlinkjob(getJobQueue(job), job); + + hal_enableIRQs(); +} + +// schedule immediately runnable job +void os_setCallback (osjob_t* job, osjobcb_t cb) { + osjob_t** pnext; + hal_disableIRQs(); + + // remove if job was already queued + unlinkjob(getJobQueue(job), job); + + // fill-in job. Ascending memory order is write-queue friendly + job->next = NULL; + job->deadline = 0; + job->func = cb; + + // add to end of run queue + for(pnext=&OS.runnablejobs; *pnext; pnext=&((*pnext)->next)); + *pnext = job; + hal_enableIRQs(); +} + +// schedule timed job +void os_setTimedCallback (osjob_t* job, ostime_t time, osjobcb_t cb) { + osjob_t** pnext; + + // special case time 0 -- it will be one tick late. + if (time == 0) + time = 1; + + hal_disableIRQs(); + + // remove if job was already queued + unlinkjob(getJobQueue(job), job); + + // fill-in job + job->next = NULL; + job->deadline = time; + job->func = cb; + + // insert into schedule + for(pnext=&OS.scheduledjobs; *pnext; pnext=&((*pnext)->next)) { + if((*pnext)->deadline - time > 0) { // (cmp diff, not abs!) + // enqueue before next element and stop + job->next = *pnext; + break; + } + } + *pnext = job; + hal_enableIRQs(); +} + +// execute jobs from timer and from run queue +void os_runloop () { + while(1) { + os_runloop_once(); + } +} + +void os_runloop_once() { + osjob_t* j = NULL; + hal_processPendingIRQs(); + + hal_disableIRQs(); + // check for runnable jobs + if(OS.runnablejobs) { + j = OS.runnablejobs; + OS.runnablejobs = j->next; + } else if(OS.scheduledjobs && hal_checkTimer(OS.scheduledjobs->deadline)) { // check for expired timed jobs + j = OS.scheduledjobs; + OS.scheduledjobs = j->next; + } else { // nothing pending + hal_sleep(); // wake by irq (timer already restarted) + } + hal_enableIRQs(); + if(j) { // run job callback + j->func(j); + } +} + +// return true if there are any jobs scheduled within time ticks from now. +// return false if any jobs scheduled are at least time ticks in the future. +bit_t os_queryTimeCriticalJobs(ostime_t time) { + if (OS.scheduledjobs && + OS.scheduledjobs->deadline - os_getTime() < time) + return 1; + else + return 0; +} diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.h new file mode 100644 index 0000000..448b029 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic.h @@ -0,0 +1,353 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2018, 2019 MCCI Corporation + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +//! \file +#ifndef _oslmic_h_ +#define _oslmic_h_ + +// Dependencies required for the LMIC to run. +// These settings can be adapted to the underlying system. +// You should not, however, change the lmic merely for porting purposes.[hc] + +#include "config.h" + +#ifndef _lmic_env_h_ +# include "lmic_env.h" +#endif + +#ifndef _oslmic_types_h_ +# include "oslmic_types.h" +#endif + +LMIC_BEGIN_DECLS + + +#include <string.h> +#include "hal.h" +#define EV(a,b,c) /**/ +#define DO_DEVDB(field1,field2) /**/ +#if !defined(CFG_noassert) +#define ASSERT(cond) if(!(cond)) hal_failed(__FILE__, __LINE__) +#else +#define ASSERT(cond) /**/ +#endif + +#define os_clearMem(a,b) memset(a,0,b) +#define os_copyMem(a,b,c) memcpy(a,b,c) + +typedef struct osjob_t osjob_t; +typedef struct band_t band_t; +typedef struct chnldef_t chnldef_t; +typedef struct rxsched_t rxsched_t; +typedef struct bcninfo_t bcninfo_t; +typedef const u1_t* xref2cu1_t; +typedef u1_t* xref2u1_t; + +// int32_t == s4_t is long on some platforms; and someday +// we will want 64-bit ostime_t. So, we will use a macro for the +// print formatting of ostime_t. +#ifndef LMIC_PRId_ostime_t +# include <inttypes.h> +# define LMIC_PRId_ostime_t PRId32 +#endif + +#define TYPEDEF_xref2rps_t typedef rps_t* xref2rps_t +#define TYPEDEF_xref2rxsched_t typedef rxsched_t* xref2rxsched_t +#define TYPEDEF_xref2chnldef_t typedef chnldef_t* xref2chnldef_t +#define TYPEDEF_xref2band_t typedef band_t* xref2band_t +#define TYPEDEF_xref2osjob_t typedef osjob_t* xref2osjob_t + +#define SIZEOFEXPR(x) sizeof(x) + +#define DECL_ON_LMIC_EVENT LMIC_DECLARE_FUNCTION_WEAK(void, onEvent, (ev_t e)) + +extern u4_t AESAUX[]; +extern u4_t AESKEY[]; +#define AESkey ((u1_t*)AESKEY) +#define AESaux ((u1_t*)AESAUX) +#define FUNC_ADDR(func) (&(func)) + +u1_t radio_rand1 (void); +#define os_getRndU1() radio_rand1() + +#define DEFINE_LMIC struct lmic_t LMIC +#define DECLARE_LMIC extern struct lmic_t LMIC + +typedef struct oslmic_radio_rssi_s oslmic_radio_rssi_t; + +struct oslmic_radio_rssi_s { + s2_t min_rssi; + s2_t max_rssi; + s2_t mean_rssi; + u2_t n_rssi; +}; + +int radio_init (void); +void radio_irq_handler (u1_t dio); +void radio_irq_handler_v2 (u1_t dio, ostime_t tref); +void os_init (void); +int os_init_ex (const void *pPinMap); +void os_runloop (void); +void os_runloop_once (void); +u1_t radio_rssi (void); +void radio_monitor_rssi(ostime_t n, oslmic_radio_rssi_t *pRssi); + +//================================================================================ + +#ifndef RX_RAMPUP_DEFAULT +//! \brief RX_RAMPUP_DEFAULT specifies the extra time we must allow to set up an RX event due +//! to platform issues. It's specified in units of ostime_t. It must reflect +//! platform jitter and latency, as well as the speed of the LMIC when running +//! on this plaform. It's not used directly; clients call os_getRadioRxRampup(), +//! which might adaptively vary this based on observed timeouts. +#define RX_RAMPUP_DEFAULT (us2osticks(10000)) +#endif + +#ifndef TX_RAMPUP +// TX_RAMPUP specifies the extra time we must allow to set up a TX event) due +// to platform issues. It's specified in units of ostime_t. It must reflect +// platform jitter and latency, as well as the speed of the LMIC when running +// on this plaform. +#define TX_RAMPUP (us2osticks(10000)) +#endif + +#ifndef OSTICKS_PER_SEC +#define OSTICKS_PER_SEC 32768 +#elif OSTICKS_PER_SEC < 10000 || OSTICKS_PER_SEC > 64516 +#error Illegal OSTICKS_PER_SEC - must be in range [10000:64516]. One tick must be 15.5us .. 100us long. +#endif + +#if !HAS_ostick_conv +#define us2osticks(us) ((ostime_t)( ((int64_t)(us) * OSTICKS_PER_SEC) / 1000000)) +#define ms2osticks(ms) ((ostime_t)( ((int64_t)(ms) * OSTICKS_PER_SEC) / 1000)) +#define sec2osticks(sec) ((ostime_t)( (int64_t)(sec) * OSTICKS_PER_SEC)) +#define osticks2ms(os) ((s4_t)(((os)*(int64_t)1000 ) / OSTICKS_PER_SEC)) +#define osticks2us(os) ((s4_t)(((os)*(int64_t)1000000 ) / OSTICKS_PER_SEC)) +// Special versions +#define us2osticksCeil(us) ((ostime_t)( ((int64_t)(us) * OSTICKS_PER_SEC + 999999) / 1000000)) +#define us2osticksRound(us) ((ostime_t)( ((int64_t)(us) * OSTICKS_PER_SEC + 500000) / 1000000)) +#define ms2osticksCeil(ms) ((ostime_t)( ((int64_t)(ms) * OSTICKS_PER_SEC + 999) / 1000)) +#define ms2osticksRound(ms) ((ostime_t)( ((int64_t)(ms) * OSTICKS_PER_SEC + 500) / 1000)) +#endif + + +struct osjob_t; // fwd decl. + +//! the function type for osjob_t callbacks +typedef void (osjobcbfn_t)(struct osjob_t*); + +//! the pointer-to-function for osjob_t callbacks +typedef osjobcbfn_t *osjobcb_t; + +struct osjob_t { + struct osjob_t* next; + ostime_t deadline; + osjobcb_t func; +}; +TYPEDEF_xref2osjob_t; + +//! determine whether a job is timed or immediate. os_setTimedCallback() +// must treat incoming == 0 as being 1 instead. +static inline int os_jobIsTimed(xref2osjob_t job) { + return (job->deadline != 0); +} + +#ifndef HAS_os_calls + +#ifndef os_getDevKey +void os_getDevKey (xref2u1_t buf); +#endif +#ifndef os_getArtEui +void os_getArtEui (xref2u1_t buf); +#endif +#ifndef os_getDevEui +void os_getDevEui (xref2u1_t buf); +#endif +#ifndef os_setCallback +void os_setCallback (xref2osjob_t job, osjobcb_t cb); +#endif +#ifndef os_setTimedCallback +void os_setTimedCallback (xref2osjob_t job, ostime_t time, osjobcb_t cb); +#endif +#ifndef os_clearCallback +void os_clearCallback (xref2osjob_t job); +#endif +#ifndef os_getRadioRxRampup +ostime_t os_getRadioRxRampup (void); +#endif +#ifndef os_getTime +ostime_t os_getTime (void); +#endif +#ifndef os_getTimeSecs +uint os_getTimeSecs (void); +#endif +#ifndef os_radio +void os_radio (u1_t mode); +#endif +#ifndef os_getBattLevel +u1_t os_getBattLevel (void); +#endif +#ifndef os_queryTimeCriticalJobs +//! Return non-zero if any jobs are scheduled between now and now+time. +bit_t os_queryTimeCriticalJobs(ostime_t time); +#endif + +#ifndef os_rlsbf4 +//! Read 32-bit quantity from given pointer in little endian byte order. +u4_t os_rlsbf4 (xref2cu1_t buf); +#endif +#ifndef os_wlsbf4 +//! Write 32-bit quntity into buffer in little endian byte order. +void os_wlsbf4 (xref2u1_t buf, u4_t value); +#endif +#ifndef os_rmsbf4 +//! Read 32-bit quantity from given pointer in big endian byte order. +u4_t os_rmsbf4 (xref2cu1_t buf); +#endif +#ifndef os_wmsbf4 +//! Write 32-bit quntity into buffer in big endian byte order. +void os_wmsbf4 (xref2u1_t buf, u4_t value); +#endif +#ifndef os_rlsbf2 +//! Read 16-bit quantity from given pointer in little endian byte order. +u2_t os_rlsbf2 (xref2cu1_t buf); +#endif +#ifndef os_wlsbf2 +//! Write 16-bit quntity into buffer in little endian byte order. +void os_wlsbf2 (xref2u1_t buf, u2_t value); +#endif + +//! Get random number (default impl for u2_t). +#ifndef os_getRndU2 +#define os_getRndU2() ((u2_t)((os_getRndU1()<<8)|os_getRndU1())) +#endif +#ifndef os_crc16 +u2_t os_crc16 (xref2cu1_t d, uint len); +#endif + +#endif // !HAS_os_calls + +// ====================================================================== +// Table support +// These macros for defining a table of constants and retrieving values +// from it makes it easier for other platforms (like AVR) to optimize +// table accesses. +// Use CONST_TABLE() whenever declaring or defining a table, and +// TABLE_GET_xx whenever accessing its values. The actual name of the +// declared variable will be modified to prevent accidental direct +// access. The accessor macros forward to an inline function to allow +// proper type checking of the array element type. + +// Helper to add a prefix to the table name +#define RESOLVE_TABLE(table) constant_table_ ## table + +// get number of entries in table +#define LENOF_TABLE(table) (sizeof(RESOLVE_TABLE(table)) / sizeof(RESOLVE_TABLE(table)[0])) + +// Accessors for table elements +#define TABLE_GET_U1(table, index) table_get_u1(RESOLVE_TABLE(table), index) +#define TABLE_GET_S1(table, index) table_get_s1(RESOLVE_TABLE(table), index) +#define TABLE_GET_U2(table, index) table_get_u2(RESOLVE_TABLE(table), index) +#define TABLE_GET_S2(table, index) table_get_s2(RESOLVE_TABLE(table), index) +#define TABLE_GET_U4(table, index) table_get_u4(RESOLVE_TABLE(table), index) +#define TABLE_GET_S4(table, index) table_get_s4(RESOLVE_TABLE(table), index) +#define TABLE_GET_OSTIME(table, index) table_get_ostime(RESOLVE_TABLE(table), index) +#define TABLE_GET_U1_TWODIM(table, index1, index2) table_get_u1(RESOLVE_TABLE(table)[index1], index2) + +#if defined(__AVR__) + #include <avr/pgmspace.h> + // Macro to define the getter functions. This loads data from + // progmem using pgm_read_xx, or accesses memory directly when the + // index is a constant so gcc can optimize it away; + #define TABLE_GETTER(postfix, type, pgm_type) \ + static inline type table_get ## postfix(const type *table, size_t index) { \ + if (__builtin_constant_p(table[index])) \ + return table[index]; \ + return pgm_read_ ## pgm_type(&table[index]); \ + } + + TABLE_GETTER(_u1, u1_t, byte); + TABLE_GETTER(_s1, s1_t, byte); + TABLE_GETTER(_u2, u2_t, word); + TABLE_GETTER(_s2, s2_t, word); + TABLE_GETTER(_u4, u4_t, dword); + TABLE_GETTER(_s4, s4_t, dword); + + // This assumes ostime_t is 4 bytes, so error out if it is not + typedef int check_sizeof_ostime_t[(sizeof(ostime_t) == 4) ? 0 : -1]; + TABLE_GETTER(_ostime, ostime_t, dword); + + // For AVR, store constants in PROGMEM, saving on RAM usage + #define CONST_TABLE(type, name) const type PROGMEM RESOLVE_TABLE(name) +#else + static inline u1_t table_get_u1(const u1_t *table, size_t index) { return table[index]; } + static inline s1_t table_get_s1(const s1_t *table, size_t index) { return table[index]; } + static inline u2_t table_get_u2(const u2_t *table, size_t index) { return table[index]; } + static inline s2_t table_get_s2(const s2_t *table, size_t index) { return table[index]; } + static inline u4_t table_get_u4(const u4_t *table, size_t index) { return table[index]; } + static inline s4_t table_get_s4(const s4_t *table, size_t index) { return table[index]; } + static inline ostime_t table_get_ostime(const ostime_t *table, size_t index) { return table[index]; } + + // Declare a table + #define CONST_TABLE(type, name) const type RESOLVE_TABLE(name) +#endif + +// ====================================================================== +// AES support +// !!Keep in sync with lorabase.hpp!! + +#ifndef AES_ENC // if AES_ENC is defined as macro all other values must be too +#define AES_ENC 0x00 +#define AES_DEC 0x01 +#define AES_MIC 0x02 +#define AES_CTR 0x04 +#define AES_MICNOAUX 0x08 +#endif +#ifndef AESkey // if AESkey is defined as macro all other values must be too +extern xref2u1_t AESkey; +extern xref2u1_t AESaux; +#endif +#ifndef os_aes +u4_t os_aes (u1_t mode, xref2u1_t buf, u2_t len); +#endif + +// ====================================================================== +// Simple logging support. Vanishes unless enabled. + +#if LMIC_ENABLE_event_logging +extern void LMICOS_logEvent(const char *pMessage); +extern void LMICOS_logEventUint32(const char *pMessage, uint32_t datum); +#else // ! LMIC_ENABLE_event_logging +# define LMICOS_logEvent(m) do { ; } while (0) +# define LMICOS_logEventUint32(m, d) do { ; } while (0) +#endif // ! LMIC_ENABLE_event_logging + + +LMIC_END_DECLS + +#endif // _oslmic_h_ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic_types.h b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic_types.h new file mode 100644 index 0000000..d790a37 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/oslmic_types.h @@ -0,0 +1,47 @@ +/* + +Module: oslmic_types.h + +Function: + Basic types from oslmic.h, shared by all layers. + +Copyright & License: + See accompanying LICENSE file. + +Author: + Terry Moore, MCCI November 2018 + (based on oslmic.h from IBM). + +*/ + +#ifndef _oslmic_types_h_ +# define _oslmic_types_h_ + +#include <stdint.h> + +#ifdef __cplusplus +extern "C" { +#endif + +//================================================================================ +//================================================================================ +// Target platform as C library +typedef uint8_t bit_t; +typedef uint8_t u1_t; +typedef int8_t s1_t; +typedef uint16_t u2_t; +typedef int16_t s2_t; +typedef uint32_t u4_t; +typedef int32_t s4_t; +typedef unsigned int uint; +typedef const char* str_t; + +// the HAL needs to give us ticks, so it ought to know the right type. +typedef s4_t ostime_t; + +#ifdef __cplusplus +} +#endif + +/* end of oslmic_types.h */ +#endif /* _oslmic_types_h_ */ diff --git a/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/radio.c b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/radio.c new file mode 100644 index 0000000..d6cc908 --- /dev/null +++ b/src/lib/MCCI_LoRaWAN_LMIC_library/src/lmic/radio.c @@ -0,0 +1,1443 @@ +/* + * Copyright (c) 2014-2016 IBM Corporation. + * Copyright (c) 2016-2019 MCCI Corporation. + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions are met: + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the name of the <organization> nor the + * names of its contributors may be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED + * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE + * DISCLAIMED. IN NO EVENT SHALL <COPYRIGHT HOLDER> BE LIABLE FOR ANY + * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES + * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND + * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT + * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +//! \file + +#define LMIC_DR_LEGACY 0 + +#include "lmic.h" + +// ---------------------------------------- +// Registers Mapping +// // -type- 1272 vs 1276 +#define RegFifo 0x00 // common +#define RegOpMode 0x01 // common see below +#define FSKRegBitrateMsb 0x02 // - +#define FSKRegBitrateLsb 0x03 // - +#define FSKRegFdevMsb 0x04 // - +#define FSKRegFdevLsb 0x05 // - +#define RegFrfMsb 0x06 // common FSK: 1272: 915; 1276: 434 MHz +#define RegFrfMid 0x07 // common ditto +#define RegFrfLsb 0x08 // common ditto +#define RegPaConfig 0x09 // common see below, many diffs +#define RegPaRamp 0x0A // common see below: bits 6..4 are diff +#define RegOcp 0x0B // common - +#define RegLna 0x0C // common bits 4..0 are diff. +#define FSKRegRxConfig 0x0D // - +#define LORARegFifoAddrPtr 0x0D +#define FSKRegRssiConfig 0x0E // - +#define LORARegFifoTxBaseAddr 0x0E +#define FSKRegRssiCollision 0x0F // - +#define LORARegFifoRxBaseAddr 0x0F +#define FSKRegRssiThresh 0x10 // - +#define LORARegFifoRxCurrentAddr 0x10 +#define FSKRegRssiValue 0x11 // - +#define LORARegIrqFlagsMask 0x11 +#define FSKRegRxBw 0x12 // - +#define LORARegIrqFlags 0x12 +#define FSKRegAfcBw 0x13 // - +#define LORARegRxNbBytes 0x13 +#define FSKRegOokPeak 0x14 // - +#define LORARegRxHeaderCntValueMsb 0x14 +#define FSKRegOokFix 0x15 // - +#define LORARegRxHeaderCntValueLsb 0x15 +#define FSKRegOokAvg 0x16 // - +#define LORARegRxPacketCntValueMsb 0x16 +#define LORARegRxpacketCntValueLsb 0x17 +#define LORARegModemStat 0x18 +#define LORARegPktSnrValue 0x19 +#define FSKRegAfcFei 0x1A // - +#define LORARegPktRssiValue 0x1A +#define FSKRegAfcMsb 0x1B // - +#define LORARegRssiValue 0x1B +#define FSKRegAfcLsb 0x1C // - +#define LORARegHopChannel 0x1C +#define FSKRegFeiMsb 0x1D // - +#define LORARegModemConfig1 0x1D +#define FSKRegFeiLsb 0x1E // - +#define LORARegModemConfig2 0x1E +#define FSKRegPreambleDetect 0x1F // - +#define LORARegSymbTimeoutLsb 0x1F +#define FSKRegRxTimeout1 0x20 // - +#define LORARegPreambleMsb 0x20 +#define FSKRegRxTimeout2 0x21 // - +#define LORARegPreambleLsb 0x21 +#define FSKRegRxTimeout3 0x22 // - +#define LORARegPayloadLength 0x22 +#define FSKRegRxDelay 0x23 // - +#define LORARegPayloadMaxLength 0x23 +#define FSKRegOsc 0x24 // - +#define LORARegHopPeriod 0x24 +#define FSKRegPreambleMsb 0x25 // - +#define LORARegFifoRxByteAddr 0x25 +#define FSKRegPreambleLsb 0x26 // - +#define LORARegModemConfig3 0x26 +#define FSKRegSyncConfig 0x27 // - +#define LORARegFeiMsb 0x28 +#define FSKRegSyncValue1 0x28 // - +#define LORAFeiMib 0x29 +#define FSKRegSyncValue2 0x29 // - +#define LORARegFeiLsb 0x2A +#define FSKRegSyncValue3 0x2A // - +#define FSKRegSyncValue4 0x2B // - +#define LORARegRssiWideband 0x2C +#define FSKRegSyncValue5 0x2C // - +#define FSKRegSyncValue6 0x2D // - +#define FSKRegSyncValue7 0x2E // - +#define FSKRegSyncValue8 0x2F // - +#define LORARegIffReq1 0x2F +#define FSKRegPacketConfig1 0x30 // - +#define LORARegIffReq2 0x30 +#define FSKRegPacketConfig2 0x31 // - +#define LORARegDetectOptimize 0x31 +#define FSKRegPayloadLength 0x32 // - +#define FSKRegNodeAdrs 0x33 // - +#define LORARegInvertIQ 0x33 +#define FSKRegBroadcastAdrs 0x34 // - +#define FSKRegFifoThresh 0x35 // - +#define FSKRegSeqConfig1 0x36 // - +#define LORARegHighBwOptimize1 0x36 +#define FSKRegSeqConfig2 0x37 // - +#define LORARegDetectionThreshold 0x37 +#define FSKRegTimerResol 0x38 // - +#define FSKRegTimer1Coef 0x39 // - +#define LORARegSyncWord 0x39 +#define FSKRegTimer2Coef 0x3A // - +#define LORARegHighBwOptimize2 0x3A +#define FSKRegImageCal 0x3B // - +#define FSKRegTemp 0x3C // - +#define FSKRegLowBat 0x3D // - +#define FSKRegIrqFlags1 0x3E // - +#define FSKRegIrqFlags2 0x3F // - +#define RegDioMapping1 0x40 // common +#define RegDioMapping2 0x41 // common +#define RegVersion 0x42 // common +// #define RegAgcRef 0x43 // common +// #define RegAgcThresh1 0x44 // common +// #define RegAgcThresh2 0x45 // common +// #define RegAgcThresh3 0x46 // common +// #define RegPllHop 0x4B // common +// #define RegTcxo 0x58 // common +// #define RegPll 0x5C // common +// #define RegPllLowPn 0x5E // common +// #define RegFormerTemp 0x6C // common +// #define RegBitRateFrac 0x70 // common + +#if defined(CFG_sx1276_radio) +#define RegTcxo 0x4B // common different addresses, same bits +#define RegPaDac 0x4D // common differnet addresses, same bits +#elif defined(CFG_sx1272_radio) +#define RegTcxo 0x58 // common +#define RegPaDac 0x5A // common +#endif + +#define RegTcxo_TcxoInputOn (1u << 4) + +// ---------------------------------------- +// spread factors and mode for RegModemConfig2 +#define SX1272_MC2_FSK 0x00 +#define SX1272_MC2_SF7 0x70 +#define SX1272_MC2_SF8 0x80 +#define SX1272_MC2_SF9 0x90 +#define SX1272_MC2_SF10 0xA0 +#define SX1272_MC2_SF11 0xB0 +#define SX1272_MC2_SF12 0xC0 +// bandwidth for RegModemConfig1 +#define SX1272_MC1_BW_125 0x00 +#define SX1272_MC1_BW_250 0x40 +#define SX1272_MC1_BW_500 0x80 +// coding rate for RegModemConfig1 +#define SX1272_MC1_CR_4_5 0x08 +#define SX1272_MC1_CR_4_6 0x10 +#define SX1272_MC1_CR_4_7 0x18 +#define SX1272_MC1_CR_4_8 0x20 +#define SX1272_MC1_IMPLICIT_HEADER_MODE_ON 0x04 // required for receive +#define SX1272_MC1_RX_PAYLOAD_CRCON 0x02 +#define SX1272_MC1_LOW_DATA_RATE_OPTIMIZE 0x01 // mandated for SF11 and SF12 +// transmit power configuration for RegPaConfig +#define SX1272_PAC_PA_SELECT_PA_BOOST 0x80 +#define SX1272_PAC_PA_SELECT_RFIO_PIN 0x00 + + +// sx1276 RegModemConfig1 +#define SX1276_MC1_BW_125 0x70 +#define SX1276_MC1_BW_250 0x80 +#define SX1276_MC1_BW_500 0x90 +#define SX1276_MC1_CR_4_5 0x02 +#define SX1276_MC1_CR_4_6 0x04 +#define SX1276_MC1_CR_4_7 0x06 +#define SX1276_MC1_CR_4_8 0x08 + +#define SX1276_MC1_IMPLICIT_HEADER_MODE_ON 0x01 + +#ifdef CFG_sx1276_radio +# define SX127X_MC1_IMPLICIT_HEADER_MODE_ON SX1276_MC1_IMPLICIT_HEADER_MODE_ON +#else +# define SX127X_MC1_IMPLICIT_HEADER_MODE_ON SX1272_MC1_IMPLICIT_HEADER_MODE_ON +#endif + +// transmit power configuration for RegPaConfig +#define SX1276_PAC_PA_SELECT_PA_BOOST 0x80 +#define SX1276_PAC_PA_SELECT_RFIO_PIN 0x00 +#define SX1276_PAC_MAX_POWER_MASK 0x70 + +// the bits to change for max power. +#define SX127X_PADAC_POWER_MASK 0x07 +#define SX127X_PADAC_POWER_NORMAL 0x04 +#define SX127X_PADAC_POWER_20dBm 0x07 + +// convert milliamperes to equivalent value for +// RegOcp; delivers conservative value. +#define SX127X_OCP_MAtoBITS(mA) \ + ((mA) < 45 ? 0 : \ + (mA) <= 120 ? ((mA) - 45) / 5 : \ + (mA) < 130 ? 0xF : \ + (mA) < 240 ? ((mA) - 130) / 10 + 0x10 : \ + 27) + +// bit in RegOcp that enables overcurrent protect. +#define SX127X_OCP_ENA 0x20 + +// sx1276 RegModemConfig2 +#define SX1276_MC2_RX_PAYLOAD_CRCON 0x04 + +// sx1276 RegModemConfig3 +#define SX1276_MC3_LOW_DATA_RATE_OPTIMIZE 0x08 +#define SX1276_MC3_AGCAUTO 0x04 + +// preamble for lora networks (nibbles swapped) +#define LORA_MAC_PREAMBLE 0x34 + +#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG1 0x0A +#ifdef CFG_sx1276_radio +#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG2 0x70 +#elif CFG_sx1272_radio +#define RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG2 0x74 +#endif + +//----------------------------------------- +// Parameters for RSSI monitoring +#define SX127X_FREQ_LF_MAX 525000000 // per datasheet 6.3 + +// per datasheet 5.5.3 and 5.5.5: +#define SX1272_RSSI_ADJUST -139 // add to rssi value to get dB (LF) + +// per datasheet 5.5.3 and 5.5.5: +#define SX1276_RSSI_ADJUST_LF -164 // add to rssi value to get dB (LF) +#define SX1276_RSSI_ADJUST_HF -157 // add to rssi value to get dB (HF) + +#ifdef CFG_sx1276_radio +# define SX127X_RSSI_ADJUST_LF SX1276_RSSI_ADJUST_LF +# define SX127X_RSSI_ADJUST_HF SX1276_RSSI_ADJUST_HF +#else +# define SX127X_RSSI_ADJUST_LF SX1272_RSSI_ADJUST +# define SX127X_RSSI_ADJUST_HF SX1272_RSSI_ADJUST +#endif + +// per datasheet 2.5.2 (but note that we ought to ask Semtech to confirm, because +// datasheet is unclear). +#define SX127X_RX_POWER_UP us2osticks(500) // delay this long to let the receiver power up. + +// ---------------------------------------- +// Constants for radio registers +#define OPMODE_LORA 0x80 +#define OPMODE_MASK 0x07 +#define OPMODE_SLEEP 0x00 +#define OPMODE_STANDBY 0x01 +#define OPMODE_FSTX 0x02 +#define OPMODE_TX 0x03 +#define OPMODE_FSRX 0x04 +#define OPMODE_RX 0x05 +#define OPMODE_RX_SINGLE 0x06 +#define OPMODE_CAD 0x07 + +// ---------------------------------------- +// FSK opmode bits +// bits 6:5 are the same for 1272 and 1276 +#define OPMODE_FSK_SX127x_ModulationType_FSK (0u << 5) +#define OPMODE_FSK_SX127x_ModulationType_OOK (1u << 5) +#define OPMODE_FSK_SX127x_ModulationType_MASK (3u << 5) + +// bits 4:3 are different for 1272 +#define OPMODE_FSK_SX1272_ModulationShaping_FSK_None (0u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT1_0 (1u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_5 (2u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_3 (3u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_OOK_None (0u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_OOK_BR (1u << 3) +#define OPMODE_FSK_SX1272_ModulationShaping_OOK_2BR (2u << 3) + +#define OPMODE_FSK_SX1272_ModulationShaping_MASK (3u << 3) + +// SX1276 +#define OPMODE_FSK_SX1276_LowFrequencyModeOn (1u << 3) + +// define the opmode bits apporpriate for the 127x in use. +#if defined(CFG_sx1272_radio) +# define OPMODE_FSK_SX127X_SETUP (OPMODE_FSK_SX127x_ModulationType_FSK | \ + OPMODE_FSK_SX1272_ModulationShaping_FSK_BT0_5) +#elif defined(CFG_sx1276_radio) +# define OPMODE_FSK_SX127X_SETUP (OPMODE_FSK_SX127x_ModulationType_FSK) +#endif + +// ---------------------------------------- +// LoRa opmode bits +#define OPMODE_LORA_SX127x_AccessSharedReg (1u << 6) +#define OPMODE_LORA_SX1276_LowFrequencyModeOn (1u << 3) + +// ---------------------------------------- +// Bits masking the corresponding IRQs from the radio +#define IRQ_LORA_RXTOUT_MASK 0x80 +#define IRQ_LORA_RXDONE_MASK 0x40 +#define IRQ_LORA_CRCERR_MASK 0x20 +#define IRQ_LORA_HEADER_MASK 0x10 +#define IRQ_LORA_TXDONE_MASK 0x08 +#define IRQ_LORA_CDDONE_MASK 0x04 +#define IRQ_LORA_FHSSCH_MASK 0x02 +#define IRQ_LORA_CDDETD_MASK 0x01 + +#define IRQ_FSK1_MODEREADY_MASK 0x80 +#define IRQ_FSK1_RXREADY_MASK 0x40 +#define IRQ_FSK1_TXREADY_MASK 0x20 +#define IRQ_FSK1_PLLLOCK_MASK 0x10 +#define IRQ_FSK1_RSSI_MASK 0x08 +#define IRQ_FSK1_TIMEOUT_MASK 0x04 +#define IRQ_FSK1_PREAMBLEDETECT_MASK 0x02 +#define IRQ_FSK1_SYNCADDRESSMATCH_MASK 0x01 +#define IRQ_FSK2_FIFOFULL_MASK 0x80 +#define IRQ_FSK2_FIFOEMPTY_MASK 0x40 +#define IRQ_FSK2_FIFOLEVEL_MASK 0x20 +#define IRQ_FSK2_FIFOOVERRUN_MASK 0x10 +#define IRQ_FSK2_PACKETSENT_MASK 0x08 +#define IRQ_FSK2_PAYLOADREADY_MASK 0x04 +#define IRQ_FSK2_CRCOK_MASK 0x02 +#define IRQ_FSK2_LOWBAT_MASK 0x01 + +// ---------------------------------------- +// DIO function mappings D0D1D2D3 +#define MAP_DIO0_LORA_RXDONE 0x00 // 00------ +#define MAP_DIO0_LORA_TXDONE 0x40 // 01------ +#define MAP_DIO1_LORA_RXTOUT 0x00 // --00---- +#define MAP_DIO1_LORA_NOP 0x30 // --11---- +#define MAP_DIO2_LORA_NOP 0x0C // ----11-- + +#define MAP_DIO0_FSK_READY 0x00 // 00------ (packet sent / payload ready) +#define MAP_DIO1_FSK_NOP 0x30 // --11---- +#define MAP_DIO2_FSK_TXNOP 0x04 // ----01-- +#define MAP_DIO2_FSK_TIMEOUT 0x08 // ----10-- + + +// FSK IMAGECAL defines +#define RF_IMAGECAL_AUTOIMAGECAL_MASK 0x7F +#define RF_IMAGECAL_AUTOIMAGECAL_ON 0x80 +#define RF_IMAGECAL_AUTOIMAGECAL_OFF 0x00 // Default + +#define RF_IMAGECAL_IMAGECAL_MASK 0xBF +#define RF_IMAGECAL_IMAGECAL_START 0x40 + +#define RF_IMAGECAL_IMAGECAL_RUNNING 0x20 +#define RF_IMAGECAL_IMAGECAL_DONE 0x00 // Default + +// LNA gain constant. Bits 4..0 have different meaning for 1272 and 1276, but +// by chance, the bit patterns we use are the same. +#ifdef CFG_sx1276_radio +#define LNA_RX_GAIN (0x20|0x3) +#elif CFG_sx1272_radio +#define LNA_RX_GAIN (0x20|0x03) +#else +#error Missing CFG_sx1272_radio/CFG_sx1276_radio +#endif + +// RADIO STATE +// (initialized by radio_init(), used by radio_rand1()) +static u1_t randbuf[16]; + + +static void writeReg (u1_t addr, u1_t data ) { + hal_spi_write(addr | 0x80, &data, 1); +} + +static u1_t readReg (u1_t addr) { + u1_t buf[1]; + hal_spi_read(addr & 0x7f, buf, 1); + return buf[0]; +} + +static void writeBuf (u1_t addr, xref2u1_t buf, u1_t len) { + hal_spi_write(addr | 0x80, buf, len); +} + +static void readBuf (u1_t addr, xref2u1_t buf, u1_t len) { + hal_spi_read(addr & 0x7f, buf, len); +} + +static void requestModuleActive(bit_t state) { + ostime_t const ticks = hal_setModuleActive(state); + + if (ticks) + hal_waitUntil(os_getTime() + ticks);; +} + +static void writeOpmode(u1_t mode) { + u1_t const maskedMode = mode & OPMODE_MASK; + if (maskedMode != OPMODE_SLEEP) + requestModuleActive(1); + writeReg(RegOpMode, mode); + if (maskedMode == OPMODE_SLEEP) + requestModuleActive(0); +} + +static void opmode (u1_t mode) { + writeOpmode((readReg(RegOpMode) & ~OPMODE_MASK) | mode); +} + +static void opmodeLora() { + u1_t u = OPMODE_LORA; +#ifdef CFG_sx1276_radio + if (LMIC.freq <= SX127X_FREQ_LF_MAX) { + u |= OPMODE_FSK_SX1276_LowFrequencyModeOn; + } +#endif + writeOpmode(u); +} + +static void opmodeFSK() { + u1_t u = OPMODE_FSK_SX127X_SETUP; + +#ifdef CFG_sx1276_radio + if (LMIC.freq <= SX127X_FREQ_LF_MAX) { + u |= OPMODE_FSK_SX1276_LowFrequencyModeOn; + } +#endif + writeOpmode(u); +} + +// configure LoRa modem (cfg1, cfg2) +static void configLoraModem () { + sf_t sf = getSf(LMIC.rps); + +#ifdef CFG_sx1276_radio + u1_t mc1 = 0, mc2 = 0, mc3 = 0; + + bw_t const bw = getBw(LMIC.rps); + + switch (bw) { + case BW125: mc1 |= SX1276_MC1_BW_125; break; + case BW250: mc1 |= SX1276_MC1_BW_250; break; + case BW500: mc1 |= SX1276_MC1_BW_500; break; + default: + ASSERT(0); + } + switch( getCr(LMIC.rps) ) { + case CR_4_5: mc1 |= SX1276_MC1_CR_4_5; break; + case CR_4_6: mc1 |= SX1276_MC1_CR_4_6; break; + case CR_4_7: mc1 |= SX1276_MC1_CR_4_7; break; + case CR_4_8: mc1 |= SX1276_MC1_CR_4_8; break; + default: + ASSERT(0); + } + + if (getIh(LMIC.rps)) { + mc1 |= SX1276_MC1_IMPLICIT_HEADER_MODE_ON; + writeReg(LORARegPayloadLength, getIh(LMIC.rps)); // required length + } + // set ModemConfig1 + writeReg(LORARegModemConfig1, mc1); + + mc2 = (SX1272_MC2_SF7 + ((sf-1)<<4) + ((LMIC.rxsyms >> 8) & 0x3) ); + if (getNocrc(LMIC.rps) == 0) { + mc2 |= SX1276_MC2_RX_PAYLOAD_CRCON; + } +#if CFG_TxContinuousMode + // Only for testing + // set ModemConfig2 (sf, TxContinuousMode=1, AgcAutoOn=1 SymbTimeoutHi=00) + mc2 |= 0x8; +#endif + writeReg(LORARegModemConfig2, mc2); + + mc3 = SX1276_MC3_AGCAUTO; + + if ( ((sf == SF11 || sf == SF12) && bw == BW125) || + ((sf == SF12) && bw == BW250) ) { + mc3 |= SX1276_MC3_LOW_DATA_RATE_OPTIMIZE; + } + writeReg(LORARegModemConfig3, mc3); + + // Errata 2.1: Sensitivity optimization with 500 kHz bandwidth + u1_t rHighBwOptimize1; + u1_t rHighBwOptimize2; + + rHighBwOptimize1 = 0x03; + rHighBwOptimize2 = 0; + + if (bw == BW500) { + if (LMIC.freq > SX127X_FREQ_LF_MAX) { + rHighBwOptimize1 = 0x02; + rHighBwOptimize2 = 0x64; + } else { + rHighBwOptimize1 = 0x02; + rHighBwOptimize2 = 0x7F; + } + } + + writeReg(LORARegHighBwOptimize1, rHighBwOptimize1); + if (rHighBwOptimize2 != 0) + writeReg(LORARegHighBwOptimize2, rHighBwOptimize2); + +#elif CFG_sx1272_radio + u1_t mc1 = (getBw(LMIC.rps)<<6); + + switch( getCr(LMIC.rps) ) { + case CR_4_5: mc1 |= SX1272_MC1_CR_4_5; break; + case CR_4_6: mc1 |= SX1272_MC1_CR_4_6; break; + case CR_4_7: mc1 |= SX1272_MC1_CR_4_7; break; + case CR_4_8: mc1 |= SX1272_MC1_CR_4_8; break; + } + + if ((sf == SF11 || sf == SF12) && getBw(LMIC.rps) == BW125) { + mc1 |= SX1272_MC1_LOW_DATA_RATE_OPTIMIZE; + } + + if (getNocrc(LMIC.rps) == 0) { + mc1 |= SX1272_MC1_RX_PAYLOAD_CRCON; + } + + if (getIh(LMIC.rps)) { + mc1 |= SX1272_MC1_IMPLICIT_HEADER_MODE_ON; + writeReg(LORARegPayloadLength, getIh(LMIC.rps)); // required length + } + // set ModemConfig1 + writeReg(LORARegModemConfig1, mc1); + + // set ModemConfig2 (sf, AgcAutoOn=1 SymbTimeoutHi) + u1_t mc2; + mc2 = (SX1272_MC2_SF7 + ((sf-1)<<4)) | 0x04 | ((LMIC.rxsyms >> 8) & 0x3); + +#if CFG_TxContinuousMode + // Only for testing + // set ModemConfig2 (sf, TxContinuousMode=1, AgcAutoOn=1 SymbTimeoutHi=00) + mc2 |= 0x8; +#endif + + writeReg(LORARegModemConfig2, mc2); + +#else +#error Missing CFG_sx1272_radio/CFG_sx1276_radio +#endif /* CFG_sx1272_radio */ +} + +static void configChannel () { + // set frequency: FQ = (FRF * 32 Mhz) / (2 ^ 19) + uint64_t frf = ((uint64_t)LMIC.freq << 19) / 32000000; + writeReg(RegFrfMsb, (u1_t)(frf>>16)); + writeReg(RegFrfMid, (u1_t)(frf>> 8)); + writeReg(RegFrfLsb, (u1_t)(frf>> 0)); +} + +// On the SX1276, we have several possible configs. +// 1) using RFO, MaxPower==0: in that case power is -4 to 11 dBm +// 2) using RFO, MaxPower==7: in that case, power is 0 to 14 dBm +// (can't select 15 dBm). +// note we can use -4..11 w/o Max and then 12..14 w/Max, and +// we really don't need to ask anybody. +// 3) using PA_BOOST, PaDac = 4: in that case power range is 2 to 17 dBm; +// use this for 15..17 if authorized. +// 4) using PA_BOOST, PaDac = 7, OutputPower=0xF: in that case, power is 20 dBm +// (and perhaps 0xE is 19, 0xD is 18 dBm, but datasheet isn't clear.) +// and duty cycle must be <= 1%. +// +// In addition, there are some boards for which PA_BOOST can only be used if the +// channel frequency is greater than SX127X_FREQ_LF_MAX. +// +// The SX1272 is similar but has no MaxPower bit: +// 1) using RFO: power is -1 to 13 dBm (datasheet implies max OutputPower value is 14 for 13 dBm) +// 2) using PA_BOOST, PaDac = 0x84: power is 2 to 17 dBm; +// use this for 14..17 if authorized +// 3) using PA_BOOST, PaDac = 0x87, OutputPower = 0xF: power is 20dBm +// and duty cycle must be <= 1% +// +// The general policy is to use the lowest power variant that will get us where we +// need to be. +// + +static void configPower () { + // our input paramter -- might be different than LMIC.txpow! + s1_t const req_pw = (s1_t)LMIC.radio_txpow; + // the effective power + s1_t eff_pw; + // the policy; we're going to compute this. + u1_t policy; + // what we'll write to RegPaConfig + u1_t rPaConfig; + // what we'll write to RegPaDac + u1_t rPaDac; + // what we'll write to RegOcp + u1_t rOcp; + +#ifdef CFG_sx1276_radio + if (req_pw >= 20) { + policy = LMICHAL_radio_tx_power_policy_20dBm; + eff_pw = 20; + } else if (req_pw >= 14) { + policy = LMICHAL_radio_tx_power_policy_paboost; + if (req_pw > 17) { + eff_pw = 17; + } else { + eff_pw = req_pw; + } + } else { + policy = LMICHAL_radio_tx_power_policy_rfo; + if (req_pw < -4) { + eff_pw = -4; + } else { + eff_pw = req_pw; + } + } + + policy = hal_getTxPowerPolicy(policy, eff_pw, LMIC.freq); + + switch (policy) { + default: + case LMICHAL_radio_tx_power_policy_rfo: + rPaDac = SX127X_PADAC_POWER_NORMAL; + rOcp = SX127X_OCP_MAtoBITS(80); + + if (eff_pw > 14) + eff_pw = 14; + if (eff_pw > 11) { + // some Semtech code uses this down to eff_pw == 0. + rPaConfig = eff_pw | SX1276_PAC_MAX_POWER_MASK; + } else { + if (eff_pw < -4) + eff_pw = -4; + rPaConfig = eff_pw + 4; + } + break; + + // some radios (HopeRF RFM95W) don't support RFO well, + // so the policy might *raise* rfo to paboost. That means + // we have to re-check eff_pw, which might be too small. + // (And, of course, it might also be too large.) + case LMICHAL_radio_tx_power_policy_paboost: + // It seems that SX127x doesn't like eff_pw 10 when in FSK mode. + if (getSf(LMIC.rps) == FSK && eff_pw < 11) { + eff_pw = 11; + } + rPaDac = SX127X_PADAC_POWER_NORMAL; + rOcp = SX127X_OCP_MAtoBITS(100); + if (eff_pw > 17) + eff_pw = 17; + else if (eff_pw < 2) + eff_pw = 2; + rPaConfig = (eff_pw - 2) | SX1276_PAC_PA_SELECT_PA_BOOST; + break; + + case LMICHAL_radio_tx_power_policy_20dBm: + rPaDac = SX127X_PADAC_POWER_20dBm; + rOcp = SX127X_OCP_MAtoBITS(130); + rPaConfig = 0xF | SX1276_PAC_PA_SELECT_PA_BOOST; + break; + } + +#elif CFG_sx1272_radio + if (req_pw >= 20) { + policy = LMICHAL_radio_tx_power_policy_20dBm; + eff_pw = 20; + } else if (eff_pw >= 14) { + policy = LMICHAL_radio_tx_power_policy_paboost; + if (eff_pw > 17) { + eff_pw = 17; + } else { + eff_pw = req_pw; + } + } else { + policy = LMICHAL_radio_tx_power_policy_rfo; + if (req_pw < -1) { + eff_pw = -1; + } else { + eff_pw = req_pw; + } + } + + policy = hal_getTxPowerPolicy(policy, eff_pw, LMIC.freq); + + switch (policy) { + default: + case LMICHAL_radio_tx_power_policy_rfo: + rPaDac = SX127X_PADAC_POWER_NORMAL; + rOcp = SX127X_OCP_MAtoBITS(50); + + if (eff_pw > 13) + eff_pw = 13; + + rPaConfig = eff_pw + 1; + break; + + case LMICHAL_radio_tx_power_policy_paboost: + rPaDac = SX127X_PADAC_POWER_NORMAL; + rOcp = SX127X_OCP_MAtoBITS(100); + + if (eff_pw > 17) + eff_pw = 17; + + rPaConfig = (eff_pw - 2) | SX1272_PAC_PA_SELECT_PA_BOOST; + break; + + case LMICHAL_radio_tx_power_policy_20dBm: + rPaDac = SX127X_PADAC_POWER_20dBm; + rOcp = SX127X_OCP_MAtoBITS(130); + + rPaConfig = 0xF | SX1276_PAC_PA_SELECT_PA_BOOST; + break; + } +#else +#error Missing CFG_sx1272_radio/CFG_sx1276_radio +#endif /* CFG_sx1272_radio */ + + writeReg(RegPaConfig, rPaConfig); + writeReg(RegPaDac, (readReg(RegPaDac) & ~SX127X_PADAC_POWER_MASK) | rPaDac); + writeReg(RegOcp, rOcp | SX127X_OCP_ENA); +} + +static void setupFskRxTx(bit_t fDisableAutoClear) { + // set bitrate + writeReg(FSKRegBitrateMsb, 0x02); // 50kbps + writeReg(FSKRegBitrateLsb, 0x80); + // set frequency deviation + writeReg(FSKRegFdevMsb, 0x01); // +/- 25kHz + writeReg(FSKRegFdevLsb, 0x99); + + // set sync config + writeReg(FSKRegSyncConfig, 0x12); // no auto restart, preamble 0xAA, enable, fill FIFO, 3 bytes sync + + // set packet config + writeReg(FSKRegPacketConfig1, fDisableAutoClear ? 0xD8 : 0xD0); // var-length, whitening, crc, no auto-clear, no adr filter + writeReg(FSKRegPacketConfig2, 0x40); // packet mode + + // set sync value + writeReg(FSKRegSyncValue1, 0xC1); + writeReg(FSKRegSyncValue2, 0x94); + writeReg(FSKRegSyncValue3, 0xC1); +} + +static void txfsk () { + // select FSK modem (from sleep mode) + opmodeFSK(); + + // enter standby mode (required for FIFO loading)) + opmode(OPMODE_STANDBY); + // set bitrate etc + setupFskRxTx(/* don't autoclear CRC */ 0); + + // frame and packet handler settings + writeReg(FSKRegPreambleMsb, 0x00); + writeReg(FSKRegPreambleLsb, 0x05); + + // configure frequency + configChannel(); + // configure output power + configPower(); + +#ifdef CFG_sx1276_radio + // select Gausian filter BT=0.5, default ramp. + writeReg(RegPaRamp, 0x29); +#endif + + // set the IRQ mapping DIO0=PacketSent DIO1=NOP DIO2=NOP + writeReg(RegDioMapping1, MAP_DIO0_FSK_READY|MAP_DIO1_FSK_NOP|MAP_DIO2_FSK_TXNOP); + + // initialize the payload size and address pointers + // TODO(tmm@mcci.com): datasheet says this is not used in variable packet length mode + writeReg(FSKRegPayloadLength, LMIC.dataLen+1); // (insert length byte into payload)) + + // download length byte and buffer to the radio FIFO + writeReg(RegFifo, LMIC.dataLen); + writeBuf(RegFifo, LMIC.frame, LMIC.dataLen); + + // enable antenna switch for TX + hal_pin_rxtx(1); + + // now we actually start the transmission + if (LMIC.txend) { + u4_t nLate = hal_waitUntil(LMIC.txend); // busy wait until exact tx time + if (nLate > 0) { + LMIC.radio.txlate_ticks += nLate; + ++LMIC.radio.txlate_count; + } + } + LMICOS_logEventUint32("+Tx FSK", LMIC.dataLen); + opmode(OPMODE_TX); +} + +static void txlora () { + // select LoRa modem (from sleep mode) + //writeReg(RegOpMode, OPMODE_LORA); + opmodeLora(); + ASSERT((readReg(RegOpMode) & OPMODE_LORA) != 0); + + // enter standby mode (required for FIFO loading)) + opmode(OPMODE_STANDBY); + // configure LoRa modem (cfg1, cfg2) + configLoraModem(); + // configure frequency + configChannel(); + // configure output power +#ifdef CFG_sx1272_radio + writeReg(RegPaRamp, (readReg(RegPaRamp) & 0xF0) | 0x08); // set PA ramp-up time 50 uSec +#elif defined(CFG_sx1276_radio) + writeReg(RegPaRamp, 0x08); // set PA ramp-up time 50 uSec, clear FSK bits +#endif + configPower(); + // set sync word + writeReg(LORARegSyncWord, LORA_MAC_PREAMBLE); + + // set the IRQ mapping DIO0=TxDone DIO1=NOP DIO2=NOP + writeReg(RegDioMapping1, MAP_DIO0_LORA_TXDONE|MAP_DIO1_LORA_NOP|MAP_DIO2_LORA_NOP); + // clear all radio IRQ flags + writeReg(LORARegIrqFlags, 0xFF); + // mask all IRQs but TxDone + writeReg(LORARegIrqFlagsMask, ~IRQ_LORA_TXDONE_MASK); + + // initialize the payload size and address pointers + writeReg(LORARegFifoTxBaseAddr, 0x00); + writeReg(LORARegFifoAddrPtr, 0x00); + writeReg(LORARegPayloadLength, LMIC.dataLen); + + // download buffer to the radio FIFO + writeBuf(RegFifo, LMIC.frame, LMIC.dataLen); + + // enable antenna switch for TX + hal_pin_rxtx(1); + + // now we actually start the transmission + if (LMIC.txend) { + u4_t nLate = hal_waitUntil(LMIC.txend); // busy wait until exact tx time + if (nLate) { + LMIC.radio.txlate_ticks += nLate; + ++LMIC.radio.txlate_count; + } + } + LMICOS_logEventUint32("+Tx LoRa", LMIC.dataLen); + opmode(OPMODE_TX); + +#if LMIC_DEBUG_LEVEL > 0 + u1_t sf = getSf(LMIC.rps) + 6; // 1 == SF7 + u1_t bw = getBw(LMIC.rps); + u1_t cr = getCr(LMIC.rps); + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": TXMODE, freq=%"PRIu32", len=%d, SF=%d, BW=%d, CR=4/%d, IH=%d\n", + os_getTime(), LMIC.freq, LMIC.dataLen, sf, + bw == BW125 ? 125 : (bw == BW250 ? 250 : 500), + cr == CR_4_5 ? 5 : (cr == CR_4_6 ? 6 : (cr == CR_4_7 ? 7 : 8)), + getIh(LMIC.rps) + ); +#endif +} + +// start transmitter (buf=LMIC.frame, len=LMIC.dataLen) +static void starttx () { + u1_t const rOpMode = readReg(RegOpMode); + + // originally, this code ASSERT()ed, but asserts are both bad and + // blunt instruments. If we see that we're not in sleep mode, + // force sleep (because we might have to switch modes) + if ((rOpMode & OPMODE_MASK) != OPMODE_SLEEP) { +#if LMIC_DEBUG_LEVEL > 0 + LMIC_DEBUG_PRINTF("?%s: OPMODE != OPMODE_SLEEP: %#02x\n", __func__, rOpMode); +#endif + opmode(OPMODE_SLEEP); + hal_waitUntil(os_getTime() + ms2osticks(1)); + } + + if (LMIC.lbt_ticks > 0) { + oslmic_radio_rssi_t rssi; + radio_monitor_rssi(LMIC.lbt_ticks, &rssi); +#if LMIC_X_DEBUG_LEVEL > 0 + LMIC_X_DEBUG_PRINTF("LBT rssi max:min=%d:%d %d times in %d\n", rssi.max_rssi, rssi.min_rssi, rssi.n_rssi, LMIC.lbt_ticks); +#endif + + if (rssi.max_rssi >= LMIC.lbt_dbmax) { + // complete the request by scheduling the job + os_setCallback(&LMIC.osjob, LMIC.osjob.func); + return; + } + } + + if(getSf(LMIC.rps) == FSK) { // FSK modem + txfsk(); + } else { // LoRa modem + txlora(); + } + // the radio will go back to STANDBY mode as soon as the TX is finished + // the corresponding IRQ will inform us about completion. +} + +enum { RXMODE_SINGLE, RXMODE_SCAN, RXMODE_RSSI }; + +static CONST_TABLE(u1_t, rxlorairqmask)[] = { + [RXMODE_SINGLE] = IRQ_LORA_RXDONE_MASK|IRQ_LORA_RXTOUT_MASK, + [RXMODE_SCAN] = IRQ_LORA_RXDONE_MASK, + [RXMODE_RSSI] = 0x00, +}; + +//! \brief handle late RX events. +//! \param nLate is the number of `ostime_t` ticks that the event was late. +//! \details If nLate is non-zero, increment the count of events, totalize +//! the number of ticks late, and (if implemented) adjust the estimate of +//! what would be best to return from `os_getRadioRxRampup()`. +static void rxlate (u4_t nLate) { + if (nLate) { + LMIC.radio.rxlate_ticks += nLate; + ++LMIC.radio.rxlate_count; + } +} + +// start LoRa receiver (time=LMIC.rxtime, timeout=LMIC.rxsyms, result=LMIC.frame[LMIC.dataLen]) +static void rxlora (u1_t rxmode) { + // select LoRa modem (from sleep mode) + opmodeLora(); + ASSERT((readReg(RegOpMode) & OPMODE_LORA) != 0); + // enter standby mode (warm up)) + opmode(OPMODE_STANDBY); + // don't use MAC settings at startup + if(rxmode == RXMODE_RSSI) { // use fixed settings for rssi scan + writeReg(LORARegModemConfig1, RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG1); + writeReg(LORARegModemConfig2, RXLORA_RXMODE_RSSI_REG_MODEM_CONFIG2); + } else { // single or continuous rx mode + // configure LoRa modem (cfg1, cfg2) + configLoraModem(); + // configure frequency + configChannel(); + } + // set LNA gain + writeReg(RegLna, LNA_RX_GAIN); + // set max payload size + writeReg(LORARegPayloadMaxLength, MAX_LEN_FRAME); +#if !defined(DISABLE_INVERT_IQ_ON_RX) /* DEPRECATED(tmm@mcci.com); #250. remove test, always include code in V3 */ + // use inverted I/Q signal (prevent mote-to-mote communication) + + // XXX: use flag to switch on/off inversion + if (LMIC.noRXIQinversion) { + writeReg(LORARegInvertIQ, readReg(LORARegInvertIQ) & ~(1<<6)); + } else { + writeReg(LORARegInvertIQ, readReg(LORARegInvertIQ)|(1<<6)); + } +#endif + + // Errata 2.3 - receiver spurious reception of a LoRa signal + bw_t const bw = getBw(LMIC.rps); + u1_t const rDetectOptimize = (readReg(LORARegDetectOptimize) & 0x78) | 0x03; + if (bw < BW500) { + writeReg(LORARegDetectOptimize, rDetectOptimize); + writeReg(LORARegIffReq1, 0x40); + writeReg(LORARegIffReq2, 0x40); + } else { + writeReg(LORARegDetectOptimize, rDetectOptimize | 0x80); + } + + // set symbol timeout (for single rx) + writeReg(LORARegSymbTimeoutLsb, (uint8_t) LMIC.rxsyms); + // set sync word + writeReg(LORARegSyncWord, LORA_MAC_PREAMBLE); + + // configure DIO mapping DIO0=RxDone DIO1=RxTout DIO2=NOP + writeReg(RegDioMapping1, MAP_DIO0_LORA_RXDONE|MAP_DIO1_LORA_RXTOUT|MAP_DIO2_LORA_NOP); + // clear all radio IRQ flags + writeReg(LORARegIrqFlags, 0xFF); + // enable required radio IRQs + writeReg(LORARegIrqFlagsMask, ~TABLE_GET_U1(rxlorairqmask, rxmode)); + + // enable antenna switch for RX + hal_pin_rxtx(0); + + writeReg(LORARegFifoAddrPtr, 0); + writeReg(LORARegFifoRxBaseAddr, 0); + + // now instruct the radio to receive + if (rxmode == RXMODE_SINGLE) { // single rx + u4_t nLate = hal_waitUntil(LMIC.rxtime); // busy wait until exact rx time + opmode(OPMODE_RX_SINGLE); + LMICOS_logEventUint32("+Rx LoRa Single", nLate); + rxlate(nLate); +#if LMIC_DEBUG_LEVEL > 0 + ostime_t now = os_getTime(); + LMIC_DEBUG_PRINTF("start single rx: now-rxtime: %"LMIC_PRId_ostime_t"\n", now - LMIC.rxtime); +#endif + } else { // continous rx (scan or rssi) + LMICOS_logEventUint32("+Rx LoRa Continuous", rxmode); + opmode(OPMODE_RX); + } + +#if LMIC_DEBUG_LEVEL > 0 + if (rxmode == RXMODE_RSSI) { + LMIC_DEBUG_PRINTF("RXMODE_RSSI\n"); + } else { + u1_t sf = getSf(LMIC.rps) + 6; // 1 == SF7 + u1_t bw = getBw(LMIC.rps); + u1_t cr = getCr(LMIC.rps); + LMIC_DEBUG_PRINTF("%"LMIC_PRId_ostime_t": %s, freq=%"PRIu32", SF=%d, BW=%d, CR=4/%d, IH=%d\n", + os_getTime(), + rxmode == RXMODE_SINGLE ? "RXMODE_SINGLE" : (rxmode == RXMODE_SCAN ? "RXMODE_SCAN" : "UNKNOWN_RX"), + LMIC.freq, sf, + bw == BW125 ? 125 : (bw == BW250 ? 250 : 500), + cr == CR_4_5 ? 5 : (cr == CR_4_6 ? 6 : (cr == CR_4_7 ? 7 : 8)), + getIh(LMIC.rps) + ); + } +#endif +} + +static void rxfsk (u1_t rxmode) { + // only single or continuous rx (no noise sampling) + if (rxmode == RXMODE_SCAN) { + // indicate no bytes received. + LMIC.dataLen = 0; + // complete the request by scheduling the job. + os_setCallback(&LMIC.osjob, LMIC.osjob.func); + } + + // select FSK modem (from sleep mode) + //writeReg(RegOpMode, 0x00); // (not LoRa) + opmodeFSK(); + ASSERT((readReg(RegOpMode) & OPMODE_LORA) == 0); + // enter standby mode (warm up)) + opmode(OPMODE_STANDBY); + // configure frequency + configChannel(); + // set LNA gain + writeReg(RegLna, LNA_RX_GAIN); // max gain, boost enable. + // configure receiver + writeReg(FSKRegRxConfig, 0x1E); // AFC auto, AGC, trigger on preamble?!? + // set receiver bandwidth + writeReg(FSKRegRxBw, 0x0B); // 50kHz SSb + // set AFC bandwidth + writeReg(FSKRegAfcBw, 0x12); // 83.3kHz SSB + // set preamble detection + writeReg(FSKRegPreambleDetect, 0xAA); // enable, 2 bytes, 10 chip errors + // set preamble timeout + writeReg(FSKRegRxTimeout2, 0xFF);//(LMIC.rxsyms+1)/2); + // set bitrate, autoclear CRC + setupFskRxTx(1); + + // configure DIO mapping DIO0=PayloadReady DIO1=NOP DIO2=TimeOut + writeReg(RegDioMapping1, MAP_DIO0_FSK_READY|MAP_DIO1_FSK_NOP|MAP_DIO2_FSK_TIMEOUT); + + // enable antenna switch for RX + hal_pin_rxtx(0); + + // now instruct the radio to receive + if (rxmode == RXMODE_SINGLE) { + u4_t nLate = hal_waitUntil(LMIC.rxtime); // busy wait until exact rx time + opmode(OPMODE_RX); // no single rx mode available in FSK + LMICOS_logEventUint32("+Rx FSK", nLate); + rxlate(nLate); + } else { + LMICOS_logEvent("+Rx FSK Continuous"); + opmode(OPMODE_RX); + } +} + +static void startrx (u1_t rxmode) { + ASSERT( (readReg(RegOpMode) & OPMODE_MASK) == OPMODE_SLEEP ); + if(getSf(LMIC.rps) == FSK) { // FSK modem + rxfsk(rxmode); + } else { // LoRa modem + rxlora(rxmode); + } + // the radio will go back to STANDBY mode as soon as the RX is finished + // or timed out, and the corresponding IRQ will inform us about completion. +} + +//! \brief Initialize radio at system startup. +//! +//! \details This procedure is called during initialization by the `os_init()` +//! routine. It does a hardware reset of the radio, checks the version and confirms +//! that we're operating a suitable chip, and gets a random seed from wideband +//! noise rssi. It then puts the radio to sleep. +//! +//! \result True if successful, false if it doesn't look like the right radio is attached. +//! +//! \pre +//! Preconditions must be observed, or you'll get hangs during initialization. +//! +//! - The `hal_pin_..()` functions must be ready for use. +//! - The `hal_waitUntl()` function must be ready for use. This may mean that interrupts +//! are enabled. +//! - The `hal_spi_..()` functions must be ready for use. +//! +//! Generally, all these are satisfied by a call to `hal_init_with_pinmap()`. +//! +int radio_init () { + requestModuleActive(1); + + // manually reset radio +#ifdef CFG_sx1276_radio + hal_pin_rst(0); // drive RST pin low +#else + hal_pin_rst(1); // drive RST pin high +#endif + hal_waitUntil(os_getTime()+ms2osticks(1)); // wait >100us + hal_pin_rst(2); // configure RST pin floating! + hal_waitUntil(os_getTime()+ms2osticks(5)); // wait 5ms + + opmode(OPMODE_SLEEP); + + // some sanity checks, e.g., read version number + u1_t v = readReg(RegVersion); +#ifdef CFG_sx1276_radio + if(v != 0x12 ) + return 0; +#elif CFG_sx1272_radio + if(v != 0x22) + return 0; +#else +#error Missing CFG_sx1272_radio/CFG_sx1276_radio +#endif + // set the tcxo input, if needed + if (hal_queryUsingTcxo()) + writeReg(RegTcxo, readReg(RegTcxo) | RegTcxo_TcxoInputOn); + + // seed 15-byte randomness via noise rssi + rxlora(RXMODE_RSSI); + while( (readReg(RegOpMode) & OPMODE_MASK) != OPMODE_RX ); // continuous rx + for(int i=1; i<16; i++) { + for(int j=0; j<8; j++) { + u1_t b; // wait for two non-identical subsequent least-significant bits + while( (b = readReg(LORARegRssiWideband) & 0x01) == (readReg(LORARegRssiWideband) & 0x01) ); + randbuf[i] = (randbuf[i] << 1) | b; + } + } + randbuf[0] = 16; // set initial index + +#ifdef CFG_sx1276mb1_board + // chain calibration + writeReg(RegPaConfig, 0); + + // Launch Rx chain calibration for LF band + writeReg(FSKRegImageCal, (readReg(FSKRegImageCal) & RF_IMAGECAL_IMAGECAL_MASK)|RF_IMAGECAL_IMAGECAL_START); + while((readReg(FSKRegImageCal)&RF_IMAGECAL_IMAGECAL_RUNNING) == RF_IMAGECAL_IMAGECAL_RUNNING){ ; } + + // Sets a Frequency in HF band + u4_t frf = 868000000; + writeReg(RegFrfMsb, (u1_t)(frf>>16)); + writeReg(RegFrfMid, (u1_t)(frf>> 8)); + writeReg(RegFrfLsb, (u1_t)(frf>> 0)); + + // Launch Rx chain calibration for HF band + writeReg(FSKRegImageCal, (readReg(FSKRegImageCal) & RF_IMAGECAL_IMAGECAL_MASK)|RF_IMAGECAL_IMAGECAL_START); + while((readReg(FSKRegImageCal) & RF_IMAGECAL_IMAGECAL_RUNNING) == RF_IMAGECAL_IMAGECAL_RUNNING) { ; } +#endif /* CFG_sx1276mb1_board */ + + opmode(OPMODE_SLEEP); + + return 1; +} + +// return next random byte derived from seed buffer +// (buf[0] holds index of next byte to be returned) +u1_t radio_rand1 () { + u1_t i = randbuf[0]; + ASSERT( i != 0 ); + if( i==16 ) { + os_aes(AES_ENC, randbuf, 16); // encrypt seed with any key + i = 0; + } + u1_t v = randbuf[i++]; + randbuf[0] = i; + return v; +} + +u1_t radio_rssi () { + u1_t r = readReg(LORARegRssiValue); + return r; +} + +/// \brief get the current RSSI on the current channel. +/// +/// monitor rssi for specified number of ostime_t ticks, and return statistics +/// This puts the radio into RX continuous mode, waits long enough for the +/// oscillators to start and the PLL to lock, and then measures for the specified +/// period of time. The radio is then returned to idle. +/// +/// RSSI returned is expressed in units of dB, and is offset according to the +/// current radio setting per section 5.5.5 of Semtech 1276 datasheet. +/// +/// \param nTicks How long to monitor +/// \param pRssi pointer to structure to fill in with RSSI data. +/// +void radio_monitor_rssi(ostime_t nTicks, oslmic_radio_rssi_t *pRssi) { + uint8_t rssiMax, rssiMin; + uint16_t rssiSum; + uint16_t rssiN; + + int rssiAdjust; + ostime_t tBegin; + int notDone; + + rxlora(RXMODE_SCAN); + + // while we're waiting for the PLLs to spin up, determine which + // band we're in and choose the base RSSI. +#if defined(CFG_sx1276_radio) + if (LMIC.freq > SX127X_FREQ_LF_MAX) { + rssiAdjust = SX1276_RSSI_ADJUST_HF; + } else { + rssiAdjust = SX1276_RSSI_ADJUST_LF; + } +#elif defined(CFG_sx1272_radio) + rssiAdjust = SX1272_RSSI_ADJUST; +#endif + rssiAdjust += hal_getRssiCal(); + + // zero the results + rssiMax = 255; + rssiMin = 0; + rssiSum = 0; + rssiN = 0; + + // wait for PLLs + hal_waitUntil(os_getTime() + SX127X_RX_POWER_UP); + + // scan for the desired time. + tBegin = os_getTime(); + rssiMax = 0; + + /* Per bug report from tanupoo, it's critical that interrupts be enabled + * in the loop below so that `os_getTime()` always advances. + */ + do { + ostime_t now; + + u1_t rssiNow = readReg(LORARegRssiValue); + + if (rssiMax < rssiNow) + rssiMax = rssiNow; + if (rssiNow < rssiMin) + rssiMin = rssiNow; + rssiSum += rssiNow; + ++rssiN; + now = os_getTime(); + notDone = now - (tBegin + nTicks) < 0; + } while (notDone); + + // put radio back to sleep + opmode(OPMODE_SLEEP); + + // compute the results + pRssi->max_rssi = (s2_t) (rssiMax + rssiAdjust); + pRssi->min_rssi = (s2_t) (rssiMin + rssiAdjust); + pRssi->mean_rssi = (s2_t) (rssiAdjust + ((rssiSum + (rssiN >> 1)) / rssiN)); + pRssi->n_rssi = rssiN; +} + +static CONST_TABLE(u2_t, LORA_RXDONE_FIXUP)[] = { + [FSK] = us2osticks(0), // ( 0 ticks) + [SF7] = us2osticks(0), // ( 0 ticks) + [SF8] = us2osticks(1648), // ( 54 ticks) + [SF9] = us2osticks(3265), // ( 107 ticks) + [SF10] = us2osticks(7049), // ( 231 ticks) + [SF11] = us2osticks(13641), // ( 447 ticks) + [SF12] = us2osticks(31189), // (1022 ticks) +}; + +// called by hal ext IRQ handler +// (radio goes to stanby mode after tx/rx operations) +void radio_irq_handler (u1_t dio) { + radio_irq_handler_v2(dio, os_getTime()); +} + +void radio_irq_handler_v2 (u1_t dio, ostime_t now) { + LMIC_API_PARAMETER(dio); + +#if CFG_TxContinuousMode + // in continuous mode, we don't use the now parameter. + LMIC_UNREFERENCED_PARAMETER(now); + + // clear radio IRQ flags + writeReg(LORARegIrqFlags, 0xFF); + u1_t p = readReg(LORARegFifoAddrPtr); + writeReg(LORARegFifoAddrPtr, 0x00); + u1_t s = readReg(RegOpMode); + u1_t c = readReg(LORARegModemConfig2); + LMICOS_logEventUint32("+Tx LoRa Continuous", (r << 8) + c); + opmode(OPMODE_TX); + return; +#else /* ! CFG_TxContinuousMode */ + +#if LMIC_DEBUG_LEVEL > 0 + ostime_t const entry = now; +#endif + if( (readReg(RegOpMode) & OPMODE_LORA) != 0) { // LORA modem + u1_t flags = readReg(LORARegIrqFlags); + LMIC.saveIrqFlags = flags; + LMICOS_logEventUint32("radio_irq_handler_v2: LoRa", flags); + LMIC_X_DEBUG_PRINTF("IRQ=%02x\n", flags); + if( flags & IRQ_LORA_TXDONE_MASK ) { + // save exact tx time + LMIC.txend = now - us2osticks(43); // TXDONE FIXUP + } else if( flags & IRQ_LORA_RXDONE_MASK ) { + // save exact rx time + if(getBw(LMIC.rps) == BW125) { + now -= TABLE_GET_U2(LORA_RXDONE_FIXUP, getSf(LMIC.rps)); + } + LMIC.rxtime = now; + // read the PDU and inform the MAC that we received something + LMIC.dataLen = (readReg(LORARegModemConfig1) & SX127X_MC1_IMPLICIT_HEADER_MODE_ON) ? + readReg(LORARegPayloadLength) : readReg(LORARegRxNbBytes); + // set FIFO read address pointer + writeReg(LORARegFifoAddrPtr, readReg(LORARegFifoRxCurrentAddr)); + // now read the FIFO + readBuf(RegFifo, LMIC.frame, LMIC.dataLen); + // read rx quality parameters + LMIC.snr = readReg(LORARegPktSnrValue); // SNR [dB] * 4 + u1_t const rRssi = readReg(LORARegPktRssiValue); + s2_t rssi = rRssi; + if (LMIC.freq > SX127X_FREQ_LF_MAX) + rssi += SX127X_RSSI_ADJUST_HF; + else + rssi += SX127X_RSSI_ADJUST_LF; + if (LMIC.snr < 0) + rssi = rssi - (-LMIC.snr >> 2); + else if (rssi > -100) { + // correct nonlinearity -- this is the same as multiplying rRssi * 16/15 initially. + rssi += (rRssi / 15); + } + + LMIC_X_DEBUG_PRINTF("RX snr=%u rssi=%d\n", LMIC.snr/4, rssi); + // ugh compatibility requires a biased range. RSSI + LMIC.rssi = (s1_t) (RSSI_OFF + (rssi < -196 ? -196 : rssi > 63 ? 63 : rssi)); // RSSI [dBm] (-196...+63) + } else if( flags & IRQ_LORA_RXTOUT_MASK ) { + // indicate timeout + LMIC.dataLen = 0; +#if LMIC_DEBUG_LEVEL > 0 + ostime_t now2 = os_getTime(); + LMIC_DEBUG_PRINTF("rxtimeout: entry: %"LMIC_PRId_ostime_t" rxtime: %"LMIC_PRId_ostime_t" entry-rxtime: %"LMIC_PRId_ostime_t" now-entry: %"LMIC_PRId_ostime_t" rxtime-txend: %"LMIC_PRId_ostime_t"\n", entry, + LMIC.rxtime, entry - LMIC.rxtime, now2 - entry, LMIC.rxtime-LMIC.txend); +#endif + } + // mask all radio IRQs + writeReg(LORARegIrqFlagsMask, 0xFF); + // clear radio IRQ flags + writeReg(LORARegIrqFlags, 0xFF); + } else { // FSK modem + u1_t flags1 = readReg(FSKRegIrqFlags1); + u1_t flags2 = readReg(FSKRegIrqFlags2); + + LMICOS_logEventUint32("*radio_irq_handler_v2: FSK", ((u2_t)flags2 << 8) | flags1); + + if( flags2 & IRQ_FSK2_PACKETSENT_MASK ) { + // save exact tx time + LMIC.txend = now; + } else if( flags2 & IRQ_FSK2_PAYLOADREADY_MASK ) { + // save exact rx time + LMIC.rxtime = now; + // read the PDU and inform the MAC that we received something + LMIC.dataLen = readReg(FSKRegPayloadLength); + // now read the FIFO + readBuf(RegFifo, LMIC.frame, LMIC.dataLen); + // read rx quality parameters + LMIC.snr = 0; // SX127x doesn't give SNR for FSK. + LMIC.rssi = -64 + RSSI_OFF; // SX127x doesn't give packet RSSI for FSK, + // so substitute a dummy value. + } else if( flags1 & IRQ_FSK1_TIMEOUT_MASK ) { + // indicate timeout + LMIC.dataLen = 0; + } else { + // ASSERT(0); + // we're not sure why we're here... treat as timeout. + LMIC.dataLen = 0; + } + + // in FSK, we need to put the radio in standby first. + opmode(OPMODE_STANDBY); + } + // go from standby to sleep + opmode(OPMODE_SLEEP); + // run os job (use preset func ptr) + os_setCallback(&LMIC.osjob, LMIC.osjob.func); +#endif /* ! CFG_TxContinuousMode */ +} + +/*! + +\brief Initiate a radio operation. + +\param mode Selects the operation to be performed. + +The requested radio operation is initiated. Some operations complete +immediately; others require hardware to do work, and don't complete until +an interrupt occurs. In that case, `LMIC.osjob` is scheduled. Because the +interrupt may occur right away, it's important that the caller initialize +`LMIC.osjob` before calling this routine. + +- `RADIO_RST` causes the radio to be put to sleep. No interrupt follows; +when control returns, the radio is ready for the next operation. + +- `RADIO_TX` and `RADIO_TX_AT` launch the transmission of a frame. An interrupt will +occur, which will cause `LMIC.osjob` to be scheduled with its current +function. + +- `RADIO_RX` and `RADIO_RX_ON` launch either single or continuous receives. +An interrupt will occur when a packet is recieved or the receive times out, +which will cause `LMIC.osjob` to be scheduled with its current function. + +*/ + +void os_radio (u1_t mode) { + switch (mode) { + case RADIO_RST: + // put radio to sleep + opmode(OPMODE_SLEEP); + break; + + case RADIO_TX: + // transmit frame now + LMIC.txend = 0; + starttx(); // buf=LMIC.frame, len=LMIC.dataLen + break; + + case RADIO_TX_AT: + if (LMIC.txend == 0) + LMIC.txend = 1; + starttx(); + break; + + case RADIO_RX: + // receive frame now (exactly at rxtime) + startrx(RXMODE_SINGLE); // buf=LMIC.frame, time=LMIC.rxtime, timeout=LMIC.rxsyms + break; + + case RADIO_RXON: + // start scanning for beacon now + startrx(RXMODE_SCAN); // buf=LMIC.frame + break; + } +} + +ostime_t os_getRadioRxRampup (void) { + return RX_RAMPUP_DEFAULT; +} |