MSP430FR5994: support DMX on eUSCI_A1 and eUSCI_A2 as well

9 files changed, 207 insertions, 22 deletions

diff --git a/README.md b/README.md
index d659105..a34df7c 100644
--- a/README.md
+++ b/README.md
@@ -81,8 +81,8 @@ Peripheral communication:
 
 * I²C controller on eUSCI\_B1
 * SPI controller on eUSCI\_B1
-* UART input/output on eUSCI\_A1 (FR5994)
-* DMX output on eUSCI\_A3
+* UART input/output on eUSCI\_A1
+* DMX output on eUSCI\_A1 / eUSCI\_A2 / eUSCI\_A3
 
 Hardware features:
 
diff --git a/include/arch/msp430fr5994lp/driver/dmx.h b/include/arch/msp430fr5994lp/driver/dmx1.h
index d3fff46..2f738b8 100644
--- a/include/arch/msp430fr5994lp/driver/dmx.h
+++ b/include/arch/msp430fr5994lp/driver/dmx1.h
@@ -4,17 +4,18 @@
  * SPDX-License-Identifier: BSD-2-Clause
  */
 
-class DMX {
+class DMX1 {
 	private:
-		DMX(const DMX &copy);
+		DMX1(const DMX1 &copy);
 
 	public:
-		unsigned char frames[16];
+		static unsigned char const num_frames = 32;
+		unsigned char frames[num_frames];
 
-		DMX() {}
+		DMX1() {}
 
 		void setup();
 		void write();
 };
 
-extern DMX dmx;
+extern DMX1 dmx1;
diff --git a/include/arch/msp430fr5994lp/driver/dmx2.h b/include/arch/msp430fr5994lp/driver/dmx2.h
new file mode 100644
index 0000000..1c8cd67
--- /dev/null
+++ b/include/arch/msp430fr5994lp/driver/dmx2.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2022 Birte Kristina Friesel
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+class DMX2 {
+	private:
+		DMX2(const DMX2 &copy);
+
+	public:
+		static unsigned char const num_frames = 32;
+		unsigned char frames[num_frames];
+
+		DMX2() {}
+
+		void setup();
+		void write();
+};
+
+extern DMX2 dmx2;
diff --git a/include/arch/msp430fr5994lp/driver/dmx3.h b/include/arch/msp430fr5994lp/driver/dmx3.h
new file mode 100644
index 0000000..c8541bf
--- /dev/null
+++ b/include/arch/msp430fr5994lp/driver/dmx3.h
@@ -0,0 +1,21 @@
+/*
+ * Copyright 2022 Birte Kristina Friesel
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+
+class DMX3 {
+	private:
+		DMX3(const DMX3 &copy);
+
+	public:
+		static unsigned char const num_frames = 32;
+		unsigned char frames[num_frames];
+
+		DMX3() {}
+
+		void setup();
+		void write();
+};
+
+extern DMX3 dmx3;
diff --git a/src/arch/msp430fr5994lp/Kconfig b/src/arch/msp430fr5994lp/Kconfig
index 4bff8f0..c4e5de7 100644
--- a/src/arch/msp430fr5994lp/Kconfig
+++ b/src/arch/msp430fr5994lp/Kconfig
@@ -9,12 +9,26 @@ config arch_msp430fr5994lp_driver_counter
 bool "Cycle Counter"
 select meta_driver_counter
 
-config arch_msp430fr5994lp_driver_dmx
-bool "DMX"
+config arch_msp430fr5994lp_driver_dmx1
+bool "DMX Output on eUSCI_A1 / P2.5"
+depends on !meta_driver_stdout1
 select meta_driver_dmx
+select meta_driver_dmx1
+
+config arch_msp430fr5994lp_driver_dmx2
+bool "DMX Output on eUSCI_A2 / P5.4"
+depends on !meta_driver_stdout2
+select meta_driver_dmx
+select meta_driver_dmx2
+
+config arch_msp430fr5994lp_driver_dmx3
+bool "DMX Output on eUSCI_A3 / P6.0"
+depends on !meta_driver_stdout3
+select meta_driver_dmx
+select meta_driver_dmx3
 
 config arch_msp430fr5994lp_driver_i2c
-bool "I2C on eUSCI_B1"
+bool "I²C on eUSCI_B1"
 select meta_driver_hardware_i2c
 select meta_driver_i2c
 
diff --git a/src/arch/msp430fr5994lp/Makefile.inc b/src/arch/msp430fr5994lp/Makefile.inc
index d3957e3..10bafa6 100644
--- a/src/arch/msp430fr5994lp/Makefile.inc
+++ b/src/arch/msp430fr5994lp/Makefile.inc
@@ -90,8 +90,16 @@ ifdef CONFIG_arch_msp430fr5994lp_driver_adc
 	CXX_TARGETS += src/arch/msp430fr5994lp/driver/adc.cc
 endif
 
-ifdef CONFIG_arch_msp430fr5994lp_driver_dmx
-	CXX_TARGETS += src/arch/msp430fr5994lp/driver/dmx.cc
+ifdef CONFIG_arch_msp430fr5994lp_driver_dmx1
+	CXX_TARGETS += src/arch/msp430fr5994lp/driver/dmx1.cc
+endif
+
+ifdef CONFIG_arch_msp430fr5994lp_driver_dmx2
+	CXX_TARGETS += src/arch/msp430fr5994lp/driver/dmx2.cc
+endif
+
+ifdef CONFIG_arch_msp430fr5994lp_driver_dmx3
+	CXX_TARGETS += src/arch/msp430fr5994lp/driver/dmx3.cc
 endif
 
 ifdef CONFIG_arch_msp430fr5994lp_driver_stdin
diff --git a/src/arch/msp430fr5994lp/driver/dmx1.cc b/src/arch/msp430fr5994lp/driver/dmx1.cc
new file mode 100644
index 0000000..cad965b
--- /dev/null
+++ b/src/arch/msp430fr5994lp/driver/dmx1.cc
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2022 Birte Kristina Friesel
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+#include <msp430.h>
+#include "arch.h"
+#include "driver/dmx1.h"
+#include "driver/gpio.h"
+
+/*
+ * Baud rate calculation according to datasheet:
+ * N := f_{BRCLK} / Baudrate = F_CPU / 115200 in our case
+ * if N <= 16: OS16 = 0, UCBR0 = int(N)
+ * if N > 16: OS16 = 1, UCBR0 = int(N/16), UCBRF0 = int(((n/16) - int(n/16)) * 16) = int(N)%16
+ * Set UCBRS0 according to table 21-4
+ */
+
+void DMX1::setup()
+{
+	UCA1CTLW0 |= UCSWRST;
+#if F_CPU == 16000000UL
+	// 16M / 250000 == 64 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 0, UCBRS0 = 0x00
+	UCA1CTLW0 = UCSWRST | UCSPB | UCSSEL__SMCLK; // MSB first, 8 data bits, 2 stop bits
+	UCA1MCTLW = UCOS16;
+	UCA1BR0 = 4;
+#else
+#error Unsupported F_CPU
+#endif
+
+	UCA1IRCTL = 0;
+	UCA1ABCTL = 0;
+
+	P2SEL0 &= ~BIT5;
+	P2SEL1 |= BIT5;
+	P2DIR |= BIT5;
+
+	UCA1CTLW0 &= ~UCSWRST;
+}
+
+void DMX1::write()
+{
+	// Disable UART for reset and mark signals
+	UCA1CTLW0 |= UCSWRST;
+	P2SEL1 &= ~BIT5;
+	gpio.output(GPIO::p2_5, 0);
+	arch.delay_us(88); // break / reset
+	gpio.output(GPIO::p2_5, 1);
+	arch.delay_us(8); // mark
+	P2SEL1 |= BIT5;
+	UCA1CTLW0 &= ~UCSWRST; // causes line to go high
+	for (unsigned short i = 0; i < num_frames; i++) {
+		while (!(UCA1IFG & UCTXIFG));
+		UCA1TXBUF = frames[i];
+	}
+	for (unsigned short i = 0; i < 258 - num_frames; i++) {
+		while (!(UCA1IFG & UCTXIFG));
+		UCA1TXBUF = 0;
+	}
+}
+
+DMX1 dmx1;
diff --git a/src/arch/msp430fr5994lp/driver/dmx2.cc b/src/arch/msp430fr5994lp/driver/dmx2.cc
new file mode 100644
index 0000000..e7d7766
--- /dev/null
+++ b/src/arch/msp430fr5994lp/driver/dmx2.cc
@@ -0,0 +1,62 @@
+/*
+ * Copyright 2022 Birte Kristina Friesel
+ *
+ * SPDX-License-Identifier: BSD-2-Clause
+ */
+#include <msp430.h>
+#include "arch.h"
+#include "driver/dmx2.h"
+#include "driver/gpio.h"
+
+/*
+ * Baud rate calculation according to datasheet:
+ * N := f_{BRCLK} / Baudrate = F_CPU / 115200 in our case
+ * if N <= 16: OS16 = 0, UCBR0 = int(N)
+ * if N > 16: OS16 = 1, UCBR0 = int(N/16), UCBRF0 = int(((n/16) - int(n/16)) * 16) = int(N)%16
+ * Set UCBRS0 according to table 21-4
+ */
+
+void DMX2::setup()
+{
+	UCA2CTLW0 |= UCSWRST;
+#if F_CPU == 16000000UL
+	// 16M / 250000 == 64 -> UCOS16 = 1, UCBR0 = 4, UCBRF0 = 0, UCBRS0 = 0x00
+	UCA2CTLW0 = UCSWRST | UCSPB | UCSSEL__SMCLK; // MSB first, 8 data bits, 2 stop bits
+	UCA2MCTLW = UCOS16;
+	UCA2BR0 = 4;
+#else
+#error Unsupported F_CPU
+#endif
+
+	UCA2IRCTL = 0;
+	UCA2ABCTL = 0;
+
+	P5SEL0 |= BIT4;
+	P5SEL1 &= ~BIT4;
+	P5DIR |= BIT4;
+
+	UCA2CTLW0 &= ~UCSWRST;
+}
+
+void DMX2::write()
+{
+	// Disable UART for reset and mark signals
+	UCA2CTLW0 |= UCSWRST;
+	P5SEL0 &= ~BIT4;
+	gpio.output(GPIO::p5_4, 0);
+	arch.delay_us(88); // break / reset
+	gpio.output(GPIO::p5_4, 1);
+	arch.delay_us(8); // mark
+	P5SEL0 |= BIT4;
+	UCA2CTLW0 &= ~UCSWRST; // causes line to go high
+	for (unsigned short i = 0; i < num_frames; i++) {
+		while (!(UCA2IFG & UCTXIFG));
+		UCA2TXBUF = frames[i];
+	}
+	for (unsigned short i = 0; i < 258 - num_frames; i++) {
+		while (!(UCA2IFG & UCTXIFG));
+		UCA2TXBUF = 0;
+	}
+}
+
+DMX2 dmx2;
diff --git a/src/arch/msp430fr5994lp/driver/dmx.cc b/src/arch/msp430fr5994lp/driver/dmx3.cc
index 3fc52bf..a401fff 100644
--- a/src/arch/msp430fr5994lp/driver/dmx.cc
+++ b/src/arch/msp430fr5994lp/driver/dmx3.cc
@@ -5,7 +5,7 @@
  */
 #include <msp430.h>
 #include "arch.h"
-#include "driver/dmx.h"
+#include "driver/dmx3.h"
 #include "driver/gpio.h"
 
 /*
@@ -16,7 +16,7 @@
  * Set UCBRS0 according to table 21-4
  */
 
-void DMX::setup()
+void DMX3::setup()
 {
 	UCA3CTLW0 |= UCSWRST;
 #if F_CPU == 16000000UL
@@ -38,7 +38,7 @@ void DMX::setup()
 	UCA3CTLW0 &= ~UCSWRST;
 }
 
-void DMX::write()
+void DMX3::write()
 {
 	// Disable UART for reset and mark signals
 	UCA3CTLW0 |= UCSWRST;
@@ -49,18 +49,14 @@ void DMX::write()
 	arch.delay_us(8); // mark
 	P6SEL0 |= BIT0;
 	UCA3CTLW0 &= ~UCSWRST; // causes line to go high
-	for (unsigned char i = 0; i < 16; i++) {
+	for (unsigned short i = 0; i < num_frames; i++) {
 		while (!(UCA3IFG & UCTXIFG));
 		UCA3TXBUF = frames[i];
 	}
-	for (unsigned char i = 0; i < 241; i++) {
-		while (!(UCA3IFG & UCTXIFG));
-		UCA3TXBUF = 0;
-	}
-	for (unsigned char i = 0; i < 255; i++) {
+	for (unsigned short i = 0; i < 258 - num_frames; i++) {
 		while (!(UCA3IFG & UCTXIFG));
 		UCA3TXBUF = 0;
 	}
 }
 
-DMX dmx;
+DMX3 dmx3;