msp430fr5994lp: model clock system in kconfig++

The configuration variables introduced in this commit have no effect at the
moment.

1 files changed, 108 insertions, 3 deletions

diff --git a/src/arch/msp430fr5994lp/Kconfig b/src/arch/msp430fr5994lp/Kconfig
index 350f075..c8fcc17 100644
--- a/src/arch/msp430fr5994lp/Kconfig
+++ b/src/arch/msp430fr5994lp/Kconfig
@@ -35,11 +35,116 @@ config arch_msp430fr5994lp_driver_uptime
 bool "Uptime Counter"
 select meta_driver_uptime
 
+config arch_msp430fr5994lp_dco_frequency
+int "DCO Frequency"
+default "16000000"
+#!accept [1000000, 2666666, 3500000, 4000000, 5333333, 7000000, 8000000, 16000000, 21000000, 24000000]
+range 1000000 24000000
+help
+  Specify the desired DCO frequency here. The DCO will be configured accordingly.
+
+config arch_msp430fr5994lp_diva
+int "ACLK Divider"
+default "1"
+#!accept [1, 2, 4, 8, 16, 32]
+range "1" "32"
+
+config arch_msp430fr5994lp_divm
+int "MCLK Divider"
+default "1"
+#!accept [1, 2, 4, 8, 16, 32]
+range "1" "32"
+
+config arch_msp430fr5994lp_divs
+int "SMCLK Divider"
+default "1"
+#!accept [1, 2, 4, 8, 16, 32]
+range "1" "32"
+
+config arch_msp430fr5994lp_sela
+int "ACLK Assignment"
+default "0"
+range 0 2
+help
+  0=LFXT or VLO, 1=VLO, 2=LFMODCLK
+
+config arch_msp430fr5994lp_selm
+int "MCLK Assignment"
+default "3"
+range 0 5
+help
+  0=LFXT or VLO, 1=VLO, 2=LFMODCLK, 3=DCO, 4=MODCLK, 5=HFXT or DCO
+
+config arch_msp430fr5994lp_sels
+int "SCLK Assignment"
+default "3"
+range 0 5
+help
+  0=LFXT or VLO, 1=VLO, 2=LFMODCLK, 3=DCO, 4=MODCLK, 5=HFXT or DCO
+
+config arch_msp430fr5994lp_cpufreq
+int "CPU Frequency"
+range arch_msp430fr5994lp_lfxt_frequency arch_msp430fr5994lp_lfxt_frequency if arch_msp430fr5994lp_selm = "0" && arch_msp430fr5994lp_divm = "1"
+range 6000 14000 if arch_msp430fr5994lp_selm = "1" && arch_msp430fr5994lp_divm = "1"
+default "9400" if arch_msp430fr5994lp_selm = "1" && arch_msp430fr5994lp_divm = "1"
+range 37500 37500 if arch_msp430fr5994lp_selm = "2" && arch_msp430fr5994lp_divm = "1"
+range arch_msp430fr5994lp_dco_frequency arch_msp430fr5994lp_dco_frequency if arch_msp430fr5994lp_selm = "3" && arch_msp430fr5994lp_divm = "1"
+range 4800000 4800000 if arch_msp430fr5994lp_selm = "4" && arch_msp430fr5994lp_divm = "1"
+range arch_msp430fr5994lp_hfxt_frequency arch_msp430fr5994lp_hfxt_frequency if arch_msp430fr5994lp_selm = "5" && arch_msp430fr5994lp_divm = "1"
+help
+
 config arch_msp430fr5994lp_large_mode
 bool "Large Memory Model (20bit pointers, 256kB FRAM)"
 
-config arch_msp430fr5994lp_hfxt_16mhz
-bool "Use external 16MHz HFXT for system clock"
+menuconfig arch_msp430fr5994lp_lfxt
+bool "LFXT Setup"
+help
+  LFXT is connected to a 32768Hz Crystal by default.
+  Enable this option if you wish to use it.
+
+config arch_msp430fr5994lp_lfxt_frequency
+int "LFXT Crystal/Input Frequency"
+default "32768"
+range 10000 50000
+depends on arch_msp430fr5994lp_lfxt
+
+config arch_msp430fr5994lp_lfxt_drive
+int "LFXT Drive"
+default "0"
+range 0 3
+depends on arch_msp430fr5994lp_lfxt
+
+config arch_msp430fr5994lp_lfxt_off
+bool "Disable LFXT"
+depends on arch_msp430fr5994lp_lfxt
+
+config arch_msp430fr5994lp_lfxt_bypass
+bool "Bypass LFXT Amplifier (for clock input)"
+depends on arch_msp430fr5994lp_lfxt
+
+menuconfig arch_msp430fr5994lp_hfxt
+bool "HFXT Setup"
 help
   System clock source defaults to DCO, HFXT is unpopulated by default.
-  Enable this option if your board contains a 16MHz crystal on HFXT.
+  Enable this option if your board contains a crystal on HFXT and you wish
+  to use it.
+
+config arch_msp430fr5994lp_hfxt_frequency
+int "HFXT Crystal/Input Frequency"
+default "16000000"
+range 0 24000000
+depends on arch_msp430fr5994lp_hfxt
+
+config arch_msp430fr5994lp_hfxt_drive
+int "HFXT Drive"
+default "0"
+range 0 3
+depends on arch_msp430fr5994lp_hfxt
+
+config arch_msp430fr5994lp_hfxt_off
+bool "Disable HFXT"
+depends on arch_msp430fr5994lp_hfxt
+
+config arch_msp430fr5994lp_hfxt_bypass
+bool "Bypass HFXT Amplifier (for clock input)"
+depends on arch_msp430fr5994lp_hfxt