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| author | Daniel Friesel <daniel.friesel@uos.de> | 2022-07-19 13:09:19 +0200 |
|---|---|---|
| committer | Daniel Friesel <daniel.friesel@uos.de> | 2022-07-19 13:09:19 +0200 |
| commit | 68f92431e5706b4bed64ad37f0f26e8eef57c11e (patch) | |
| tree | 7eb4fc7adfa7970e6fdfe6269c1683f5ce98c0c4 /src/app/adctest/main.cc | |
| parent | a42abbb4322938a802b9d270b17e6c505877252b (diff) | |
tc1796: set PLL to 150 MHz; implement delay_us/delay_ms
Diffstat (limited to 'src/app/adctest/main.cc')
0 files changed, 0 insertions, 0 deletions