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authorDaniel Friesel <derf@finalrewind.org>2018-08-09 10:54:38 +0200
committerDaniel Friesel <derf@finalrewind.org>2018-08-09 10:54:38 +0200
commited0c9e21d5351d60074a58da6dafc52a7ebb7e35 (patch)
treea7a408b4e2d3645c922688e15099a524d95a2c4f /src/arch/blinkenrocket
parentf4b31b88508892ca781ebb14716dc322e868b6db (diff)
blinkenrocket i2c: Add optional no-interrupt I2C
Diffstat (limited to 'src/arch/blinkenrocket')
-rw-r--r--src/arch/blinkenrocket/driver/i2c.cc11
1 files changed, 9 insertions, 2 deletions
diff --git a/src/arch/blinkenrocket/driver/i2c.cc b/src/arch/blinkenrocket/driver/i2c.cc
index cfbea59..8979fbb 100644
--- a/src/arch/blinkenrocket/driver/i2c.cc
+++ b/src/arch/blinkenrocket/driver/i2c.cc
@@ -5,10 +5,16 @@
inline void await_twint(unsigned char twcr_values)
{
+#if 1
TWCR = twcr_values | _BV(TWINT) | _BV(TWIE);
while (!(TWCR & _BV(TWINT))) {
arch.idle();
}
+#endif
+#if 0
+ TWCR = twcr_values | _BV(TWINT);
+ while (!(TWCR & _BV(TWINT))) ;
+#endif
}
/*
@@ -21,8 +27,8 @@ static signed char i2c_start_read(unsigned char addr)
if (!(TWSR & 0x18)) // 0x08 == START ok, 0x10 == RESTART ok
return -1;
- // Note: The R byte ("... | 1") causes the TWI momodule to switch to
- // Master Receive mode
+ // Note: An adress with read bit set ("... | 1") causes the TWI momodule
+ // to switch to Master Receive mode
TWDR = (addr << 1) | 1;
await_twint(_BV(TWEN));
if (TWSR != 0x40) // 0x40 == SLA+R transmitted, ACK receveid
@@ -55,6 +61,7 @@ static signed char i2c_start_write(unsigned char addr)
static signed char i2c_stop()
{
TWCR = _BV(TWINT) | _BV(TWSTO) | _BV(TWEN);
+ return 0;
}
/*