diff options
| author | Daniel Friesel <daniel.friesel@uos.de> | 2019-10-28 15:47:52 +0100 |
|---|---|---|
| committer | Daniel Friesel <daniel.friesel@uos.de> | 2019-10-28 15:47:52 +0100 |
| commit | 9eb55dc6e54d1287096ef66ab8ba0fff8e5a334d (patch) | |
| tree | 6a5c4483af9dbfb6afe0ca372e283ce8044a40c6 /src/arch | |
| parent | 6693c0149a787063a4726815344e4f9276b78845 (diff) | |
msp430fr5994 arch.sleep_ms: fix max sleey duration documentation
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/msp430fr5994lp/arch.cc | 18 |
1 files changed, 11 insertions, 7 deletions
diff --git a/src/arch/msp430fr5994lp/arch.cc b/src/arch/msp430fr5994lp/arch.cc index c6739dd..2e57a5f 100644 --- a/src/arch/msp430fr5994lp/arch.cc +++ b/src/arch/msp430fr5994lp/arch.cc @@ -127,26 +127,30 @@ void Arch::delay_ms(unsigned int const ms) volatile bool sleep_done = false; -// max delay: 2621 ms +// max delay: 262 ms @ 16 MHz +// max delay: 524 ms @ 8 MHz void Arch::sleep_ms(unsigned int const ms) { sleep_done = false; #if F_CPU == 16000000UL TA3CTL = TASSEL__SMCLK | ID__8; // /8 TA3EX0 = 7; // /8 -> /64 (250 kHz) + TA3CCR0 = ms * 250; #elif F_CPU == 8000000UL TA3CTL = TASSEL__SMCLK | ID__8; // /8 - TA3EX0 = 3; // /4 -> /32 (250 kHz) + TA3EX0 = 7; // /8 -> /64 (125 kHz) + TA3CCR0 = ms * 125; #elif F_CPU == 4000000UL - TA3CTL = TASSEL__SMCLK | ID__4; // /4 - TA3EX0 = 3; // /4 -> /16 (250 kHz) + TA3CTL = TASSEL__SMCLK | ID__8; // /8 + TA3EX0 = 3; // /4 -> /32 (125 kHz) + TA3CCR0 = ms * 125; #elif F_CPU == 1000000UL - TA3CTL = TASSEL__SMCLK | ID__1; // /1 - TA3EX0 = 3; // /4 -> /4 (250 kHz) + TA3CTL = TASSEL__SMCLK | ID__8; // /8 + TA3EX0 = 0; // /1 -> /8 (125 kHz) + TA3CCR0 = ms * 125; #else #error Unsupported F_CPU #endif /* F_CPU */ - TA3CCR0 = ms * 250; TA3CCTL0 = CCIE; TA3CTL |= MC__UP | TACLR; while (!sleep_done) { |