summaryrefslogtreecommitdiff
path: root/src/driver/resistive_load.cc
diff options
context:
space:
mode:
authorLennart <lekaiser@uos.de>2020-07-17 12:39:15 +0200
committerLennart <lekaiser@uos.de>2020-07-17 12:39:15 +0200
commit5c4045862bf55be0b8dc755ac3d5c5bd24b5fedf (patch)
treec104a31c95b5a6498f9c195da4cdc406286d9768 /src/driver/resistive_load.cc
parentdd188370afa340d3b717b8747890bc304c0e3346 (diff)
parent52f23fad43b47c6cebb38fa387c39d0e27a12797 (diff)
Merge branch 'master' into state-duration-timers
Diffstat (limited to 'src/driver/resistive_load.cc')
-rw-r--r--src/driver/resistive_load.cc120
1 files changed, 120 insertions, 0 deletions
diff --git a/src/driver/resistive_load.cc b/src/driver/resistive_load.cc
new file mode 100644
index 0000000..419c6c0
--- /dev/null
+++ b/src/driver/resistive_load.cc
@@ -0,0 +1,120 @@
+#include "driver/resistive_load.h"
+#include "driver/gpio.h"
+#include "arch.h"
+
+#ifndef RESISTIVE_LOAD_PIN1
+#error RESISTIVE_LOAD_PIN1 must be set
+#endif
+
+#ifndef RESISTIVE_LOAD_PIN2
+#error RESISTIVE_LOAD_PIN2 must be set
+#endif
+
+#ifndef RESISTIVE_LOAD_PIN3
+#error RESISTIVE_LOAD_PIN3 must be set
+#endif
+
+#ifndef RESISTIVE_LOAD_PIN4
+#error RESISTIVE_LOAD_PIN4 must be set
+#endif
+
+void ResistiveLoad::setup()
+{
+ gpio.output(RESISTIVE_LOAD_PIN1, 0);
+ gpio.output(RESISTIVE_LOAD_PIN2, 0);
+ gpio.output(RESISTIVE_LOAD_PIN3, 0);
+ gpio.output(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::switchToNone()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 0);
+ gpio.write(RESISTIVE_LOAD_PIN2, 0);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::switchTo750()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 1);
+ gpio.write(RESISTIVE_LOAD_PIN2, 1);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::switchTo1K0()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 1);
+ gpio.write(RESISTIVE_LOAD_PIN2, 0);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::switchTo2K4()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 0);
+ gpio.write(RESISTIVE_LOAD_PIN2, 1);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 1);
+}
+
+void ResistiveLoad::switchTo3K3()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 0);
+ gpio.write(RESISTIVE_LOAD_PIN2, 1);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::switchTo10K()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 0);
+ gpio.write(RESISTIVE_LOAD_PIN2, 0);
+ gpio.write(RESISTIVE_LOAD_PIN3, 0);
+ gpio.write(RESISTIVE_LOAD_PIN4, 1);
+}
+
+void ResistiveLoad::switchTo47K()
+{
+ gpio.write(RESISTIVE_LOAD_PIN1, 0);
+ gpio.write(RESISTIVE_LOAD_PIN2, 0);
+ gpio.write(RESISTIVE_LOAD_PIN3, 1);
+ gpio.write(RESISTIVE_LOAD_PIN4, 0);
+}
+
+void ResistiveLoad::nop1K0(unsigned int duration_ms)
+{
+ switchTo1K0();
+ arch.delay_ms(duration_ms);
+ switchToNone();
+}
+
+void ResistiveLoad::nop2K4(unsigned int duration_ms)
+{
+ switchTo2K4();
+ arch.delay_ms(duration_ms);
+ switchToNone();
+}
+
+void ResistiveLoad::nop3K3(unsigned int duration_ms)
+{
+ switchTo3K3();
+ arch.delay_ms(duration_ms);
+ switchToNone();
+}
+
+void ResistiveLoad::nop10K(unsigned int duration_ms)
+{
+ switchTo10K();
+ arch.delay_ms(duration_ms);
+ switchToNone();
+}
+
+void ResistiveLoad::nop47K(unsigned int duration_ms)
+{
+ switchTo47K();
+ arch.delay_ms(duration_ms);
+ switchToNone();
+}
+
+ResistiveLoad resistiveLoad;