diff options
author | Birte Kristina Friesel <birte.friesel@uos.de> | 2024-02-08 13:46:48 +0100 |
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committer | Birte Kristina Friesel <birte.friesel@uos.de> | 2024-02-08 13:46:48 +0100 |
commit | ec871ef8ae230bcb779c8535c3c4526817fd5d93 (patch) | |
tree | 558e731639f7ece070d7abd14c3c82afa11f9647 /src | |
parent | 18db600341bcf1c21e4282515d458b898639f349 (diff) |
Add preliminary STM32F746ZG-Nucleo support
Diffstat (limited to 'src')
-rw-r--r-- | src/arch/stm32f746zg-nucleo/Kconfig | 10 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/Makefile.inc | 140 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/arch.cc | 122 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/driver/counter.cc | 19 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/driver/gpio.cc | 8 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/driver/stdout.cc | 36 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/driver/uptime.cc | 8 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/prompt | 1 | ||||
-rw-r--r-- | src/arch/stm32f746zg-nucleo/stm32f746zg.ld | 13 |
9 files changed, 357 insertions, 0 deletions
diff --git a/src/arch/stm32f746zg-nucleo/Kconfig b/src/arch/stm32f746zg-nucleo/Kconfig new file mode 100644 index 0000000..1b634a7 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/Kconfig @@ -0,0 +1,10 @@ +# Copyright 2024 Birte Kristina Friesel +# +# SPDX-License-Identifier: CC0-1.0 +config arch_stm32f746zg_nucleo_driver_counter +bool "Cycle Counter" +select meta_driver_counter + +config arch_stm32f746zg_nucleo_driver_uptime +bool "Uptime Counter" +select meta_driver_uptime diff --git a/src/arch/stm32f746zg-nucleo/Makefile.inc b/src/arch/stm32f746zg-nucleo/Makefile.inc new file mode 100644 index 0000000..b6e1944 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/Makefile.inc @@ -0,0 +1,140 @@ +# vim:ft=make +# +# Copyright 2024 Birte Kristina Friesel +# +# SPDX-License-Identifier: BSD-2-Clause + +SERIAL_PORT ?= ttyACM0 + +cpu_freq ?= 216000000 + +INCLUDES += -Iext/libopencm3/include + +COMMON_FLAGS += --static -nostartfiles -g3 -Os -fno-common +COMMON_FLAGS += -ffunction-sections -fdata-sections +COMMON_FLAGS += -mcpu=cortex-m7 -mthumb -mfloat-abi=hard -mfpu=fpv5-sp-d16 -DSTM32F7 + +CC = arm-none-eabi-gcc +CXX = arm-none-eabi-g++ +OBJCOPY = arm-none-eabi-objcopy +OBJDUMP = arm-none-eabi-objdump +SIZE = arm-none-eabi-size + +ARCH_SHORTNAME = stm32f7 + +CXX_TARGETS += src/arch/stm32f746zg-nucleo/arch.cc + +ifdef CONFIG_aspectc + CXX = ag++ -r build/repo.acp -v 0 --c_compiler arm-none-eabi-g++ -p . --Xcompiler +endif + +CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/gpio.cc +CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/stdout.cc + +# Commandline + +ifneq ($(findstring counter,${arch_drivers}), ) + CONFIG_arch_stm32f746zg_nucleo_driver_counter = y +endif + +#ifneq ($(findstring timer,${arch_drivers}), ) +# CONFIG_arch_stm32f746zg_nucleo_driver_timer = y +#endif + +ifeq (${timer_s}, 1) + CONFIG_arch_stm32f746zg_nucleo_driver_uptime = y +endif + +# Kconfig + +ifdef CONFIG_arch_stm32f746zg_nucleo_driver_counter + CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/counter.cc +endif + +#ifdef CONFIG_arch_stm32f746zg_nucleo_driver_i2c +# CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/i2c.cc +#endif + +#ifdef CONFIG_arch_stm32f746zg_nucleo_driver_timer +# CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/timer.cc +#endif + +ifdef CONFIG_arch_stm32f746zg_nucleo_driver_uptime + COMMON_FLAGS += -DTIMER_S + CXX_TARGETS += src/arch/stm32f746zg-nucleo/driver/uptime.cc +endif + + +ifneq (${cpu_freq}, ) + COMMON_FLAGS += -DF_CPU=${cpu_freq}UL +else + COMMON_FLAGS += -DF_CPU=216000000UL +endif + + +OBJECTS = ${CXX_TARGETS:.cc=.o} ${C_TARGETS:.c=.o} ${ASM_TARGETS:.S=.o} + +%.o : %.cc | include/config.h + ${QUIET}${CXX} ${INCLUDES} ${COMMON_FLAGS} ${CXXFLAGS} -c -o $@ ${@:.o=.cc} + +%.o : %.c | include/config.h + ${QUIET}${CC} ${INCLUDES} ${COMMON_FLAGS} ${CFLAGS} -c -o $@ ${@:.o=.c} + +%.o : %.S | include/config.h + ${QUIET}${CC} ${INCLUDES} ${COMMON_FLAGS} -c -o $@ ${@:.o=.S} + +%.o : %.s | include/config.h + ${QUIET}${CC} ${INCLUDES} ${COMMON_FLAGS} -c -o $@ ${@:.o=.S} + +build/system.elf: ${OBJECTS} ext/libopencm3/lib/libopencm3_stm32f7.a + ${QUIET}mkdir -p build + ${QUIET}${CXX} ${INCLUDES} ${COMMON_FLAGS} ${CXXFLAGS} \ + -Lext/libopencm3/lib -Wl,--gc-sections \ + -Wl,--start-group -lc -lgcc -lnosys -Wl,--end-group \ + -T src/arch/stm32f746zg-nucleo/stm32f746zg.ld \ + ${OBJECTS} -lopencm3_stm32f7 \ + -o $@ + ${QUIET}${SIZE} build/system.elf | tail -n1 | awk '{ print " ROM: " ($$1+$$2) " (" int(($$1+$$2)*100/1048576) "%) RAM: " ($$2 + $$3) " (" int(($$2+$$3)*100/327680) "%)" }' + +ext/libopencm3/Makefile: + git submodule update --init + +ext/libopencm3/lib/libopencm3_stm32f7.a: ext/libopencm3/Makefile + ${MAKE} -C ext/libopencm3 + +program: build/system.elf + openocd -c 'source [find interface/stlink.cfg]' \ + -c 'transport select hla_swd' -c 'source [find target/stm32f7x.cfg]' \ + -c 'reset_config srst_only' -c '$$_TARGETNAME configure -rtos auto' \ + -c 'reset_config connect_assert_srst' -c init -c targets \ + -c 'reset halt' -c 'flash write_image erase "build/system.elf" 0' \ + -c 'verify_image "build/system.elf" 0' -c 'reset run' -c 'shutdown' + +arch_clean: + ${QUIET}rm -f ${OBJECTS} + +cat: + ${QUIET}script/cat.py /dev/${SERIAL_PORT} 115200 ${cpu_freq} 65536 + +monitor: + ${QUIET}screen /dev/${SERIAL_PORT} 115200 + +arch_help: + @echo "stm32f746zg-nucleo specific flags:" + @echo " cpu_freq = ${cpu_freq} (desired CPU frequency in Hz)" + @echo " supported frequencies: 84 / 168 / 180 MHz" + +arch_info: + @echo "CPU Freq: ${cpu_freq} Hz" + @echo "Timer Freq: ${timer_freq} Hz -> $(shell src/arch/stm32f746zg-nucleo/model.py f_timer "${cpu_freq}" "${timer_freq}")" + @echo "I2C Freq: ${i2c_freq} Hz" + @echo "Counter Overflow: 4294967296/255" + @echo "Monitor: /dev/${SERIAL_PORT} 115200" + +attributes: build/system.elf + ${QUIET}script/size.py ${SIZE} text,data data,bss + +nfpvalues: build/system.elf + ${QUIET}script/nfpvalues.py ${SIZE} text,data data,bss + +.PHONY: arch_clean arch_help arch_info attributes cat monitor program diff --git a/src/arch/stm32f746zg-nucleo/arch.cc b/src/arch/stm32f746zg-nucleo/arch.cc new file mode 100644 index 0000000..4adb883 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/arch.cc @@ -0,0 +1,122 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include <libopencm3/cm3/nvic.h> +#include <libopencm3/stm32/rcc.h> +#include <libopencm3/stm32/gpio.h> +#include <libopencm3/stm32/timer.h> +#include "arch.h" + +#ifdef __acweaving +#define __delay_cycles(x) +#endif + +void Arch::setup(void) +{ +#if F_CPU == 216000000UL + rcc_clock_setup_hsi(&rcc_3v3[RCC_CLOCK_3V3_216MHZ]); +#else +#error Unsupported F_CPU +#endif + + // counter + rcc_periph_clock_enable(RCC_TIM2); + nvic_enable_irq(NVIC_TIM2_IRQ); + rcc_periph_reset_pulse(RST_TIM2); + timer_set_mode(TIM2, TIM_CR1_CKD_CK_INT, + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + timer_set_prescaler(TIM2, 0); + timer_disable_preload(TIM2); + timer_continuous_mode(TIM2); + timer_set_period(TIM2, 4294967295); + timer_enable_irq(TIM2, TIM_DIER_UIE); + +#ifdef CONFIG_loop + rcc_periph_clock_enable(RCC_TIM3); + nvic_enable_irq(NVIC_TIM3_IRQ); + rcc_periph_reset_pulse(RST_TIM3); + + + timer_set_mode(TIM3, TIM_CR1_CKD_CK_INT, + TIM_CR1_CMS_EDGE, TIM_CR1_DIR_UP); + // 10 kHz timer frequency + timer_set_prescaler(TIM3, ((rcc_apb1_frequency * 2) / 10000)); + + timer_continuous_mode(TIM3); // ? + + timer_set_period(TIM3, 10000); + + timer_enable_counter(TIM3); + timer_enable_irq(TIM3, TIM_DIER_UIE); +#endif +} + +#ifdef CONFIG_wakeup +extern void wakeup(); +#endif + +#if defined(CONFIG_loop) +extern void loop(); +volatile char run_loop = 0; +#endif + +// for 216 MHz(?) +void Arch::delay_us(unsigned int const us) +{ + volatile int x = us * 145; + while (x--) { + __asm("nop"); + } +} +void Arch::delay_ms(unsigned int const ms) +{ + for (unsigned int i = 0; i < ms; i++) { + volatile int x = 143990; + while (x--) { + __asm("nop"); + } + } +} + +void Arch::idle_loop(void) +{ + while (1) { + //pwr_set_standby_mode(); + __asm__("wfi"); +#ifdef CONFIG_loop + if (run_loop) { + loop(); + run_loop = 0; + } +#endif + } +} + +void Arch::idle(void) +{ +#ifdef CONFIG_wakeup + wakeup(); +#endif +} + +Arch arch; + +#if defined(CONFIG_loop) || defined(TIMER_S) + +#include "driver/uptime.h" + +void tim3_isr(void) +{ + if (timer_get_flag(TIM3, TIM_SR_UIF)) { + timer_clear_flag(TIM3, TIM_SR_UIF); +#ifdef CONFIG_loop + run_loop = 1; +#endif +#ifdef TIMER_S + uptime.tick_s(); +#endif + } +} +#endif diff --git a/src/arch/stm32f746zg-nucleo/driver/counter.cc b/src/arch/stm32f746zg-nucleo/driver/counter.cc new file mode 100644 index 0000000..5f007f1 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/driver/counter.cc @@ -0,0 +1,19 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include "arch.h" +#include "driver/counter.h" + +Counter counter; + +void tim2_isr(void) +{ + if (timer_get_flag(TIM2, TIM_SR_UIF)) { + timer_clear_flag(TIM2, TIM_SR_UIF); + if (counter.overflow < 4294967295) { + counter.overflow++; + } + } +} diff --git a/src/arch/stm32f746zg-nucleo/driver/gpio.cc b/src/arch/stm32f746zg-nucleo/driver/gpio.cc new file mode 100644 index 0000000..82a9fd0 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/driver/gpio.cc @@ -0,0 +1,8 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include "driver/gpio.h" + +GPIO gpio; diff --git a/src/arch/stm32f746zg-nucleo/driver/stdout.cc b/src/arch/stm32f746zg-nucleo/driver/stdout.cc new file mode 100644 index 0000000..9a5bdfb --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/driver/stdout.cc @@ -0,0 +1,36 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include "driver/stdout.h" + +#include <libopencm3/stm32/rcc.h> +#include <libopencm3/stm32/gpio.h> +#include <libopencm3/stm32/usart.h> + +void StandardOutput::setup() +{ + rcc_periph_clock_enable(RCC_USART3); + gpio_mode_setup(GPIOD, GPIO_MODE_AF, GPIO_PUPD_NONE, GPIO8); + gpio_set_af(GPIOD, GPIO_AF7, GPIO8); + + usart_set_baudrate(USART3, 115200); + usart_set_databits(USART3, 8); + usart_set_stopbits(USART3, USART_STOPBITS_1); + usart_set_mode(USART3, USART_MODE_TX); + usart_set_parity(USART3, USART_PARITY_NONE); + usart_set_flow_control(USART3, USART_FLOWCONTROL_NONE); + + usart_enable(USART3); +} + +void StandardOutput::put(char c) +{ + usart_send_blocking(USART3, c); + if (c == '\n') { + put('\r'); + } +} + +StandardOutput kout; diff --git a/src/arch/stm32f746zg-nucleo/driver/uptime.cc b/src/arch/stm32f746zg-nucleo/driver/uptime.cc new file mode 100644 index 0000000..8ddb57a --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/driver/uptime.cc @@ -0,0 +1,8 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: BSD-2-Clause + */ +#include "driver/uptime.h" + +Uptime uptime; diff --git a/src/arch/stm32f746zg-nucleo/prompt b/src/arch/stm32f746zg-nucleo/prompt new file mode 100644 index 0000000..168f0e0 --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/prompt @@ -0,0 +1 @@ +STM32F746ZG Nucleo diff --git a/src/arch/stm32f746zg-nucleo/stm32f746zg.ld b/src/arch/stm32f746zg-nucleo/stm32f746zg.ld new file mode 100644 index 0000000..7680d9f --- /dev/null +++ b/src/arch/stm32f746zg-nucleo/stm32f746zg.ld @@ -0,0 +1,13 @@ +/* + * Copyright 2024 Birte Kristina Friesel + * + * SPDX-License-Identifier: CC0-1.0 + */ + +MEMORY +{ + rom (rx) : ORIGIN = 0x08000000, LENGTH = 1024K + ram (rwx) : ORIGIN = 0x20000000, LENGTH = 320K +} + +INCLUDE ext/libopencm3/lib/cortex-m-generic.ld |