summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
Diffstat
-rw-r--r--include/arch/lora32u4ii/arch_types.h7
-rw-r--r--include/arch/lora32u4ii/driver/gpio.h196
-rw-r--r--include/arch/lora32u4ii/driver/stdout.h19
-rw-r--r--include/arch/lora32u4ii/driver/uptime.h27
-rw-r--r--src/arch/lora32u4ii/Makefile.inc121
-rw-r--r--src/arch/lora32u4ii/arch.cc123
-rw-r--r--src/arch/lora32u4ii/driver/gpio.cc25
-rw-r--r--src/arch/lora32u4ii/driver/stdout.cc36
-rw-r--r--src/arch/lora32u4ii/driver/uptime.cc3
9 files changed, 557 insertions, 0 deletions
diff --git a/include/arch/lora32u4ii/arch_types.h b/include/arch/lora32u4ii/arch_types.h
new file mode 100644
index 0000000..5f4e729
--- /dev/null
+++ b/include/arch/lora32u4ii/arch_types.h
@@ -0,0 +1,7 @@
+#ifndef ARCH_TYPES_H
+#define ARCH_TYPES_H
+
+typedef uint8_t native_uint_t;
+typedef int8_t native_int_t;
+
+#endif
diff --git a/include/arch/lora32u4ii/driver/gpio.h b/include/arch/lora32u4ii/driver/gpio.h
new file mode 100644
index 0000000..ba044d0
--- /dev/null
+++ b/include/arch/lora32u4ii/driver/gpio.h
@@ -0,0 +1,196 @@
+#ifndef GPIO_H
+#define GPIO_H
+
+#include <avr/io.h>
+
+class GPIO {
+ private:
+ GPIO(const GPIO &copy);
+
+ public:
+ GPIO () {}
+
+ enum Pin : unsigned char {
+ pb0 = 8,
+ pb1 = 9,
+ pb2 = 10,
+ pb3 = 11,
+ pb4 = 12,
+ pb5 = 13,
+ pb6 = 14,
+ pb7 = 15,
+ pc6 = 22,
+ pc7 = 23,
+ pd0 = 24,
+ pd1 = 25,
+ pd2 = 26,
+ pd3 = 27,
+ pd4 = 28,
+ pd5 = 29,
+ pd6 = 30,
+ pd7 = 31,
+ pe2 = 34,
+ pe6 = 38,
+ pf0 = 40,
+ pf1 = 41,
+ pf4 = 44,
+ pf5 = 45,
+ pf6 = 46,
+ pf7 = 47
+ };
+
+ inline void setup() {
+ DDRB = _BV(PB5);
+ }
+ inline volatile uint8_t * pinToPort(uint8_t pin) {
+ if (pin <= pb7) {
+ return &PORTB;
+ }
+ if (pin <= pc6) {
+ return &PORTC;
+ }
+ return &PORTD;
+ }
+ inline unsigned char pinToBitmask(uint8_t pin) {
+ return _BV(pin % 8);
+ }
+#pragma GCC diagnostic ignored "-Wunused-parameter"
+ inline void led_on(unsigned char id) {
+ PORTC |= _BV(PC7);
+ }
+ inline void led_off(unsigned char id) {
+ PORTC &= ~_BV(PC7);
+ }
+ inline void led_toggle(unsigned char id) {
+ PINC = _BV(PC7);
+ }
+ inline void input(unsigned char const pin) {
+ if (pin < 8) {
+ } else if (pin < 16) {
+ DDRB &= ~_BV(pin - 8);
+ } else if (pin < 24) {
+ DDRC &= ~_BV(pin - 16);
+ } else if (pin < 32) {
+ DDRD &= ~_BV(pin - 24);
+ } else if (pin < 40) {
+ DDRE &= ~_BV(pin - 32);
+ } else if (pin < 48) {
+ DDRF &= ~_BV(pin - 40);
+ }
+ }
+#pragma GCC diagnostic pop
+ inline void input(unsigned char const pin, unsigned char const pull) {
+ if (pin < 8) {
+ } else if (pin < 16) {
+ DDRB &= ~_BV(pin - 8);
+ PORTB |= _BV(pin - 8);
+ } else if (pin < 24) {
+ DDRC &= ~_BV(pin - 16);
+ PORTC |= _BV(pin - 16);
+ } else if (pin < 32) {
+ DDRD &= ~_BV(pin - 24);
+ PORTD |= _BV(pin - 24);
+ } else if (pin < 40) {
+ DDRE &= ~_BV(pin - 32);
+ PORTE |= _BV(pin - 32);
+ } else if (pin < 48) {
+ DDRF &= ~_BV(pin - 40);
+ PORTF |= _BV(pin - 40);
+ }
+ }
+ inline void output(unsigned char const pin) {
+ if (pin < 8) {
+ } else if (pin < 16) {
+ DDRB |= _BV(pin - 8);
+ } else if (pin < 24) {
+ DDRC |= _BV(pin - 16);
+ } else if (pin < 32) {
+ DDRD |= _BV(pin - 24);
+ } else if (pin < 40) {
+ DDRE |= _BV(pin - 32);
+ } else if (pin < 48) {
+ DDRF |= _BV(pin - 40);
+ }
+ }
+ inline void output(unsigned char const pin, unsigned char const value) {
+ if (pin < 8) {
+ } else if (pin < 16) {
+ PORTB = value ? (PORTB | _BV(pin - 8)) : (PORTB & ~_BV(pin - 8));
+ DDRB |= _BV(pin - 8);
+ } else if (pin < 24) {
+ PORTC = value ? (PORTC | _BV(pin - 16)) : (PORTC & ~_BV(pin - 16));
+ DDRC |= _BV(pin - 16);
+ } else if (pin < 32) {
+ PORTD = value ? (PORTD | _BV(pin - 24)) : (PORTD & ~_BV(pin - 24));
+ DDRD |= _BV(pin - 24);
+ } else if (pin < 40) {
+ PORTE = value ? (PORTE | _BV(pin - 32)) : (PORTE & ~_BV(pin - 32));
+ DDRE |= _BV(pin - 32);
+ } else if (pin < 48) {
+ PORTF = value ? (PORTF | _BV(pin - 40)) : (PORTF & ~_BV(pin - 40));
+ DDRF |= _BV(pin - 40);
+ }
+ }
+ inline unsigned char read(unsigned char const pin) {
+ if (pin < 8) {
+ }
+ if (pin < 16) {
+ return (PINB & _BV(pin - 8));
+ }
+ if (pin < 24) {
+ return (PINC & _BV(pin - 16));
+ }
+ if (pin < 32) {
+ return (PIND & _BV(pin - 24));
+ }
+ if (pin < 40) {
+ return (PINE & _BV(pin - 32));
+ }
+ if (pin < 48) {
+ return (PINF & _BV(pin - 40));
+ }
+ return 0;
+ }
+ inline void write(unsigned char const pin, unsigned char value) {
+ if (pin < 8) {
+ } else if (pin < 16) {
+ if (value) {
+ PORTB |= _BV(pin - 8);
+ } else {
+ PORTB &= ~_BV(pin - 8);
+ }
+ } else if (pin < 24) {
+ if (value) {
+ PORTC |= _BV(pin - 16);
+ } else {
+ PORTC &= ~_BV(pin - 16);
+ }
+ } else if (pin < 32) {
+ if (value) {
+ PORTD |= _BV(pin - 24);
+ } else {
+ PORTD &= ~_BV(pin - 24);
+ }
+ } else if (pin < 40) {
+ if (value) {
+ PORTE |= _BV(pin - 32);
+ } else {
+ PORTE &= ~_BV(pin - 32);
+ }
+ } else if (pin < 48) {
+ if (value) {
+ PORTF |= _BV(pin - 40);
+ } else {
+ PORTF &= ~_BV(pin - 40);
+ }
+ }
+ }
+ inline void enable_int(unsigned char const pin) {
+ }
+ inline void disable_int(unsigned char const pin) {
+ }
+};
+
+extern GPIO gpio;
+
+#endif
diff --git a/include/arch/lora32u4ii/driver/stdout.h b/include/arch/lora32u4ii/driver/stdout.h
new file mode 100644
index 0000000..2eb669d
--- /dev/null
+++ b/include/arch/lora32u4ii/driver/stdout.h
@@ -0,0 +1,19 @@
+#ifndef STANDARDOUTPUT_H
+#define STANDARDOUTPUT_H
+
+#include "object/outputstream.h"
+
+class StandardOutput : public OutputStream {
+ private:
+ StandardOutput(const StandardOutput &copy);
+
+ public:
+ StandardOutput () {}
+ void setup();
+
+ virtual void put(char c) override;
+};
+
+extern StandardOutput kout;
+
+#endif
diff --git a/include/arch/lora32u4ii/driver/uptime.h b/include/arch/lora32u4ii/driver/uptime.h
new file mode 100644
index 0000000..db2c039
--- /dev/null
+++ b/include/arch/lora32u4ii/driver/uptime.h
@@ -0,0 +1,27 @@
+#ifndef UPTIME_H
+#define UPTIME_H
+
+#include <avr/io.h>
+
+class Uptime {
+ private:
+ Uptime(const Uptime &copy);
+#ifdef TIMER_S
+ uint8_t seconds;
+#endif
+
+ public:
+#ifdef TIMER_S
+ Uptime () : seconds(0) {}
+#else
+ Uptime () {}
+#endif
+#ifdef TIMER_S
+ inline uint8_t get_s() { return seconds; }
+ inline void tick_s() { seconds++; }
+#endif
+};
+
+extern Uptime uptime;
+
+#endif
diff --git a/src/arch/lora32u4ii/Makefile.inc b/src/arch/lora32u4ii/Makefile.inc
new file mode 100644
index 0000000..06ac1f9
--- /dev/null
+++ b/src/arch/lora32u4ii/Makefile.inc
@@ -0,0 +1,121 @@
+# vim:ft=make
+#
+# Copyright 2021 Daniel Friesel
+#
+# SPDX-License-Identifier: BSD-2-Clause
+
+MCU = atmega32u4
+SERIAL_PORT ?= /dev/ttyUSB0
+
+ifdef CONFIG_arch_lora32u4ii_cpufreq
+ cpu_freq = ${CONFIG_arch_lora32u4ii_cpufreq}
+endif
+
+cpu_freq ?= 8000000
+
+COMMON_FLAGS += -Werror=overflow
+COMMON_FLAGS += -mmcu=${MCU} -DMULTIPASS_ARCH_lora32u4ii
+COMMON_FLAGS += -DF_CPU=${cpu_freq}UL
+COMMON_FLAGS += -DMULTIPASS_ARCH_HAS_I2C
+
+ifeq (${stack_usage}, )
+ COMMON_FLAGS += -flto
+endif
+
+CC = avr-gcc
+CXX = avr-g++
+NM = avr-nm
+OBJCOPY = avr-objcopy
+OBJDUMP = avr-objdump
+
+ARCH_SHORTNAME = avr
+
+ifeq (${aspectc}, 1)
+ CXX = ag++ -r build/repo.acp -v 0 --c_compiler avr-g++ -p . --Xcompiler
+endif
+
+CXX_TARGETS += src/arch/lora32u4ii/arch.cc
+CXX_TARGETS += src/arch/lora32u4ii/driver/gpio.cc
+CXX_TARGETS += src/arch/lora32u4ii/driver/stdout.cc
+
+# Command-line driver selection
+
+ifeq (${timer_s}, 1)
+ CONFIG_arch_lora32u4ii_driver_uptime = y
+endif
+
+# Kconfig driver selection
+
+ifdef CONFIG_arch_lora32u4ii_driver_uptime
+ COMMON_FLAGS += -DTIMER_S
+ CXX_TARGETS += src/arch/lora32u4ii/driver/uptime.cc
+endif
+
+ifeq (${cpu_freq}, 8000000)
+ uart_baud = 19200
+else ifeq (${cpu_freq}, 4000000)
+ uart_baud = 19200
+else ifeq (${cpu_freq}, 2000000)
+ uart_baud = 19200
+else ifeq (${cpu_freq}, 1000000)
+ uart_baud = 9600
+else ifeq (${cpu_freq}, 500000)
+ uart_baud = 4800
+else ifeq (${cpu_freq}, 250000)
+ uart_baud = 2400
+else ifeq (${cpu_freq}, 125000)
+ uart_baud = 1200
+else ifeq (${cpu_freq}, 62500)
+ uart_baud = 300
+else
+ uart_baud = 9600
+endif
+
+COMMON_FLAGS += -DBAUD=${uart_baud}UL
+
+OBJECTS = ${CXX_TARGETS:.cc=.o} ${C_TARGETS:.c=.o}
+
+%.o : %.cc | include/config.h
+ ${QUIET}${CXX} ${INCLUDES} ${COMMON_FLAGS} ${CXXFLAGS} -c -o $@ ${@:.o=.cc}
+
+%.o : %.c | include/config.h
+ ${QUIET}${CC} ${INCLUDES} ${COMMON_FLAGS} ${CFLAGS} -c -o $@ ${@:.o=.c}
+
+build/system.elf: ${OBJECTS}
+ ${QUIET}mkdir -p build
+ ${QUIET}${CXX} ${COMMON_FLAGS} ${CXXFLAGS} -Wl,--gc-sections -o $@ ${OBJECTS}
+ ${QUIET}avr-size --format=avr --mcu=${MCU} $@
+ ${QUIET}test $$(avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Program | grep -o '[0-9.]*%' | cut -d . -f 1) -lt 100
+
+build/system.hex: build/system.elf
+ ${QUIET}${OBJCOPY} -O ihex ${@:.hex=.elf} $@
+
+program: build/system.hex
+ ${QUIET}avrdude -p ${MCU} -c usbasp -U flash:w:build/system.hex
+
+arch_clean:
+ ${QUIET}rm -f ${OBJECTS} build/system.hex
+
+cat:
+ ${QUIET}script/cat.py ${SERIAL_PORT} ${uart_baud} ${cpu_freq} 65536
+
+monitor:
+ ${QUIET}screen ${SERIAL_PORT} ${uart_baud}
+
+size: build/system.elf
+ ${QUIET}avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Program | perl -nE 'if (m{(\d+) bytes \(([0-9.]+%)}) { print("$$1;$$2;") }'
+ ${QUIET}avr-size --format=avr --mcu=${MCU} build/system.elf | fgrep Data | perl -nE 'if (m{(\d+) bytes \(([0-9.]+%)}) { print("$$1;$$2;") }'
+ ${QUIET}echo
+
+arch_help:
+ @echo "lora32u4ii specific flags:"
+ @echo " SERIAL_PORT = ${SERIAL_PORT}"
+
+arch_info:
+ @echo "CPU Freq: ${cpu_freq} Hz"
+ @echo "Timer Freq: ${timer_freq} Hz"
+ @echo "I2C Freq: ${i2c_freq} Hz"
+ @echo "Counter Overflow: 65536/255"
+ @echo "Monitor: ${SERIAL_PORT} ${uart_baud}"
+
+.PHONY: arch_clean arch_help arch_info monitor program
diff --git a/src/arch/lora32u4ii/arch.cc b/src/arch/lora32u4ii/arch.cc
new file mode 100644
index 0000000..aa5c288
--- /dev/null
+++ b/src/arch/lora32u4ii/arch.cc
@@ -0,0 +1,123 @@
+#include "arch.h"
+#include <avr/io.h>
+#include <avr/interrupt.h>
+#include <avr/wdt.h>
+#include <util/delay.h>
+
+void Arch::setup(void)
+{
+ wdt_disable();
+
+#if F_CPU == 8000000UL
+ /* default */
+#elif F_CPU == 4000000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS0);
+#elif F_CPU == 2000000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS1);
+#elif F_CPU == 1000000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS1) | _BV(CLKPS0);
+#elif F_CPU == 500000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS2);
+#elif F_CPU == 250000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS2) | _BV(CLKPS0);
+#elif F_CPU == 125000UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS2) | _BV(CLKPS1);
+#elif F_CPU == 62500UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS2) | _BV(CLKPS1) | _BV(CLKPS0);
+#elif F_CPU == 32150UL
+ CLKPR = _BV(CLKPCE);
+ CLKPR = _BV(CLKPS3);
+#else
+#error Unsupported F_CPU
+#endif
+
+#if defined(CONFIG_loop) || defined(TIMER_S)
+ TCCR1A = 0;
+ TCCR1B = _BV(WGM12) | _BV(CS12) | _BV(CS10); // CTC, /1024
+ OCR1A = F_CPU / 1024;
+ TIMSK1 = _BV(OCIE1A);
+#endif
+
+ sei();
+}
+
+#ifdef CONFIG_wakeup
+void wakeup();
+#endif
+
+#if defined(CONFIG_loop) || defined(TIMER_S)
+
+#include "driver/uptime.h"
+
+#endif
+
+#if defined(CONFIG_loop)
+extern void loop();
+volatile char run_loop = 0;
+#endif
+
+void Arch::idle_loop(void)
+{
+ while (1) {
+ SMCR = _BV(SE);
+ asm("sleep");
+ SMCR = 0;
+ asm("wdr");
+#ifdef CONFIG_loop
+ if (run_loop) {
+ loop();
+ run_loop = 0;
+ }
+#endif
+#ifdef CONFIG_wakeup
+ wakeup();
+#endif
+ }
+}
+
+void Arch::idle(void)
+{
+ SMCR = _BV(SE);
+ asm("sleep");
+ SMCR = 0;
+ asm("wdr");
+}
+
+void Arch::delay_us(unsigned int const us)
+{
+ for (unsigned int i = 0; i < us; i++) {
+ _delay_us(1);
+ }
+}
+
+void Arch::delay_ms(unsigned int const ms)
+{
+ for (unsigned int i = 0; i < ms; i++) {
+ _delay_ms(1);
+ }
+}
+
+Arch arch;
+
+#if defined(CONFIG_loop) || defined(TIMER_S)
+
+#ifndef __acweaving
+ISR(TIMER1_COMPA_vect)
+{
+#ifdef CONFIG_loop
+ run_loop = 1;
+#endif
+#ifdef TIMER_S
+ uptime.tick_s();
+#endif
+}
+#endif
+
+#endif
diff --git a/src/arch/lora32u4ii/driver/gpio.cc b/src/arch/lora32u4ii/driver/gpio.cc
new file mode 100644
index 0000000..2e3eb1d
--- /dev/null
+++ b/src/arch/lora32u4ii/driver/gpio.cc
@@ -0,0 +1,25 @@
+#include "driver/gpio.h"
+#include <avr/io.h>
+#include <avr/interrupt.h>
+
+GPIO gpio;
+
+#ifndef __acweaving
+/*
+ISR(PCINT0_vect)
+{
+}
+*/
+
+/*
+ISR(PCINT1_vect)
+{
+}
+*/
+
+/*
+ISR(PCINT2_vect)
+{
+}
+*/
+#endif
diff --git a/src/arch/lora32u4ii/driver/stdout.cc b/src/arch/lora32u4ii/driver/stdout.cc
new file mode 100644
index 0000000..afe6ff8
--- /dev/null
+++ b/src/arch/lora32u4ii/driver/stdout.cc
@@ -0,0 +1,36 @@
+#include "driver/stdout.h"
+#include <avr/io.h>
+#include <avr/interrupt.h>
+
+#ifndef BAUD
+#define BAUD 9600UL
+#endif
+
+#include <util/setbaud.h>
+
+void StandardOutput::setup()
+{
+ UBRR1H = UBRRH_VALUE;
+ UBRR1L = UBRRL_VALUE;
+
+#if USE_2X
+ UCSR1A |= _BV(U2X1);
+#else
+ UCSR1A &= ~_BV(U2X1);
+#endif
+
+ UCSR1B |= _BV(RXEN1) | _BV(TXEN1);
+ UCSR1C = _BV(UCSZ11) | _BV(UCSZ10); // async UART, 8N1
+ //UCSR1D = 0;
+}
+
+void StandardOutput::put(char c)
+{
+ while (!(UCSR1A & _BV(UDRE1)));
+ UDR1 = c;
+ if (c == '\n') {
+ put('\r');
+ }
+}
+
+StandardOutput kout;
diff --git a/src/arch/lora32u4ii/driver/uptime.cc b/src/arch/lora32u4ii/driver/uptime.cc
new file mode 100644
index 0000000..388edb6
--- /dev/null
+++ b/src/arch/lora32u4ii/driver/uptime.cc
@@ -0,0 +1,3 @@
+#include "driver/uptime.h"
+
+Uptime uptime;
generated by cgit v1.2.3 (git 2.39.1) at 2024-07-04 04:40:32 +0000