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-rw-r--r--src/arch/stm32f446re-nucleo/Makefile.inc6
-rw-r--r--src/arch/stm32f446re-nucleo/arch.cc11
2 files changed, 16 insertions, 1 deletions
diff --git a/src/arch/stm32f446re-nucleo/Makefile.inc b/src/arch/stm32f446re-nucleo/Makefile.inc
index 8dfaecd..31d6015 100644
--- a/src/arch/stm32f446re-nucleo/Makefile.inc
+++ b/src/arch/stm32f446re-nucleo/Makefile.inc
@@ -55,6 +55,12 @@ ifneq ($(findstring counter,${arch_drivers}), )
CXX_TARGETS += src/arch/stm32f446re-nucleo/driver/counter.cc
endif
+ifneq (${cpu_freq}, )
+ COMMON_FLAGS += -DF_CPU=${cpu_freq}UL
+else
+ COMMON_FLAGS += -DF_CPU=168000000UL
+endif
+
OBJECTS = ${CXX_TARGETS:.cc=.o} ${C_TARGETS:.c=.o} ${ASM_TARGETS:.S=.o}
diff --git a/src/arch/stm32f446re-nucleo/arch.cc b/src/arch/stm32f446re-nucleo/arch.cc
index c0e2710..99e3e5f 100644
--- a/src/arch/stm32f446re-nucleo/arch.cc
+++ b/src/arch/stm32f446re-nucleo/arch.cc
@@ -10,8 +10,17 @@
void Arch::setup(void)
{
- // NUCLEO-F443RE uses 8MHz STLINK clock as input
+ // NUCLEO-F443RE uses 8MHz STLINK clock (MCO from STLINK MCU) as input
+ // (it is connected to OSC_IN -> HSE OSC)
+#if F_CPU == 180000000UL
+ rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_180MHZ]);
+#elif F_CPU == 168000000UL
rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_168MHZ]);
+#elif F_CPU == 84000000UL
+ rcc_clock_setup_pll(&rcc_hse_8mhz_3v3[RCC_CLOCK_3V3_84MHZ]);
+#else
+#error Unsupported F_CPU
+#endif
// counter
rcc_periph_clock_enable(RCC_TIM2);