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authorDaniel Friesel <derf@finalrewind.org>2013-10-10 10:00:54 +0200
committerDaniel Friesel <derf@finalrewind.org>2013-10-10 10:00:54 +0200
commit39c8b7e9b8dcb469dab73c5773fd98d4396113d8 (patch)
treec12aaed07e47f8f988091c167748d0737ebfdb06
parent90ed08ac01eaa52692e20a4c8dafda88f40333d9 (diff)
document all the variables
-rw-r--r--README.md3
-rw-r--r--main.c33
2 files changed, 32 insertions, 4 deletions
diff --git a/README.md b/README.md
index 9ea2948..2ca7530 100644
--- a/README.md
+++ b/README.md
@@ -19,7 +19,8 @@ Successfully tested on a DS2482-100 Single Channel 1-Wire Master.
Tests with a commercially available iButton reader will follow soon.
* Read ROM (0x33) with 64bit identifier
-* Search ROM (0xf0) with 64bit identifier
+* Search ROM (0xf0) with 64bit identifier -- does not yet check the master
+ direction indicator, though, so only useful on a one-device bu
## TODO
diff --git a/main.c b/main.c
index 3298b69..612fc66 100644
--- a/main.c
+++ b/main.c
@@ -56,12 +56,39 @@
#define LCNTH GPIOR2
#define LCNTL GPIOR1
-#define CNT USIDR
+/*
+ * The last complete command byte received from the master. Once this is
+ * set, we start writing data onto the bus. Reset at bus resets and once a
+ * command is done
+ */
#define LASTCMD OCR0B
+
+/*
+ * command buffer, always initialized to 0
+ */
#define BUF OCR0A
+
+/*
+ * bitmask for the current buffer (either BUF or BYTE) position.
+ * Left-shifted after each bit
+ */
#define POS OCR1A
+
+/*
+ * Position in the 8-byte address sequence
+ */
#define APOS OCR1B
+
+/*
+ * current byte in this sequence
+ */
#define BYTE EEDR
+
+/*
+ * the SEARCH ROM command consits of three steps: send a bit of our address,
+ * send the inverted bit of our address, receive the bit the master chose
+ * to proceed with. the current position in this cycle is stored here
+ */
#define SEARCHSTEP EEAR
#define CMD_READROM 0x33
@@ -188,7 +215,7 @@ ISR(INT1_vect)
}
}
else {
- if (LASTCMD == 0x33) {
+ if (LASTCMD == CMD_READROM) {
/*
* ~ADDRx & POS == 1 -> ADDRx has a 0 bit which is sent by
@@ -257,7 +284,7 @@ ISR(INT1_vect)
asm volatile ("out %0, r29" : : "M" (_SFR_IO_ADDR(BYTE)));
}
}
- else if (LASTCMD == 0xf0) {
+ else if (LASTCMD == CMD_SEARCHROM) {
if (((SEARCHSTEP == SEARCHSTEP_BIT) && (BYTE & POS))
|| ((SEARCHSTEP == SEARCHSTEP_INV) && !(BYTE & POS))) {