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authorBirte Kristina Friesel <birte.friesel@uos.de>2023-12-15 14:07:05 +0100
committerBirte Kristina Friesel <birte.friesel@uos.de>2023-12-15 14:07:05 +0100
commitb58839b84fc85465bcb62b6e73ec35900e83da11 (patch)
tree792efd72039ff12c4b330ed620dcdfac4f8c41e3 /Microbenchmarks/MRAM-Latency
parenteb118b2f743656434c0c77e5318eeacc38bd9924 (diff)
MRAM latency benchmark: report DMA latency and bandwidth; merge r/w modes
Diffstat (limited to 'Microbenchmarks/MRAM-Latency')
-rw-r--r--Microbenchmarks/MRAM-Latency/Makefile47
-rw-r--r--Microbenchmarks/MRAM-Latency/dpu/copy.c17
-rw-r--r--Microbenchmarks/MRAM-Latency/host/app.c65
-rwxr-xr-xMicrobenchmarks/MRAM-Latency/run-transfer.sh32
-rwxr-xr-xMicrobenchmarks/MRAM-Latency/support/common.h4
5 files changed, 81 insertions, 84 deletions
diff --git a/Microbenchmarks/MRAM-Latency/Makefile b/Microbenchmarks/MRAM-Latency/Makefile
index b8dc7e2..ef75829 100644
--- a/Microbenchmarks/MRAM-Latency/Makefile
+++ b/Microbenchmarks/MRAM-Latency/Makefile
@@ -1,46 +1,37 @@
DPU_DIR := dpu
-HOST_DIR := host
-BUILDDIR ?= bin
NR_TASKLETS ?= 16
BL ?= 8
NR_DPUS ?= 1
-OP ?= READ
MEM ?= MRAM
-define conf_filename
- ${BUILDDIR}/.NR_DPUS_$(1)_NR_TASKLETS_$(2)_BL_$(3)_$(4)_$(5).conf
-endef
-CONF := $(call conf_filename,${NR_DPUS},${NR_TASKLETS},${BL},${OP},${MEM})
-
-HOST_TARGET := ${BUILDDIR}/host_code
-DPU_TARGET := ${BUILDDIR}/dpu_code
-
COMMON_INCLUDES := support
-HOST_SOURCES := $(wildcard ${HOST_DIR}/*.c)
-DPU_SOURCES := $(wildcard ${DPU_DIR}/*.c)
+HOST_SOURCES := $(wildcard host/*.c)
-.PHONY: all clean test
+COMMON_FLAGS := -Wall -Wextra -g -I${COMMON_INCLUDES}
+HOST_FLAGS := ${COMMON_FLAGS} -std=c11 -O3 `dpu-pkg-config --cflags --libs dpu` -DNR_TASKLETS=${NR_TASKLETS} -DNR_DPUS=${NR_DPUS} -DBL=${BL} -D${MEM}
+DPU_FLAGS := ${COMMON_FLAGS} -O2 -flto -DNR_TASKLETS=${NR_TASKLETS} -DBL=${BL} -D${MEM}
-__dirs := $(shell mkdir -p ${BUILDDIR})
+QUIET = @
-COMMON_FLAGS := -Wall -Wextra -g -I${COMMON_INCLUDES}
-HOST_FLAGS := ${COMMON_FLAGS} -std=c11 -O3 `dpu-pkg-config --cflags --libs dpu` -DNR_TASKLETS=${NR_TASKLETS} -DNR_DPUS=${NR_DPUS} -DBL=${BL} -D${OP} -D${MEM}
-DPU_FLAGS := ${COMMON_FLAGS} -O2 -flto -DNR_TASKLETS=${NR_TASKLETS} -DBL=${BL} -D${OP} -D${MEM}
+ifdef verbose
+ QUIET =
+endif
-all: ${HOST_TARGET} ${DPU_TARGET}
+all: bin/host_code bin/dpu_code
-${CONF}:
- $(RM) $(call conf_filename,*,*)
- touch ${CONF}
+bin:
+ ${QUIET}mkdir -p bin
-${HOST_TARGET}: ${HOST_SOURCES} ${COMMON_INCLUDES} ${CONF}
- $(CC) -o $@ ${HOST_SOURCES} ${HOST_FLAGS}
+bin/host_code: ${HOST_SOURCES} ${COMMON_INCLUDES} bin
+ ${QUIET}${CC} -o $@ ${HOST_SOURCES} ${HOST_FLAGS}
-${DPU_TARGET}: ${DPU_SOURCES} ${COMMON_INCLUDES} ${CONF}
- dpu-upmem-dpurte-clang ${DPU_FLAGS} -o $@ ${DPU_SOURCES}
+bin/dpu_code: dpu/copy.c ${COMMON_INCLUDES} bin
+ ${QUIET}dpu-upmem-dpurte-clang ${DPU_FLAGS} -o $@ dpu/copy.c
clean:
- $(RM) -r $(BUILDDIR)
+ ${QUIET}rm -rf bin
test: all
- ./${HOST_TARGET}
+ ${QUIET}bin/host_code
+
+.PHONY: all clean test
diff --git a/Microbenchmarks/MRAM-Latency/dpu/copy.c b/Microbenchmarks/MRAM-Latency/dpu/copy.c
index 5cfd141..de9cca8 100644
--- a/Microbenchmarks/MRAM-Latency/dpu/copy.c
+++ b/Microbenchmarks/MRAM-Latency/dpu/copy.c
@@ -45,7 +45,9 @@ int main_kernel1() {
uint32_t input_size_dpu = DPU_INPUT_ARGUMENTS.size / sizeof(T);
dpu_results_t *result = &DPU_RESULTS[tasklet_id];
- result->cycles = 0;
+ result->count = 0;
+ result->r_cycles = 0;
+ result->w_cycles = 0;
// Address of the current processing block in MRAM
uint32_t mram_base_addr_A = (uint32_t)(DPU_MRAM_HEAP_POINTER + (tasklet_id << BLOCK_SIZE_LOG2));
@@ -57,27 +59,20 @@ int main_kernel1() {
for(unsigned int byte_index = 0; byte_index < input_size_dpu * sizeof(T); byte_index += BLOCK_SIZE * NR_TASKLETS){
__mram_ptr void const* address_A = (__mram_ptr void const*)(mram_base_addr_A + byte_index);
__mram_ptr void* address_B = (__mram_ptr void*)(mram_base_addr_B + byte_index);
-#ifdef READ
// Barrier
timer_start(&cycles); // START TIMER
-#endif
// Load cache with current MRAM block
mram_read(address_A, cache_A, BLOCK_SIZE);
-#ifdef READ
// Barrier
- result->cycles += timer_stop(&cycles); // STOP TIMER
-#endif
+ result->r_cycles += timer_stop(&cycles); // STOP TIMER
-#ifdef WRITE
// Barrier
timer_start(&cycles); // START TIMER
-#endif
// Write cache to current MRAM block
mram_write(cache_A, address_B, BLOCK_SIZE);
-#ifdef WRITE
// Barrier
- result->cycles += timer_stop(&cycles); // STOP TIMER
-#endif
+ result->w_cycles += timer_stop(&cycles); // STOP TIMER
+ result->count += 1;
}
return 0;
diff --git a/Microbenchmarks/MRAM-Latency/host/app.c b/Microbenchmarks/MRAM-Latency/host/app.c
index c968749..3b5c530 100644
--- a/Microbenchmarks/MRAM-Latency/host/app.c
+++ b/Microbenchmarks/MRAM-Latency/host/app.c
@@ -22,6 +22,9 @@
#define DPU_BINARY "./bin/dpu_code"
#endif
+#define XSTR(x) STR(x)
+#define STR(x) #x
+
// Pointer declaration
static T* A;
static T* B;
@@ -30,7 +33,6 @@ static T* C2;
// Create input arrays
static void read_input(T* A, T* B, unsigned int nr_elements) {
srand(0);
- printf("nr_elements\t%u\t", nr_elements);
for (unsigned int i = 0; i < nr_elements; i++) {
A[i] = (T) (rand());
B[i] = (T) (rand());
@@ -50,17 +52,17 @@ int main(int argc, char **argv) {
struct Params p = input_params(argc, argv);
struct dpu_set_t dpu_set, dpu;
+ uint32_t clocks_per_sec;
uint32_t nr_of_dpus;
+ uint32_t nr_of_ranks;
// Allocate DPUs and load binary
DPU_ASSERT(dpu_alloc(NR_DPUS, NULL, &dpu_set));
DPU_ASSERT(dpu_load(dpu_set, DPU_BINARY, NULL));
DPU_ASSERT(dpu_get_nr_dpus(dpu_set, &nr_of_dpus));
- printf("Allocated %d DPU(s)\n", nr_of_dpus);
+ DPU_ASSERT(dpu_get_nr_ranks(dpu_set, &nr_of_ranks));
unsigned int i = 0;
- double cc = 0;
- double cc_min = 0;
const unsigned int input_size = p.exp == 0 ? p.input_size * nr_of_dpus : p.input_size;
assert(input_size % (nr_of_dpus * NR_TASKLETS) == 0 && "Input size!");
@@ -77,8 +79,6 @@ int main(int argc, char **argv) {
// Timer declaration
Timer timer;
- printf("NR_TASKLETS\t%d\tBL\t%d\n", NR_TASKLETS, BL);
-
// Loop over main kernel
for(int rep = 0; rep < p.n_warmup + p.n_reps; rep++) {
@@ -89,7 +89,6 @@ int main(int argc, char **argv) {
if(rep >= p.n_warmup)
stop(&timer, 0);
- printf("Load input data\n");
if(rep >= p.n_warmup)
start(&timer, 1, rep - p.n_warmup);
// Input arguments
@@ -106,7 +105,6 @@ int main(int argc, char **argv) {
if(rep >= p.n_warmup)
stop(&timer, 1);
- printf("Run program on DPU(s) \n");
// Run DPU kernel
if(rep >= p.n_warmup)
start(&timer, 2, rep - p.n_warmup);
@@ -126,24 +124,33 @@ int main(int argc, char **argv) {
}
#endif
- printf("Retrieve results\n");
if(rep >= p.n_warmup)
start(&timer, 3, rep - p.n_warmup);
- dpu_results_t results[nr_of_dpus];
i = 0;
DPU_FOREACH (dpu_set, dpu) {
// Copy output array
DPU_ASSERT(dpu_copy_from(dpu, DPU_MRAM_HEAP_POINTER_NAME, input_size_dpu * sizeof(T), bufferB + input_size_dpu * i, input_size_dpu * sizeof(T)));
#if PERF
- results[i].cycles = 0;
+ DPU_ASSERT(dpu_copy_from(dpu, "CLOCKS_PER_SEC", 0, &clocks_per_sec, sizeof(clocks_per_sec)));
// Retrieve tasklet timings
for (unsigned int each_tasklet = 0; each_tasklet < NR_TASKLETS; each_tasklet++) {
dpu_results_t result;
- result.cycles = 0;
+ result.count = 0;
+ result.r_cycles = 0;
+ result.w_cycles = 0;
DPU_ASSERT(dpu_copy_from(dpu, "DPU_RESULTS", each_tasklet * sizeof(dpu_results_t), &result, sizeof(dpu_results_t)));
- if (result.cycles > results[i].cycles)
- results[i].cycles = result.cycles;
+ printf("[::] DMA UPMEM | n_dpus=%d n_ranks=%d n_tasklets=%d e_type=%s n_elements=%u block_size_B=%d"
+ " | latency_mram_read_us=%f latency_mram_write_us=%f"
+ " throughput_dpu_mram_read_MBps=%f throughput_dpu_mram_write_MBps=%f"
+ " throughput_mram_read_MBps=%f throughput_mram_write_MBps=%f\n",
+ nr_of_dpus, nr_of_ranks, NR_TASKLETS, XSTR(T), input_size_dpu, BLOCK_SIZE,
+ ((double)result.r_cycles * 1e6 / clocks_per_sec) / result.count,
+ ((double)result.w_cycles * 1e6 / clocks_per_sec) / result.count,
+ input_size * sizeof(T) / ((double)result.r_cycles * 1e6 / clocks_per_sec),
+ input_size * sizeof(T) / ((double)result.w_cycles * 1e6 / clocks_per_sec),
+ input_size * sizeof(T) / ((double)result.r_cycles * 1e6 * NR_TASKLETS / clocks_per_sec),
+ input_size * sizeof(T) / ((double)result.w_cycles * 1e6 * NR_TASKLETS / clocks_per_sec));
}
#endif
i++;
@@ -151,36 +158,7 @@ int main(int argc, char **argv) {
if(rep >= p.n_warmup)
stop(&timer, 3);
-#if PERF
- uint64_t max_cycles = 0;
- uint64_t min_cycles = 0xFFFFFFFFFFFFFFFF;
- // Print performance results
- if(rep >= p.n_warmup){
- i = 0;
- DPU_FOREACH(dpu_set, dpu) {
- if(results[i].cycles > max_cycles)
- max_cycles = results[i].cycles;
- if(results[i].cycles < min_cycles)
- min_cycles = results[i].cycles;
- i++;
- }
- cc += (double)max_cycles;
- cc_min += (double)min_cycles;
- }
-#endif
-
}
- printf("DPU cycles = %g cc\n", cc / p.n_reps);
-
- // Print timing results
- printf("CPU ");
- print(&timer, 0, p.n_reps);
- printf("CPU-DPU ");
- print(&timer, 1, p.n_reps);
- printf("DPU Kernel ");
- print(&timer, 2, p.n_reps);
- printf("DPU-CPU ");
- print(&timer, 3, p.n_reps);
// Check output
bool status = true;
@@ -193,7 +171,6 @@ int main(int argc, char **argv) {
}
}
if (status) {
- printf("[" ANSI_COLOR_GREEN "OK" ANSI_COLOR_RESET "] Outputs are equal\n");
} else {
printf("[" ANSI_COLOR_RED "ERROR" ANSI_COLOR_RESET "] Outputs differ!\n");
}
diff --git a/Microbenchmarks/MRAM-Latency/run-transfer.sh b/Microbenchmarks/MRAM-Latency/run-transfer.sh
new file mode 100755
index 0000000..f4b8e08
--- /dev/null
+++ b/Microbenchmarks/MRAM-Latency/run-transfer.sh
@@ -0,0 +1,32 @@
+#!/bin/bash
+
+# The DPU application reads blocks of data from MRAM to WRAM via mram_read
+# and copies blocks of data from WRAM to MRAM via mram_write.
+# Each transfer handles BLOCK_SIZE (BL<<2) bytes via DMA.
+# Each DPU reports its total runtime, i.e., the number of cycles accumulated
+# over all mram_read or mram_write calls.
+# Total data size is 8192 uint64 elements, so 65536 B (64 KiB)
+# Overall throughput is 65536 B / dpu_seconds
+# Per-DPU throughput is 65536 B / (dpu_seconds * nr_tasklets)
+# Latency per mram_* call is dpu_seconds / dpu_count
+
+set -e
+
+(
+
+echo "prim-benchmarks MRAM microbenchmark (dfatool edition)"
+echo "Started at $(date)"
+echo "Revision $(git describe --always)"
+
+for ndpu in 1 4 8 16 32 48 64; do
+ for ntask in 1 2 4 8 12 16 20; do
+ for bl in 4 5 6 7 8 9 10 11; do
+ if make -B NR_DPUS=$ndpu NR_TASKLETS=$ntask BL=$bl; then
+ bin/host_code -w 0 -e 100 || true
+ fi
+ done
+ done
+done
+echo "Completed at $(date)"
+) | tee "log-$(hostname).txt"
+xz -v -9 -M 800M "log-$(hostname).txt"
diff --git a/Microbenchmarks/MRAM-Latency/support/common.h b/Microbenchmarks/MRAM-Latency/support/common.h
index 8e2e59b..ed2c69b 100755
--- a/Microbenchmarks/MRAM-Latency/support/common.h
+++ b/Microbenchmarks/MRAM-Latency/support/common.h
@@ -11,7 +11,9 @@ typedef struct {
} dpu_arguments_t;
typedef struct {
- uint64_t cycles;
+ uint64_t r_cycles;
+ uint64_t w_cycles;
+ uint32_t count;
} dpu_results_t;
// Transfer size between MRAM and WRAM